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a7872e4b5d
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205 Commits

Author SHA1 Message Date
Chad Rosier
a7872e4b5d [AArch64] Refactor NEON scalar reduce pairwise front-end codegen to remove 
unnecessary patterns in tablegen.

llvm-svn: 196832
 2013-12-09 22:47:34 +00:00
Chad Rosier
850366132e [AArch64] Remove q and non-q intrinsic definitions in the NEON scalar reduce 
pairwise implementation, using an overloaded definition instead.

llvm-svn: 196831
 2013-12-09 22:47:31 +00:00
Ana Pazos
171fb9a9de Fix pattern match for movi with 0D result 
Patch by Jiangning Liu.

With some test case changes:
- intrinsic test added to the existing /test/CodeGen/AArch64/neon-aba-abd.ll.
- New test cases to cover movi 1D scenario without using the intrinsic in
test/CodeGen/AArch64/neon-mov.ll.

llvm-svn: 196806
 2013-12-09 19:29:14 +00:00
Hao Liu
050a186fd6 [AArch64]Add missing pair intrinsics such as: 
int32_t vminv_s32(int32x2_t a)
which should be compiled into SMINP Vd.2S,Vn.2S,Vm.2S

llvm-svn: 196749
 2013-12-09 03:51:42 +00:00
Hao Liu
31c452a955 [AArch64]Pattern match failures for truncate store and extend load 
llvm-svn: 196748
 2013-12-09 03:34:08 +00:00
Ana Pazos
a6ef726750 Implemented vget/vset_lane_f16 intrinsics 
llvm-svn: 196533
 2013-12-05 21:07:49 +00:00
Jiangning Liu
7825595e77 For AArch64, add missing register cost calculation for big value types like v4i64 and v8i64. 
llvm-svn: 196456
 2013-12-05 02:12:01 +00:00
Kevin Qin
f5b717aa75 [AArch64 Neon] Add ACLE intrinsic vceqz_f64. 
llvm-svn: 196362
 2013-12-04 08:02:34 +00:00
Kevin Qin
f93a2e8673 [AArch64 NEON] Add missing compare intrinsics. 
llvm-svn: 196360
 2013-12-04 07:53:28 +00:00
Hao Liu
547dc86218 [AArch64]Add missing floating point convert, round and misc intrinsics. 
E.g. int64x1_t vcvt_s64_f64(float64x1_t a) -> FCVTZS Dd, Dn

llvm-svn: 196210
 2013-12-03 06:06:55 +00:00
Hao Liu
f922fde3de AArch64: add missing ACLE intrinsics mapping to general arithmetic operation from VFP instructions. 
E.g. float64x1_t vadd_f64(float64x1_t a, float64x1_t b) -> FADD Dd, Dn, Dm.

llvm-svn: 196208
 2013-12-03 05:58:30 +00:00
NAKAMURA Takumi
62ddd8c9e0 Whitespace. 
llvm-svn: 196203
 2013-12-03 05:28:27 +00:00
Hao Liu
fea9943555 AArch64: Add missing scalar pair intrinsics. 
E.g. "float32_t vaddv_f32(float32x2_t a)" to be matched into "faddp s0, v1.2s".

llvm-svn: 196198
 2013-12-03 03:39:47 +00:00
Jiangning Liu
24b3414579 Add some missing pattern matches for AArch64 Neon intrinsics like vuqadd_s64 and friends. 
llvm-svn: 196192
 2013-12-03 01:33:52 +00:00
Jiangning Liu
3f5f9eefd0 Add some missing pattern matches for AArch64 Neon intrinsics like vmull_high_n_s16 and friends. 
llvm-svn: 196190
 2013-12-03 01:29:32 +00:00
Rafael Espindola
5f33387c40 Refactor the setting of PrivateGlobalPrefix. 
No functionality change.

llvm-svn: 196170
 2013-12-02 23:39:26 +00:00
Chad Rosier
bcca7559f8 [AArch64] Implemented vcopy_lane patterns using scalar DUP instruction. 
Patch by Ana Pazos!

llvm-svn: 196151
 2013-12-02 21:05:16 +00:00
Rafael Espindola
cee11d6f43 Remove dead code. 
MO_JumpTableIndex and MO_ExternalSymbol don't show up on inline asm.

Keeping parts of the old asm printer just to print inline asm to a string that
we then parse back looks like a hack.

llvm-svn: 196111
 2013-12-02 15:36:37 +00:00
Rafael Espindola
427ca8d886 Change the default of AsmWriterClassName and isMCAsmWriter. 
llvm-svn: 196065
 2013-12-02 04:55:42 +00:00
Hao Liu
b9fa1067c7 AArch64: The pattern match should check the range of the immediate value. 
Or we can generate some illegal instructions.
E.g. shrn2 v0.4s, v1.2d, #35. The legal range should be in [1, 16].

llvm-svn: 195941
 2013-11-29 02:11:22 +00:00
Jiangning Liu
afc7f71eb3 Add missing pattern for supporting intrinsic function vbsl_f64 with 
argument double floating point.

llvm-svn: 195938
 2013-11-29 01:37:15 +00:00
Kevin Qin
b95721d200 [AArch64 NEON]Fix a assertion failure when disassemble SHLL instruction. 
llvm-svn: 195936
 2013-11-29 01:29:16 +00:00
Benjamin Kramer
fd8fd4246f Silence sign-compare warning and reduce nesting. 
No functionality change.

llvm-svn: 195932
 2013-11-28 19:58:56 +00:00
NAKAMURA Takumi
99f544b37e [CMake] Let add_public_tablegen_target responsible to provide dependency to CommonTableGen. 
add_public_tablegen_target adds *CommonTableGen to LLVM_COMMON_DEPENDS.
LLVM_COMMON_DEPENDS affects add_llvm_library (and other add_target stuff) within its scope.

llvm-svn: 195927
 2013-11-28 17:04:04 +00:00
NAKAMURA Takumi
5dbd3bcf3d [CMake] Prune include_directories() in llvm/lib/Target. add_llvm_target() sets them. 
llvm-svn: 195921
 2013-11-28 14:53:30 +00:00
NAKAMURA Takumi
128a461f6a Add newline at eof. 
llvm-svn: 195920
 2013-11-28 14:52:52 +00:00
Jiangning Liu
7f44dcb9f4 Remove the variable only used by assert to avoid the build failure 
caused by build options [-Werror,-Wunused-variable].

llvm-svn: 195905
 2013-11-28 01:34:55 +00:00
Hao Liu
2f617213ef AArch64: Fix a bug about disassembling post-index load single element to 4 vectors 
llvm-svn: 195903
 2013-11-28 01:07:45 +00:00
Jiangning Liu
d9270b7a51 Fix the AArch64 NEON bug exposed by checking constant integer argument range of ACLE intrinsics. 
llvm-svn: 195843
 2013-11-27 14:02:25 +00:00
Chad Rosier
ca062e81db [AArch64] Add support for NEON scalar floating-point absolute difference. 
llvm-svn: 195803
 2013-11-27 01:45:58 +00:00
Chad Rosier
1337fcc721 [AArch64] Add support for NEON scalar floating-point to integer convert 
instructions.

llvm-svn: 195788
 2013-11-26 22:17:37 +00:00
Kevin Qin
1370a1e1ee Refactored the implementation of AArch64 NEON instruction ZIP, UZP 
and TRN.
Fix a bug when mixed use of vget_high_u8() and vuzp_u8().

llvm-svn: 195716
 2013-11-26 03:26:47 +00:00
Kevin Qin
95c8b28223 [AArch64]Implement 128 bit register copy with NEON. 
llvm-svn: 195713
 2013-11-26 02:33:42 +00:00
Hao Liu
66ab312f94 Fixed a bug about disassembling AArch64 post-index load/store single element instructions. 
ie. echo "0x00 0x04 0x80 0x0d" | ../bin/llvm-mc -triple=aarch64 -mattr=+neon -disassemble
    echo "0x00 0x00 0x80 0x0d" | ../bin/llvm-mc -triple=aarch64 -mattr=+neon -disassemble
will be disassembled into the same instruction st1 {v0b}[0], [x0], x0.

llvm-svn: 195591
 2013-11-25 01:53:26 +00:00
Hao Liu
684d7e8968 Fix a Cygwin build failure caused by enum values starting with '_', which is conflicted with some platform macros. 
This patch only renames variables, no functional change.

llvm-svn: 195432
 2013-11-22 09:24:41 +00:00
Hao Liu
4c6cc894d2 Fix the bugs about AArch64 Load/Store vector types and bitcast between i64 and vector types. 
e.g. "%tmp = load <2 x i64>* %ptr" can't be selected. 
     "%tmp = bitcast i64 %in to <2 x i32>" can't be selected.

llvm-svn: 195424
 2013-11-22 08:47:22 +00:00
Hao Liu
b1bce975ea Revert last change by haoliu because of buildbot failure. 
llvm-svn: 195423
 2013-11-22 08:34:54 +00:00
Hao Liu
eb2535e203 Fix a Cygwin build failure caused by enum values starting with '_', which is conflicted with some platform macros. 
This solution only renames variables, no functional change.

NOTE: This is a candidate for the 3.4 branch.
llvm-svn: 195421
 2013-11-22 08:17:16 +00:00
Jiangning Liu
a50f9e81f3 For AArch64 back-end instruction selection, lower Neon_Lowxxx with EXTRCT_SUBREG. 
llvm-svn: 195408
 2013-11-22 02:45:13 +00:00
Ana Pazos
86d72bbede Implemented Neon scalar vdup_lane intrinsics. 
Fixed scalar dup alias and added test case.

llvm-svn: 195330
 2013-11-21 08:16:15 +00:00
Ana Pazos
5ddc31e426 Implemented Neon scalar by element intrinsics. 
Intrinsics implemented: vqdmull_lane, vqdmulh_lane, vqrdmulh_lane,
vqdmlal_lane, vqdmlsl_lane scalar Neon intrinsics.

llvm-svn: 195327
 2013-11-21 07:37:04 +00:00
Hao Liu
b26dfe0306 Implement AArch64 neon instructions class SIMD lsone and SIMD lone-post. 
llvm-svn: 195078
 2013-11-19 02:17:05 +00:00
Jiangning Liu
42b7a215f4 Implement AArch64 SISD intrinsics for vget_high and vget_low. 
llvm-svn: 195074
 2013-11-19 01:46:48 +00:00
Kevin Qin
7b74269765 implement MC layer of AArch64 neon instruction PMULL and PMULL2 with 128 bit integer. 
llvm-svn: 195072
 2013-11-19 01:40:25 +00:00
Jiangning Liu
7c858f236d Add predicate for AArch64 crypto instructions. 
llvm-svn: 195071
 2013-11-19 01:38:31 +00:00
Juergen Ributzka
5357a6d64b [weak vtables] Remove a bunch of weak vtables 
This patch removes most of the trivial cases of weak vtables by pinning them to
a single object file. The memory leaks in this version have been fixed. Thanks
Alexey for pointing them out.

Differential Revision: http://llvm-reviews.chandlerc.com/D2068

Reviewed by Andy

llvm-svn: 195064
 2013-11-19 00:57:56 +00:00
Alexey Samsonov
3bfef6bdb6 Revert r194865 and r194874. 
This change is incorrect. If you delete virtual destructor of both a base class
and a subclass, then the following code:
  Base *foo = new Child();
  delete foo;
will not cause the destructor for members of Child class. As a result, I observe
plently of memory leaks. Notable examples I investigated are:
ObjectBuffer and ObjectBufferStream, AttributeImpl and StringSAttributeImpl.

llvm-svn: 194997
 2013-11-18 09:31:53 +00:00
Kevin Qin
eb2e892703 [AArch64 NEON]Add mov alias for simd copy instructions. 
Set some unspecified bits of INS/DUP to zero as ARMARM requested.

llvm-svn: 194996
 2013-11-18 09:20:32 +00:00
Hao Liu
fcc294f3dd Implement the newly added ACLE functions for ld1/st1 with 2/3/4 vectors. 
The functions are like: vst1_s8_x2 ...

llvm-svn: 194990
 2013-11-18 06:31:53 +00:00
Ana Pazos
b1568fd504 Implemented aarch64 Neon scalar vmulx_lane intrinsics 
Implemented aarch64 Neon scalar vfma_lane intrinsics
Implemented aarch64 Neon scalar vfms_lane intrinsics

Implemented legacy vmul_n_f64, vmul_lane_f64, vmul_laneq_f64
intrinsics (v1f64 parameter type) using Neon scalar instructions.

Implemented legacy vfma_lane_f64, vfms_lane_f64,
vfma_laneq_f64, vfms_laneq_f64 intrinsics (v1f64 parameter type)
using Neon scalar instructions.

llvm-svn: 194888
 2013-11-15 23:32:10 +00:00