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5422 Commits

Author SHA1 Message Date
Jay Foad
d6a7ab5e54 [CodeGen] Make use of MachineInstrBuilder::getReg
Reviewers: arsenm

Subscribers: wdng, hiraditya, Petar.Avramovic, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D73262
2020-01-23 13:38:13 +00:00
Fedor Sergeev
af7baa2a66 [LoopRotate] add ability to repeat loop rotation until non-deoptimizing exit is found
In case of loops with multiple exit where all-but-one exit are deoptimizing
it might happen that the first rotation will end up with latch having a deoptimizing
exit. This makes the loop unsuitable for trip-count analysis (say, getLoopEstimatedTripCount)
as well as for loop transformations that know how to handle multple deoptimizing exits.

It pretty much means that canonical form in multple-deoptimizing-exits case should be
with non-deoptimizing exit at latch.
Teach loop-rotation to reach this canonical form by repeating rotation.

-loop-rotate-multi option introduced to control this behavior, currently disabled by default.

Reviewers: skatkov, asbirlea, reames, fhahn
Reviewed By: skatkov

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D73058
2020-01-23 15:56:24 +03:00
Simon Tatham
c48cf33847 [ARM,MVE] Revise immediate VBIC/VORR to look more like NEON.
Summary:
In NEON, the immediate forms of VBIC and VORR are each represented as
a single MC instruction, which takes its immediate operand already
encoded in a NEON-friendly format: 8 data bits, plus some control bits
indicating how to expand them into a full vector.

In MVE, we represented immediate VBIC and VORR as four separate MC
instructions each, for an 8-bit immediate shifted left by 0, 8, 16 or
24 bits. For each one, the value of the immediate operand is in the
'natural' form, i.e. the numerical value that would actually be BICed
or ORRed into each vector lane (and also the same value shown in
assembly). For example, MVE_VBICIZ16v4i32 takes an operand such as
0xab0000, which NEON would represent as 0xab | (control bits << 8).

The MVE approach is superficially nice (it makes assembly input and
output easy, and it's also nice if you're manually constructing
immediate VBICs). But it turns out that it's better for isel if we
make the NEON and MVE instructions work the same, because the
ARMISD::VBICIMM and VORRIMM node types already encode their immediate
into the NEON format, so it's easier if we can just use it.

Also, this commit reduces the total amount of code rather than
increasing it, which is surely an indication that it really is simpler
to do it this way!

Reviewers: dmgreen, ostannard, miyuki, MarkMurrayARM

Reviewed By: dmgreen

Subscribers: kristof.beyls, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D73205
2020-01-23 11:53:52 +00:00
Thomas Preud'homme
0c1c818a0d [FileCheck] Strengthen error checks in unit tests
Summary:
This commit adds error checking beyond UndefVarError and fix a number of
Error/Expected related idioms:
- use (EXPECT|ASSERT)_THAT_(ERROR|EXPECTED) instead of errorToBool or
  boolean operator
- ASSERT when a further check require the check to be successful to give
  a correct result

Reviewers: jhenderson, jdenny, probinson, grimar, arichardson, rnk

Reviewed By: jhenderson

Subscribers: llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D72914
2020-01-23 11:31:53 +00:00
Clement Courbet
b60c7a5360 [llvm-exegesis] Allow the randomizer to fail nicely...
Summary:
... instead of crashing.
On typical exmaple is when there are no available registers.

Reviewers: gchatelet

Subscribers: tschuett, mstojanovic, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D73196
2020-01-23 11:08:44 +01:00
Igor Kudrin
d2a354ad70 [DWARF] Better detect errors in Address Range Tables.
The patch tries to cover most remaining cases of wrong data.

Differential Revision: https://reviews.llvm.org/D71932
2020-01-23 12:41:05 +07:00
Igor Kudrin
2a9879d3d3 [DWARF] Support DWARF64 in DWARFDebugArangeSet.
This allows parsing Address Range Tables in the 64-bit DWARF format.

Differential Revision: https://reviews.llvm.org/D71876
2020-01-23 12:41:05 +07:00
Igor Kudrin
25f6cfa0aa [DWARF] Return Error from DWARFDebugArangeSet::extract().
This helps to detect and report parsing errors better.
The patch follows the ideas of LLDB's patches D59370 and D59381.

It adds tests for valid and some invalid cases. More checks and
tests to come. Note that the patch fixes validation of the Length
field because the value does not include the field itself.

The existing users are updated to show the error messages.

Differential Revision: https://reviews.llvm.org/D71875
2020-01-23 12:41:05 +07:00
Nikita Popov
4c0510dfc2 [PatternMatch] Add m_APInt/m_APFloat matchers accepting undef
The current m_APInt() and m_APFloat() matchers do not accept splats
that include undefs (unlike m_Zero() and other matchers for specific
values). We can't simply change the default behavior, as there are
existing transforms that would not be safe with undefs.

For this reason, I'm introducing new m_APIntAllowUndef() and
m_APFloatAllowUndef() matchers, that allow splats with undefs.
Additionally, m_APIntForbidUndef() and m_APFloatForbidUndef() are
added. These have the same behavior as the existing m_APInt() and
m_APFloat(), but serve as an explicit indication that undefs were
considered and found unsound for this transform. This helps
distinguish them from existing uses of m_APInt() where we do not
know whether undefs can or cannot be allowed without additional review.

Differential Revision: https://reviews.llvm.org/D72975
2020-01-22 22:49:32 +01:00
David Green
2ac2dd62a3 [ARM] Mark MVE loads/store as not having side effects
The hasSideEffect parameter is usually automatically inferred from
instruction patterns. For some of our MVE instructions, we do not have
patterns though, such as for the pre/post inc loads and stores. This
instead specifies the flag manually on the base MVE_VLDRSTR_base
tablegen class, making sure we get this correct.

This can help with scheduling multiple loads more optimally. Here I've
added a unittest as a more direct form of testing.

Differential Revision: https://reviews.llvm.org/D73117
2020-01-22 17:56:55 +00:00
Aaron Ballman
3be16c9bda Revert "Unconditionally enable lvalue function designators; NFC"
This reverts commit 968561bcdc34c7d74482fe3bb69a045abf08d2c1
2020-01-22 12:40:39 -05:00
Aaron Ballman
d53a98a327 Unconditionally enable lvalue function designators; NFC
We previously had to guard against older MSVC and GCC versions which had rvalue
references but not support for marking functions with ref qualifiers. However,
having bumped our minimum required version to MSVC 2017 and GCC 5.1 mean we can
unconditionally enable this feature. Rather than keeping the macro around, this
replaces use of the macro with the actual ref qualifier.
2020-01-22 09:54:34 -05:00
Clement Courbet
b2d7aaa0ca [llvm-exegesis] Serial snippet: Restrict the set of back-to-back instructions
Summary:
Right now when picking a back-to-back instruction at random, we might select
instructions that we do not know how to handle.
Add a ExegesisTarget hook to possibly filter instructions.

Reviewers: gchatelet

Subscribers: tschuett, mstojanovic, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D73161
2020-01-22 11:00:43 +01:00
Lang Hames
ac6d037b49 [ORC] Add support for emulated TLS to ORCv2.
This commit adds a ManglingOptions struct to IRMaterializationUnit, and replaces
IRCompileLayer::CompileFunction with a new IRCompileLayer::IRCompiler class. The
ManglingOptions struct defines the emulated-TLS state (via a bool member,
EmulatedTLS, which is true if emulated-TLS is enabled and false otherwise). The
IRCompileLayer::IRCompiler class wraps an IRCompiler (the same way that the
CompileFunction typedef used to), but adds a method to return the
IRCompileLayer::ManglingOptions that the compiler will use.

These changes allow us to correctly determine the symbols that will be produced
when a thread local global variable defined at the IR level is compiled with or
without emulated TLS. This is required for ORCv2, where MaterializationUnits
must declare their interface up-front.

Most ORCv2 clients should not require any changes. Clients writing custom IR
compilers will need to wrap their compiler in an IRCompileLayer::IRCompiler,
rather than an IRCompileLayer::CompileFunction, however this should be a
straightforward change (see modifications to CompileUtils.* in this patch for an
example).
2020-01-21 19:55:33 -08:00
Tim Shen
d64d54da75 [APInt] Fix tests that had wrong assumption about sdivs with negative quotient.
Reviewers: sanjoy

Subscribers: bixia, dexonsmith, sanjoy.google, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D70156
2020-01-21 13:53:01 -08:00
Fangrui Song
4656f7207f [APFloat][unittest] Fix -Wsign-compare after D69773 2020-01-21 12:24:34 -08:00
Ehud Katz
024d2bb279 [APFloat] Add support for operations on Signaling NaN
Fix PR30781

Differential Revision: https://reviews.llvm.org/D69774
2020-01-21 21:02:00 +02:00
Fangrui Song
1da9bab99c [APFloat][unittest] Fix -Wunused-variable after D69773 2020-01-21 10:33:48 -08:00
Ehud Katz
b85eaf5298 [APFloat] Extend conversion from special strings
Add support for converting Signaling NaN, and a NaN Payload from string.

The NaNs (the string "nan" or "NaN") may be prefixed with 's' or 'S' for defining a Signaling NaN.

A payload for a NaN can be specified as a suffix.
It may be a octal/decimal/hexadecimal number in parentheses or without.

Differential Revision: https://reviews.llvm.org/D69773
2020-01-21 20:22:27 +02:00
Clement Courbet
f5fc494b30 [llvm-exegesis] Add support for AVX512 explicit rounding operands.
Reviewers: gchatelet

Subscribers: tschuett, mstojanovic, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D73083
2020-01-21 11:50:17 +01:00
Thomas Preud'homme
ebe0ba5088 [FileCheck] Make Match unittest more flexible
Summary:
FileCheck's Match unittest needs updating whenever some call to
initNextPattern() is inserted before its final block of checks. This
commit change usage of LineNumber inside the Tester object so that the
line number of the current pattern can be queries, thereby making the
Match test more solid.

Reviewers: jhenderson, jdenny, probinson, grimar, arichardson, rnk

Reviewed By: jhenderson

Subscribers: llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D72913
2020-01-20 16:21:35 +00:00
Thomas Preud'homme
dd4c319f8a [FileCheck] Clean and improve unit tests
Summary:
Clean redundant unit test checks (codepath already tested elsewhere) and
add a few missing checks for existing numeric substitution and match
logic.

Reviewers: jhenderson, jdenny, probinson, grimar, arichardson, rnk

Reviewed By: jhenderson

Subscribers: llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D72912
2020-01-20 15:57:29 +00:00
Miloš Stojanović
5da66b880e [llvm-exegesis][NFC] Disassociate snippet generators from benchmark runners
The addition of `inverse_throughput` mode highlighted the disjointedness
of snippet generators and benchmark runners because it used the
`UopsSnippetGenerator` with the  `LatencyBenchmarkRunner`.
To keep the code consistent tie the snippet generators to
parallelization/serialization rather than their benchmark runners.

Renaming `LatencySnippetGenerator` -> `SerialSnippetGenerator`.
Renaming `UopsSnippetGenerator` -> `ParallelSnippetGenerator`.

Differential Revision: https://reviews.llvm.org/D72928
2020-01-20 16:19:13 +01:00
Nico Weber
90a1a43a36 Remove AllTargetsAsmPrinters
It's been an empty target since r360498 and friends
(`git log --grep='Move InstPrinter files to MCTargetDesc.' llvm/lib/Target`),
but due to hwo the way these targets are structured it was silently
an empty target without anyone noticing.

No behavior change.
2020-01-17 19:04:06 -05:00
Adrian Prantl
3363ed7b0a Move the sysroot attribute from DIModule to DICompileUnit
[this re-applies c0176916a4824812d25a5a22c4ff7c95857b0cd6
 with the correct commit message and phabricator link]

This addresses point 1 of PR44213.
https://bugs.llvm.org/show_bug.cgi?id=44213

The DW_AT_LLVM_sysroot attribute is used for Clang module debug info,
to allow LLDB to import a Clang module from source. Currently it is
part of each DW_TAG_module, however, it is the same for all modules in
a compile unit. It is more efficient and less ambiguous to store it
once in the DW_TAG_compile_unit.

This should have no effect on DWARF consumers other than LLDB.

Differential Revision: https://reviews.llvm.org/D71732
2020-01-17 12:55:40 -08:00
Adrian Prantl
e3aa322358 Revert "Rename DW_AT_LLVM_isysroot to DW_AT_LLVM_sysroot"
This reverts commit 12e479475a896f664fb721f98c2d6805185ac352.

I accidentally landed this patch with the wrong commit message ...
2020-01-17 12:52:36 -08:00
Alina Sbirlea
62ee34a755 [UnitTests] Add invalidate methods. 2020-01-17 10:47:52 -08:00
Adrian Prantl
e436ebc793 Rename DW_AT_LLVM_isysroot to DW_AT_LLVM_sysroot
This is a purely cosmetic change that is NFC in terms of the binary
output. I bugs me that I called the attribute DW_AT_LLVM_isysroot
since the "i" is an artifact of GCC command line option syntax
(-isysroot is in the category of -i options) and doesn't carry any
useful information otherwise.

This attribute only appears in Clang module debug info.

Differential Revision: https://reviews.llvm.org/D71722
2020-01-17 09:36:48 -08:00
Sanjay Patel
b77facd730 [IR] fix Constant::isElementWiseEqual() to allow for all undef elements compare
We could argue that match() should be more flexible here,
but I'm not sure what impact that would have on existing code.
2020-01-17 08:31:16 -05:00
Sanjay Patel
5e10616d04 [IR] add unit test for Constant::isElementWiseEqual() for undef corner case; NFC 2020-01-17 08:26:00 -05:00
Miloš Stojanović
f27b780153 [llvm-exegesis][mips] Add support for memory instructions
Implementing functions used to enable testing of memory instructions.

Differential Revision: https://reviews.llvm.org/D72858
2020-01-17 13:26:09 +01:00
Steven Wan
fdc7cc8bf4 [NFC][PowerPC] Remove unnecessary link components.
Remove unused link components for PowerPC target unittest according
to post commit comments. This is a redo for a previous commit
"fc4e43ad618b" that removed a few components that are necessary
when libraries are to be built shared (i.e., BUILD_SHARED_LIBS=ON).
2020-01-16 21:22:51 -05:00
Steven Wan
b7039fc72e Add back more link components.
Add all previous link components back to unblock bots for the moment.
In the meantime, I'm investigating the BUILD_SHARED_LIBS=ON build to
find out the minimal list of components needed.
2020-01-16 20:19:25 -05:00
Steven Wan
6b52bd5e43 Add back other PowerPC link components.
Add the link components back to unblock bots for the moment. In the
meantime, I'm investigating the BUILD_SHARED_LIBS=ON build to find
out the minimal list of components needed.
2020-01-16 19:14:39 -05:00
David Blaikie
6bae49b565 PointerLikeTypeTraits: Standardize NumLowBitsAvailable on static constexpr rather than anonymous enum
This is (more?) usable by GDB pretty printers and seems nicer to write.

There's one tricky caveat that in C++14 (LLVM's codebase today) the
static constexpr member declaration is not a definition - so odr use of
this constant requires an out of line definition, which won't be
provided (that'd make all these trait classes more annoyidng/expensive
to maintain). But the use of this constant in the library implementation
is/should always be in a non-odr context - only two unit tests needed to
be touched to cope with this/avoid odr using these constants.

Based on/expanded from D72590 by Christian Sigg.
2020-01-16 15:30:50 -08:00
Sanjay Patel
bc125ae78b [IR] fix crash in Constant::isElementWiseEqual() with FP types
We lifted this code from InstCombine for general usage in:
rL369842
...but it's not safe as-is. There are no existing users that can
trigger this bug, but I discovered it via crashing several
regression tests when trying to use it for select folding in
InstSimplify.

ICmp requires (vector) integer types, so give up on anything that's
not integer or FP (pointers and ?) then bitcast the constants
before trying the match. That matches the definition of "equal or
undef" that I was looking for. If someone wants an FP-aware version
of equality (deal with NaN, -0.0), that could be a different mode
or different function.

Differential Revision: https://reviews.llvm.org/D72784
2020-01-16 16:49:16 -05:00
StevenWanYu
17feeab184 [NFC] Remove unnecessary link components.
Remove unused link components in unittest according to post commit
comments.
2020-01-16 16:08:07 -05:00
stevewan
84c463c970 [PowerPC][AIX] Make PIC the default relocation model for AIX
Summary:
The `llc` tool currently defaults to Static relocation model and generates non-relocatable code for 32-bit Power.
This is not desirable on AIX where we always generate Position Independent Code (PIC). This patch makes PIC the default relocation model for AIX.

Reviewers: daltenty, hubert.reinterpretcast, DiggerLin, Xiangling_L, sfertile

Reviewed By: hubert.reinterpretcast

Subscribers: mgorny, wuzish, nemanjai, hiraditya, kbarton, jsji, shchenz, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D72479
2020-01-16 13:07:36 -05:00
Miloš Stojanović
b22e99bc49 [llvm-exegesis][mips] Add RegisterAliasingTest unit test
Differential Revision: https://reviews.llvm.org/D72004
2020-01-16 17:50:45 +01:00
Miloš Stojanović
48ecc855b2 [llvm-exegesis][NFC] Refactor Mips tests fixtures into a base class.
Differential Revision: https://reviews.llvm.org/D72003
2020-01-16 17:50:44 +01:00
Francesco Petrogalli
f6e39fe1d1 [VectorUtils] Rework the Vector Function Database (VFDatabase).
Summary:
This commits is a rework of the patch in
https://reviews.llvm.org/D67572.

The rework was requested to prevent out-of-tree performance regression
when vectorizing out-of-tree IR intrinsics. The vectorization of such
intrinsics is enquired via the static function `isTLIScalarize`. For
detail see the discussion in https://reviews.llvm.org/D67572.

Reviewers: uabelho, fhahn, sdesmalen

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D72734
2020-01-16 15:08:26 +00:00
Lang Hames
bbe6d35d70 [ORC] Update lazyReexports to support aliases with different symbol names.
A bug in the existing implementation meant that lazyReexports would not work if
the aliased name differed from the alias's name, i.e. all lazy reexports had to
be of the form (lib1, name) -> (lib2, name). This patch fixes the issue by
capturing the alias's name in the NotifyResolved callback. To simplify this
capture, and the LazyCallThroughManager code in general, the NotifyResolved
callback is updated to use llvm::unique_function rather than a custom class.

No test case yet: This can only be tested at runtime, and the only in-tree
client (lli) always uses aliases with matching names. I will add a new LLJIT
example shortly that will directly test the lazyReexports API and the
non-trivial alias use case.
2020-01-15 08:02:53 -08:00
Tom Stellard
fb33bc86b6 CMake: Make most target symbols hidden by default
Summary:
For builds with LLVM_BUILD_LLVM_DYLIB=ON and BUILD_SHARED_LIBS=OFF
this change makes all symbols in the target specific libraries hidden
by default.

A new macro called LLVM_EXTERNAL_VISIBILITY has been added to mark symbols in these
libraries public, which is mainly needed for the definitions of the
LLVMInitialize* functions.

This patch reduces the number of public symbols in libLLVM.so by about
25%.  This should improve load times for the dynamic library and also
make abi checker tools, like abidiff require less memory when analyzing
libLLVM.so

One side-effect of this change is that for builds with
LLVM_BUILD_LLVM_DYLIB=ON and LLVM_LINK_LLVM_DYLIB=ON some unittests that
access symbols that are no longer public will need to be statically linked.

Before and after public symbol counts (using gcc 8.2.1, ld.bfd 2.31.1):
nm before/libLLVM-9svn.so | grep ' [A-Zuvw] ' | wc -l
36221
nm after/libLLVM-9svn.so | grep ' [A-Zuvw] ' | wc -l
26278

Reviewers: chandlerc, beanz, mgorny, rnk, hans

Reviewed By: rnk, hans

Subscribers: merge_guards_bot, luismarques, smeenai, ldionne, lenary, s.egerton, pzheng, sameer.abuasal, MaskRay, wuzish, echristo, Jim, hiraditya, michaelplatings, chapuni, jholewinski, arsenm, dschuff, jyknight, dylanmckay, sdardis, nemanjai, jvesely, javed.absar, sbc100, jgravelle-google, aheejin, kbarton, fedor.sergeev, asb, rbar, johnrusso, simoncook, apazos, sabuasal, niosHD, jrtc27, zzheng, edward-jones, mgrang, atanasyan, rogfer01, MartinMosbeck, brucehoult, the_o, PkmX, jocewei, kristina, jsji, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D54439
2020-01-14 19:46:52 -08:00
Dmitri Gribenko
fa88faafeb Removed PointerUnion3 and PointerUnion4 aliases in favor of the variadic template 2020-01-14 18:56:29 +01:00
Sanjay Patel
9f1c8045a9 [IR] fix potential crash in Constant::isElementWiseEqual()
There's only one user of this API currently, and it seems
impossible that it would compare values with different types.

But that's not true in general, so we need to make sure the
types are the same.

As denoted by the FIXME comments, we will also crash on FP
values. That's what brought me here, but we can make that a
follow-up patch.
2020-01-14 11:52:38 -05:00
Miloš Stojanović
cca0a0ee45 [unittests] Fix "comparison of integers of different signs" warnings
A warning is sent because `std::distance()` returns a signed type so
`CmpHelperEQ()` gets instantiated into a function that compares
differently signed arguments.

Differential Revision: https://reviews.llvm.org/D72632
2020-01-14 13:24:51 +01:00
Sam Parker
66428b5494 [ARM][LowOverheadLoops] Allow all MVE instrs.
We have a whitelist of instructions that we allow when tail
predicating, since these are trivial ones that we've deemed need no
special handling. Now change ARMLowOverheadLoops to allow the
non-trivial instructions if they're contained within a valid VPT
block. Since a valid block is one that is predicated upon the VCTP so
we know that these non-trivial instructions will still behave as
expected once the implicit predication is used instead.

This also fixes a previous test failure.

Differential Revision: https://reviews.llvm.org/D72509
2020-01-14 12:03:58 +00:00
Fangrui Song
beebf4212b [X86][Disassembler] Fix a bug when disassembling an empty string
readPrefixes() assumes insn->bytes is non-empty. The code path is not
exercised in llvm-mc because llvm-mc does not feed empty input to
MCDisassembler::getInstruction().

This bug is uncovered by a5994c789a2982a770254ae1607b5b4cb641f73c.
An empty string did not crash before because the deleted regionReader()
allowed UINT64_C(-1) as insn->readerCursor.

  Bytes.size() <= Address -> R->Base
  0 <= UINT64_C(-1) - UINT32_C(-1)
2020-01-13 10:42:21 -08:00
James Henderson
69703dcf78 [DebugInfo] Make debug line address size mismatch non-fatal to parsing
Reasonable assumptions can be made when a parsed address length does not
match the expected length, so there's no need for this to be fatal.

Reviewed by: ikudrin

Differential Revision: https://reviews.llvm.org/D72154
2020-01-13 16:27:05 +00:00
Miloš Stojanović
7696c3e850 [llvm-exegesis][mips] Expand loadImmediate()
Add support for loading 32-bit immediates and enable the use of GPR64
registers.

Differential Revision: https://reviews.llvm.org/D71873
2020-01-13 12:32:13 +01:00