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79453 Commits

Author SHA1 Message Date
Chris Lattner
b57d05e24b Introduce a new MutableArrayRef class, which refers to a series of mutable
T's that are consequtively in memory.

llvm-svn: 148463
2012-01-19 06:34:52 +00:00
Evan Cheng
fe9c0eef4b Enhance finalizeBundle to return end of bundle iterator because it makes sense.
llvm-svn: 148462
2012-01-19 06:13:10 +00:00
Jim Grosbach
8a63389253 ARM assembly diagnostic caret in better position for FPImm.
llvm-svn: 148459
2012-01-19 02:47:30 +00:00
Jim Grosbach
87e683580c Thumb2 relaxation for tADR to t2ADR.
llvm-svn: 148456
2012-01-19 02:09:38 +00:00
Jim Grosbach
ad42e2fc2a Add comment and fix range check in condition.
llvm-svn: 148455
2012-01-19 01:50:30 +00:00
Jim Grosbach
48afa48c3e Add testcase.
llvm-svn: 148454
2012-01-19 01:36:59 +00:00
Lang Hames
059e79c753 Added methods to get the live range immediately before a given slot. Intended to parallel the getVNInfoBefore method.
llvm-svn: 148453
2012-01-19 01:36:06 +00:00
Nick Lewycky
9888a01041 Space after punctuation.
llvm-svn: 148451
2012-01-19 01:13:47 +00:00
Evan Cheng
86ca08f633 - Slight change to finalizeBundle() interface. LastMI is not exclusive (pointing
to instruction right after the last instruction in the bundle.
- Add a finalizeBundle() variant that doesn't specify LastMI. Instead, the code
  will find the last instruction in the bundle by following the 'InsideBundle'
  marker. This is useful in case bundles are formed early (i.e. during MI
  scheduling) but finalized later (i.e. after register allocator has finished
  rewriting virtual registers with physical registers).

llvm-svn: 148444
2012-01-19 00:46:06 +00:00
Nick Lewycky
c1e7e2eaf6 Add a TargetOption for disabling tail calls.
llvm-svn: 148442
2012-01-19 00:34:10 +00:00
Evan Cheng
cfc7639cc7 Rename Finalizebundle to finalizeBundle to conform to coding guideline.
llvm-svn: 148440
2012-01-19 00:06:10 +00:00
Jakob Stoklund Olesen
498e016c87 Add experimental -x86-use-regmask command line option.
It adds register mask operands to x86 call instructions.  Once all the
backend passes support register mask operands, this will be permanently
enabled.

llvm-svn: 148438
2012-01-18 23:52:22 +00:00
Jakob Stoklund Olesen
85ef53eb8d Ignore register mask operands when lowering instructions to MC.
This is similar to implicit register operands.  MC doesn't understand
register liveness and call clobbers.

llvm-svn: 148437
2012-01-18 23:52:19 +00:00
Jakob Stoklund Olesen
acb9eccef3 Add a RegisterMaskSDNode class.
This SelectionDAG node will be attached to call nodes by LowerCall(),
and eventually becomes a MO_RegisterMask MachineOperand on the
MachineInstr representing the call instruction.

LowerCall() will attach a register mask that depends on the calling
convention.

llvm-svn: 148436
2012-01-18 23:52:12 +00:00
Rafael Espindola
700f91def8 Add support for the gnueabihf environment. Patch by Sylvestre Ledru.
llvm-svn: 148434
2012-01-18 23:35:29 +00:00
Jim Grosbach
b7ab9edb4e Thumb2 alternate syntax for LDR(literal) and friends.
Explicit pc-relative syntax. For example, "ldrb r2, [pc, #-22]".

rdar://10250964

llvm-svn: 148432
2012-01-18 22:46:46 +00:00
Devang Patel
ee49d825b1 Process instructions after match to select alternative encoding which may be more desirable.
llvm-svn: 148431
2012-01-18 22:42:29 +00:00
Jim Grosbach
fc85e00ba5 Replace FIXME with explanatory comment.
llvm-svn: 148427
2012-01-18 22:04:42 +00:00
Jim Grosbach
a1e220fa82 Thumb2 relaxation for LDR(literal).
If the fixup is out of range for the Thumb1 instruction, relax it
to the Thumb2 encoding instead.

rdar://10711829

llvm-svn: 148424
2012-01-18 21:54:16 +00:00
Jim Grosbach
9de520d7ad MCAssembler tweak for determining when a symbol difference is resolved.
If the two fragments are in the same Atom, then the difference
expression is resolvable at compile time. Previously we were checking
that they were in the same fragment, but that breaks down in the
presence of instruction relaxation which has multiple fragments in the
same atom.

rdar://10711829

llvm-svn: 148423
2012-01-18 21:54:12 +00:00
Jim Grosbach
956279e57a Rename pattern for clarity.
llvm-svn: 148422
2012-01-18 21:54:09 +00:00
Dan Gohman
7e17e84f9c Add a depth limit to avoid runaway recursion.
llvm-svn: 148419
2012-01-18 21:24:45 +00:00
Dan Gohman
48f4e5752e Use llvm.global_ctors to locate global constructors instead
of recognizing them by name.

llvm-svn: 148416
2012-01-18 21:19:38 +00:00
Jakub Staszak
edd8e46c61 Remove trailing spaces and unneeded includes.
llvm-svn: 148415
2012-01-18 21:16:33 +00:00
Nadav Rotem
d5e875c776 Document the fact that the selection dag changes the vselect condition type
llvm-svn: 148411
2012-01-18 20:50:30 +00:00
Lang Hames
0958707826 Fixed macro condition.
llvm-svn: 148408
2012-01-18 19:48:31 +00:00
Jim Grosbach
fc0e8e0ba5 Tidy up. 80 columns.
llvm-svn: 148401
2012-01-18 18:52:20 +00:00
Jim Grosbach
f88f0b08c4 Tidy up. MCAsmBackend naming conventions.
llvm-svn: 148400
2012-01-18 18:52:16 +00:00
Bill Wendling
3820625bc1 Remove dead code.
llvm-svn: 148384
2012-01-18 10:10:28 +00:00
Nadav Rotem
afc446fbcb Fix a bug in the type-legalization of vector integers. When we bitcast one vector type to another, we must not bitcast the result if one type is widened while the other is promoted.
llvm-svn: 148383
2012-01-18 08:33:18 +00:00
Pete Cooper
a60db79835 Fix ISD::REG_SEQUENCE to accept physical registers and change TwoAddressInstructionPass to insert copies for any physical reg operands of the REG_SEQUENCE
llvm-svn: 148377
2012-01-18 04:16:16 +00:00
Jim Grosbach
b3bef2861c Thumb2 load/store fixups don't set the thumb bit.
Load/store instructions w/ a fixup to be relative a function marked as thumb
don't use the low bit to specify thumb vs. non-thumb like interworking
branches do, so don't set it when dealing with those fixups.

rdar://10348687.

llvm-svn: 148366
2012-01-18 00:40:25 +00:00
Jim Grosbach
700e5901a7 Move some ARM specific MCAssmebler bits into the ARMAsmBackend.
llvm-svn: 148364
2012-01-18 00:23:57 +00:00
Jakob Stoklund Olesen
e9c53bc69b Add a CoveredBySubRegs property to Register descriptions.
When set, this bit indicates that a register is completely defined by
the value of its sub-registers.

Use the CoveredBySubRegs property to infer which super-registers are
call-preserved given a list of callee-saved registers.  For example, the
ARM registers D8-D15 are callee-saved.  This now automatically implies
that Q4-Q7 are call-preserved.

Conversely, Win64 callees save XMM6-XMM15, but the corresponding
YMM6-YMM15 registers are not call-preserved because they are not fully
defined by their sub-registers.

llvm-svn: 148363
2012-01-18 00:16:39 +00:00
Daniel Dunbar
f17ae2a76a [lit] Add a --filter option which is useful when dealing with virtual test
paths.

llvm-svn: 148362
2012-01-18 00:03:12 +00:00
Jakub Staszak
50112641ee Remove unneeded include.
llvm-svn: 148360
2012-01-17 23:53:08 +00:00
Jakob Stoklund Olesen
057a8e7e4a Implement ARMBaseRegisterInfo::getCallPreservedMask().
Move ARM callee-saved lists into ARMCallingConv.td.

llvm-svn: 148357
2012-01-17 23:09:00 +00:00
Jim Grosbach
0693cfb2ae Fix MCJIT memory leak of owned TargetMachine.
The JIT is expected to take ownership of the TM that's passed in. The MCJIT
wasn't freeing it, resulting in leaks.

llvm-svn: 148356
2012-01-17 23:08:46 +00:00
Jakob Stoklund Olesen
fbb3f38a1a Move X86 callee saved register lists to the X86CallConv .td file.
Add a trivial implementation of the getCallPreservedMask() hook.

llvm-svn: 148347
2012-01-17 22:47:01 +00:00
Jakob Stoklund Olesen
c5fac0a05c Add TableGen support for callee saved registers.
Targets can now add CalleeSavedRegs defs to their *CallingConv.td file.
TableGen will use this to create a *_SaveList array suitable for
returning from getCalleeSavedRegs() as well as a *_RegMask bit mask
suitable for returning from getCallPreservedMask().

llvm-svn: 148346
2012-01-17 22:46:58 +00:00
Andrew Trick
345fe24275 Test case rename
llvm-svn: 148344
2012-01-17 22:27:45 +00:00
Jakub Staszak
2f69ff9223 Move includes to the .cpp file.
llvm-svn: 148342
2012-01-17 22:16:31 +00:00
Jim Grosbach
e6d2a7a097 MC tweak symbol difference resolution for non-local symbols.
When the non-local symbol in the expression is in the same fragment
as the second symbol, the assembler can still evaluate the expression
without needing a relocation.

For example, on ARM:
_foo:
	ldr lr, (_foo - 4)

rdar://10348687

llvm-svn: 148341
2012-01-17 22:14:39 +00:00
Jim Grosbach
095e519996 Tidy up.
llvm-svn: 148339
2012-01-17 22:03:42 +00:00
Devang Patel
e03a4f051f Intel syntax: Fix parser match class to check memory operand size.
llvm-svn: 148338
2012-01-17 21:48:03 +00:00
Nadav Rotem
c23e698b5c Transform: (EXTRACT_VECTOR_ELT( VECTOR_SHUFFLE )) -> EXTRACT_VECTOR_ELT.
llvm-svn: 148337
2012-01-17 21:44:01 +00:00
Devang Patel
4585b536ee Intel syntax: Parse "BYTE PTR [RDX + RCX]"
llvm-svn: 148334
2012-01-17 21:25:10 +00:00
Jakub Staszak
c3dc479049 Trailing spaces.
llvm-svn: 148332
2012-01-17 20:58:08 +00:00
Dan Gohman
9b37a5592c Add a new ObjC ARC optimization pass to eliminate unneeded
autorelease push+pop pairs.

llvm-svn: 148330
2012-01-17 20:52:24 +00:00
Dan Gohman
45976c3482 Add a new PassManagerBuilder customization point,
EP_ModuleOptimizerEarly, to allow passes to be added before the
main ModulePass optimizers.

llvm-svn: 148329
2012-01-17 20:51:32 +00:00