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Commit Graph

61386 Commits

Author SHA1 Message Date
Dan Gohman
b5ec637e57 Revert r106304 (105548 and friends), which are the SCEVComplexityCompare
optimizations. There is still some nondeterminism remaining.

llvm-svn: 106306
2010-06-18 19:54:20 +00:00
Bruno Cardoso Lopes
71ad64af39 Teach tablegen how to inherit from classes in 'defm' definitions.
The rule is simple: only inherit from a class list if they come
in the end, after the last multiclass.

llvm-svn: 106305
2010-06-18 19:53:41 +00:00
Dan Gohman
527b570925 Reapply 105540, 105542, and 105548, and revert r105732.
llvm-svn: 106304
2010-06-18 19:26:04 +00:00
Rafael Espindola
d7bfa3a0f7 Add a pass-through option to the plugin. The use case for this option is to
ask the linker to take another look into some library or object. The case when
one might want to do this is when codegen introduces a new undefined reference.
The canonical example is libgcc.

llvm-svn: 106303
2010-06-18 19:18:58 +00:00
Dan Gohman
75f6f94c48 Reapply 105546.
llvm-svn: 106302
2010-06-18 19:12:32 +00:00
Dan Gohman
ab895769a7 Reapply 105544.
llvm-svn: 106301
2010-06-18 19:09:27 +00:00
Dan Gohman
b220af45eb Add explicit keywords.
llvm-svn: 106300
2010-06-18 19:04:37 +00:00
Dale Johannesen
a441c8fd45 Enable tail calls on ARM by default, with some
basic tests.

This has been well tested on Darwin but not elsewhere.
It should work provided the linker correctly resolves
  B.W  <label in other function>
which it has not seen before, at least from llvm-based
compilers.  I'm leaving the arm-tail-calls switch in
until I see if there's any problems because of that;
it might need to be disabled for some environments.

llvm-svn: 106299
2010-06-18 19:00:18 +00:00
Dan Gohman
f03db5dcc6 Don't leak RegClass2VRegMap, which is now a new[] array instead of a
std::vector.

llvm-svn: 106298
2010-06-18 18:54:05 +00:00
Dan Gohman
1ccf40774e Start TargetRegisterClass indices at 0 instead of 1, so that
MachineRegisterInfo doesn't have to confusingly allocate an extra
entry.

llvm-svn: 106296
2010-06-18 18:13:55 +00:00
Dale Johannesen
9f18fc3fa2 Last round of changes for ARM tail calls.
Not turning them on yet.

llvm-svn: 106295
2010-06-18 18:13:11 +00:00
Jim Grosbach
60a3287950 Grammar.
llvm-svn: 106292
2010-06-18 17:40:42 +00:00
Bob Wilson
9af2272272 Fix PR7372: Conditional branches (at least on ARM) are treated as predicated,
so when IfConverter::CopyAndPredicateBlock checks to see if it should ignore
an instruction because it is a branch, it should not check if the branch is
predicated.

This case (when IgnoreBr is true) is only relevant from IfConvertTriangle,
where new branches are inserted after the block has been copied and predicated.
If the original branch is not removed, we end up with multiple conditional
branches (possibly conflicting) at the end of the block.  Aside from any
immediate errors resulting from that, this confuses the AnalyzeBranch functions
so that the branches are not analyzable.  That in turn causes the IfConverter to
think that the "Simple" pattern can be applied, and things go downhill fast
because the "Simple" pattern does _not_ apply if the block can fall through.

This is pretty fragile.  If there are other degenerate cases where AnalyzeBranch
fails, but where the block may still fall through, the IfConverter should not
perform its "Simple" if-conversion.  But, I don't know how to do that with the
current AnalyzeBranch interface, so for now, the best thing seems to be to
avoid creating branches that AnalyzeBranch cannot handle.

Evan, please review!

llvm-svn: 106291
2010-06-18 17:07:23 +00:00
Jakob Stoklund Olesen
6c387d99ca Treat the ARM inline asm {cc} constraint as a physreg (%CPSR), just like X86
does for {flags}. If we create virtual registers of the CCR class, RegAllocFast
may try to spill them, and we can't do that.

llvm-svn: 106289
2010-06-18 16:49:33 +00:00
Dan Gohman
0422fad3a6 Don't bother calling releaseMemory before destroying the DominatorTreeBase.
llvm-svn: 106287
2010-06-18 16:09:11 +00:00
Dan Gohman
07dc65e0b5 Minor code simplifications.
llvm-svn: 106286
2010-06-18 16:00:29 +00:00
Dan Gohman
6c6e9a45ff Give NamedRegionTimer an Enabled flag, allowing all its clients to
switch from this:

  if (TimePassesIsEnabled) {
    NamedRegionTimer T(Name, GroupName);
    do_something();
  } else {
    do_something(); // duplicate the code, this time without a timer!
  }

to this:

  {
    NamedRegionTimer T(Name, GroupName, TimePassesIsEnabled);
    do_something();
  }

llvm-svn: 106285
2010-06-18 15:56:31 +00:00
Dan Gohman
6670a7edea Don't replace the old Ordering object with a new one; just clear()
the old one.

llvm-svn: 106284
2010-06-18 15:40:58 +00:00
Dan Gohman
d3b13d1a68 Don't call clear() on DbgInfo when it's going to be deleted anyway.
Don't replace the old DbgInfo with a new one when clear() on the
old one is sufficient.

llvm-svn: 106283
2010-06-18 15:36:18 +00:00
Dan Gohman
e9dfb84007 Change UpdateNodeOperands' operand and return value from SDValue to
SDNode *, since it doesn't care about the ResNo value.

llvm-svn: 106282
2010-06-18 15:30:29 +00:00
Dan Gohman
e20e668c7e Remove getIntegerSCEV; it's redundant with getConstant, and getConstant
is more consistent with the ConstantInt API.

llvm-svn: 106281
2010-06-18 14:33:50 +00:00
Dan Gohman
9443053ec4 Delete unused variables.
llvm-svn: 106280
2010-06-18 14:32:32 +00:00
Dan Gohman
0b5b93b20d Eliminate unnecessary uses of getZExtValue().
llvm-svn: 106279
2010-06-18 14:22:04 +00:00
Dan Gohman
22ff84372b isValueValidForType can be a static member function.
llvm-svn: 106278
2010-06-18 14:01:07 +00:00
Eric Christopher
e60cfc56b0 Some assorted isTwoAddress -> Constraints cleanup.
llvm-svn: 106273
2010-06-18 02:41:19 +00:00
Dan Gohman
7bd41176cc Handle execution entrypoints with non-integer return types.
Fix from Russel Power in PR7284.

llvm-svn: 106271
2010-06-18 02:01:10 +00:00
Dan Gohman
6c3d683d19 Don't write a file named "&1".
llvm-svn: 106269
2010-06-18 01:49:17 +00:00
Dan Gohman
e375e96f0d Disable indvars on loops when LoopSimplify form is not available.
This fixes PR7333.

llvm-svn: 106267
2010-06-18 01:35:11 +00:00
Dan Gohman
9d7cf23808 Don't maintain a set of deleted nodes; instead, use a HandleSDNode
to track a node over CSE events. This fixes PR7368.

llvm-svn: 106266
2010-06-18 01:24:29 +00:00
Bruno Cardoso Lopes
ea44492375 Add {mix,max}{ss,sd}{rr,rm} AVX forms.
llvm-svn: 106264
2010-06-18 01:12:56 +00:00
Dan Gohman
8185674354 Fold the ShrinkDemandedOps pass into the regular DAGCombiner pass,
which is faster, simpler, and less surprising.

llvm-svn: 106263
2010-06-18 01:05:21 +00:00
Dan Gohman
eab6b51039 Fix a typo in a comment.
llvm-svn: 106260
2010-06-18 00:53:08 +00:00
Chris Lattner
13d8fea770 improve portability to solaris 10, PR7380, patch by Simon Billingsley!
llvm-svn: 106259
2010-06-18 00:35:32 +00:00
Dan Gohman
57046ca982 Handle ext(ext(x)) -> ext(x) immediately, since it's simple.
llvm-svn: 106256
2010-06-18 00:08:30 +00:00
Dan Gohman
08da31dc83 Make this test less fragile.
llvm-svn: 106255
2010-06-18 00:06:03 +00:00
Dan Gohman
1d9d93381a Simplify this code.
llvm-svn: 106254
2010-06-17 23:34:09 +00:00
Bruno Cardoso Lopes
4cbdbd5501 Use new tablegen resources in SSE tablegen code. This will
be done incrementally and intermixed with the adding of more
AVX instructions. This is a first step in that direction

llvm-svn: 106251
2010-06-17 23:05:30 +00:00
Bruno Cardoso Lopes
417b376bd2 In case Rec is a definition and not a class, do the proper comparison!
llvm-svn: 106246
2010-06-17 23:00:16 +00:00
Stuart Hastings
bd7194d21c Add a DebugLoc parameter to TargetInstrInfo::InsertBranch(). This
addresses a longstanding deficiency noted in many FIXMEs scattered
across all the targets.

This effectively moves the problem up one level, replacing eleven
FIXMEs in the targets with eight FIXMEs in CodeGen, plus one path
through FastISel where we actually supply a DebugLoc, fixing Radar
7421831.

llvm-svn: 106243
2010-06-17 22:43:56 +00:00
Dan Gohman
40c17ca0db Minor clarification.
llvm-svn: 106234
2010-06-17 19:23:50 +00:00
Jim Grosbach
ac23214fd8 add missing break. inconsequential as the code shouldn't be reached, but
for correctness' sake, it should be there.

llvm-svn: 106229
2010-06-17 17:58:54 +00:00
Jim Grosbach
99b7091d9d Add entries for Expanding atomic intrinsics to libcalls. Just a placeholder
for the moment. The implementation of the libcall will follow.

Currently, the llvm-gcc knows when the intrinsics can be correctly handled by
the back end and only generates them in those cases, issuing libcalls directly
otherwise. That's too much coupling. The intrinsics should always be
generated and the back end decide how to handle them, be it with a libcall,
inline code, or whatever. This patch is a step in that direction.

rdar://8097623

llvm-svn: 106227
2010-06-17 17:50:54 +00:00
Dale Johannesen
6b62a54841 Testcase for llvm-gcc 106225.
llvm-svn: 106226
2010-06-17 17:43:14 +00:00
Rafael Espindola
d7a63bead9 Remove arm_apcscc from the test files. It is the default and doing this
matches what llvm-gcc and clang now produce.

llvm-svn: 106221
2010-06-17 15:18:27 +00:00
Douglas Gregor
5d2a26361d Allow absolute paths in LLVM_TARGET_DEFINITIONS for CMake's TableGen rule
llvm-svn: 106219
2010-06-17 15:17:07 +00:00
Nate Begeman
b94f5f1d97 Modify tablegen to support generating all NEON code used by clang at once.
llvm-svn: 106207
2010-06-17 04:15:13 +00:00
Jim Grosbach
f3f401f911 Thumb1 and any pre-v6 ARM target should use the libcall expansion of
ISD::MEMBARRIER. v7 and v7 ARM mode continue to use the custom lowering.

llvm-svn: 106204
2010-06-17 02:02:03 +00:00
Jim Grosbach
0cdb6c563a ISD::MEMBARRIER should lower to a libcall (__sync_synchronize) if the target
sets the legalize action to Expand.

llvm-svn: 106203
2010-06-17 02:00:53 +00:00
Bruno Cardoso Lopes
bb6aa785be Fix the handling of !if result, avoiding null results for non 'int'.
llvm-svn: 106201
2010-06-17 01:50:39 +00:00
Jim Grosbach
8d77e0298c simplify code a bit and add a more explanatory assert for cases that
previously would result in 'cannot yet select' errors.

llvm-svn: 106199
2010-06-17 01:37:00 +00:00