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Commit Graph

61827 Commits

Author SHA1 Message Date
Dan Gohman
b7fc09a156 Improve ScalarEvolution's nsw and nuw preservation.
llvm-svn: 107257
2010-06-30 07:16:37 +00:00
Dan Gohman
7446416058 When computing a new ConservativeResult, intersect it with
the old one instead of replacing it, to be more precise.

llvm-svn: 107256
2010-06-30 06:58:35 +00:00
Dan Gohman
2112bbf184 Rework scev-aa's basic computation so that it doesn't depend
on ScalarEvolution successfully folding and preserving
range information for both A-B and B-A. Now, if it gets
either one, it's sufficient.

llvm-svn: 107249
2010-06-30 06:12:16 +00:00
Dan Gohman
01304ebfad Simplify.
llvm-svn: 107248
2010-06-30 06:09:46 +00:00
Bruno Cardoso Lopes
39594cc5d0 Add AVX SSE2 integer unpack instructions
llvm-svn: 107246
2010-06-30 04:06:39 +00:00
Bruno Cardoso Lopes
419f8f29c3 Add AVX SSE2 packed integer shuffle instructions
llvm-svn: 107245
2010-06-30 03:47:56 +00:00
John Mosby
1e4673d2d7 Remove trailing whitespace, no functionality changes.
llvm-svn: 107244
2010-06-30 03:40:54 +00:00
Bruno Cardoso Lopes
c2f5cd2389 Small refactoring of SSE2 packed integer shuffle instructions
llvm-svn: 107243
2010-06-30 03:29:36 +00:00
Bruno Cardoso Lopes
d9acb34aa2 Add AVX SSE2 pack with saturation integer instructions
llvm-svn: 107241
2010-06-30 02:30:25 +00:00
Bruno Cardoso Lopes
c470ba9937 Add AVX SSE2 integer packed compare instructions
llvm-svn: 107240
2010-06-30 02:21:09 +00:00
Bruno Cardoso Lopes
cfbebb3921 - Add AVX form of all SSE2 logical instructions
- Add VEX encoding bits to x86 MRM0r-MRM7r

llvm-svn: 107238
2010-06-30 01:58:37 +00:00
Devang Patel
00ee7ba38c Do not construct DIE for already processed MDNode.
llvm-svn: 107237
2010-06-30 01:40:11 +00:00
Jakob Stoklund Olesen
89ffbab6ef Use skipInstruction() as a simpler way of iterating over instructions using SrcReg
llvm-svn: 107234
2010-06-30 00:30:36 +00:00
Jakob Stoklund Olesen
d5d744567a Use clEnumValN macro to work around keyword clash
llvm-svn: 107233
2010-06-30 00:24:51 +00:00
Devang Patel
93e5e9bd19 Add variables into a scope before constructing scope DIE otherwise variables won't be included DIE tree.
llvm-svn: 107228
2010-06-30 00:11:08 +00:00
Jakob Stoklund Olesen
8918e475af Begin implementation of an inline spiller.
InlineSpiller inserts loads and spills immediately instead of deferring to
VirtRegMap. This is possible now because SlotIndexes allows instructions to be
inserted and renumbered.

This is work in progress, and is mostly a copy of TrivialSpiller so far. It
works very well for functions that don't require spilling.

llvm-svn: 107227
2010-06-29 23:58:39 +00:00
Bruno Cardoso Lopes
2439877e05 Add *several* AVX integer packed binop instructions
llvm-svn: 107225
2010-06-29 23:47:49 +00:00
Dan Gohman
32534063c7 Fix ScalarEvolution's tripcount computation for chains of loops
where each loop's induction variable's start value is the exit
value of a preceding loop.

llvm-svn: 107224
2010-06-29 23:43:06 +00:00
Bill Wendling
59ef9bcc6d Revert r107205 and r107207.
llvm-svn: 107215
2010-06-29 22:34:52 +00:00
Devang Patel
6d7cc07644 Print InlinedAt location.
llvm-svn: 107214
2010-06-29 22:29:15 +00:00
Eric Christopher
4c54014a1e Add another bswap idiom that isn't matched.
llvm-svn: 107213
2010-06-29 22:22:22 +00:00
Bill Wendling
9dd05b0bf0 Use -l option to remove symbols from i386.
llvm-svn: 107212
2010-06-29 22:17:37 +00:00
Bruno Cardoso Lopes
b80121d316 Move SSE2 Packed Integer instructions around, and create specific sections for each of them
llvm-svn: 107211
2010-06-29 22:12:16 +00:00
Devang Patel
1fbf5e861e Print InlinedAt location.
llvm-svn: 107208
2010-06-29 21:51:32 +00:00
Bill Wendling
462de20dd8 Improve explanation.
llvm-svn: 107207
2010-06-29 21:41:58 +00:00
Bruno Cardoso Lopes
45e0ab4762 Add AVX Move Aligned/Unaligned packed integers
llvm-svn: 107206
2010-06-29 21:25:12 +00:00
Bill Wendling
05a4c0b1f2 Introducing the "linker_weak" linkage type. This will be used for Objective-C
metadata types which should be marked as "weak", but which the linker will
remove upon final linkage. For example, the "objc_msgSend_fixup_alloc" symbol is
defined like this:

       .globl l_objc_msgSend_fixup_alloc
       .weak_definition l_objc_msgSend_fixup_alloc
       .section __DATA, __objc_msgrefs, coalesced
       .align 3
l_objc_msgSend_fixup_alloc:
        .quad   _objc_msgSend_fixup
        .quad   L_OBJC_METH_VAR_NAME_1

This is different from the "linker_private" linkage type, because it can't have
the metadata defined with ".weak_definition".

llvm-svn: 107205
2010-06-29 21:24:00 +00:00
Bruno Cardoso Lopes
e1b05180de Add AVX ld/st XCSR register.
Add VEX encoding bits for MRMXm x86 form

llvm-svn: 107204
2010-06-29 20:35:48 +00:00
Devang Patel
8052c941ca Do not hardcode DW_AT_stmt_list value.
Inspired by Artur Pietrek.

llvm-svn: 107202
2010-06-29 20:17:53 +00:00
Bob Wilson
1b4210315e Add support for encoding VDUP (ARM core register) instructions.
llvm-svn: 107201
2010-06-29 20:13:29 +00:00
Duncan Sands
73b36f31d7 Fix a buffer overflow noticed by gcc-4.6: zero is written into
SmallArray[SmallSize] in the SmallPtrSetIteratorImpl, and this is
one off the end of the array.  For those who care, right now gcc
warns about writing off the end because it is confused about the
declaration of SmallArray as having length 1 in the parent class
SmallPtrSetIteratorImpl.  However if you tweak code to unconfuse
it, then it still warns about writing off the end of the array,
because of this buffer overflow.  In short, even with this fix
gcc-4.6 will warn about writing off the end of the array, but now
that is only because it is confused.

llvm-svn: 107200
2010-06-29 20:12:02 +00:00
Duncan Sands
4828790444 NextPowerOfTwo was already used to ensure that SmallSizePowTwo is a power
of two, no need to do it a second time (NextPowerOfTwo is idempotent).

llvm-svn: 107199
2010-06-29 20:05:34 +00:00
Chris Lattner
85e698ca16 give PATypeHolder an explicit copy ctor which initializes the type pointer,
and make PATypeHolder work with null pointers.

The implicitly generated one didn't work on numerous levels, but was still
accepted, allowing all sorts of bugs with default constructed pa type holders.

Previously, they "sort of" worked if they were default constructed and then
destructed.  Now they really work, and you can even default construct one,
then assign to it, amazing.

llvm-svn: 107195
2010-06-29 19:20:38 +00:00
Jakob Stoklund Olesen
fff50dd31d Fix the handling of partial redefines in the fast register allocator.
A partial redefine needs to be treated like a tied operand, and the register
must be reloaded while processing use operands.

This fixes a bug where partially redefined registers were processed as normal
defs with a reload added. The reload could clobber another use operand if it was
a kill that allowed register reuse.

llvm-svn: 107193
2010-06-29 19:15:30 +00:00
Bob Wilson
ef26313c6b Fix a register scavenger crash when dealing with undefined subregs.
The LowerSubregs pass needs to preserve implicit def operands attached to
EXTRACT_SUBREG instructions when it replaces those instructions with copies.

llvm-svn: 107189
2010-06-29 18:42:49 +00:00
Bruno Cardoso Lopes
e60533aa42 Add AVX non-temporal stores
llvm-svn: 107178
2010-06-29 18:22:01 +00:00
Dan Gohman
338d04a2dd Add a few more interesting testcases.
llvm-svn: 107177
2010-06-29 18:17:11 +00:00
Dan Gohman
1c9ce3e66d Fix whitespace style.
llvm-svn: 107175
2010-06-29 18:12:34 +00:00
Bruno Cardoso Lopes
4731169504 Move non-temporal movs to their own section
llvm-svn: 107168
2010-06-29 17:42:37 +00:00
Bob Wilson
be81c92b41 Add support for encoding NEON VMOV (from core register to scalar) instructions.
The encoding is the same as VMOV (from scalar to core register) except that
the operands are in different places.

llvm-svn: 107167
2010-06-29 17:34:07 +00:00
Bruno Cardoso Lopes
2dca1dd168 Add sqrt, rsqrt and rcp AVX instructions
llvm-svn: 107166
2010-06-29 17:26:30 +00:00
Jim Grosbach
151bec3c2d skip dbg_value instructions
llvm-svn: 107154
2010-06-29 16:55:24 +00:00
Gabor Greif
6ecf606379 minor cosmetics
llvm-svn: 107148
2010-06-29 16:27:38 +00:00
Bob Wilson
74996289e3 The t2MOVi16 and t2MOVTi16 instructions do not set CPSR. Trying to add
a CPSR operand to them causes an assertion failure, so apparently these
instructions haven't been getting a lot of use.

llvm-svn: 107147
2010-06-29 16:25:11 +00:00
Gabor Greif
c84c81085c use ArgOffset constant to prepare for operand rotation
llvm-svn: 107146
2010-06-29 16:21:20 +00:00
Gabor Greif
50741043d0 use ArgOperand API
llvm-svn: 107145
2010-06-29 16:17:26 +00:00
Gabor Greif
e82ec778a2 use ArgOperand API
llvm-svn: 107144
2010-06-29 16:01:30 +00:00
Duncan Sands
2f42c8716a Return Changed. This required setting Changed if dbg metadata
is stripped off.  Currently set unconditionally, since the API
does not provide a way of working out if anything was actually
stripped off.

llvm-svn: 107142
2010-06-29 14:52:10 +00:00
Duncan Sands
07e9b76b61 It seems clear that this should return Changed.
llvm-svn: 107141
2010-06-29 14:49:35 +00:00
Rafael Espindola
832e4ddde7 Add a VT argument to getMinimalPhysRegClass and replace the copy related uses
of getPhysicalRegisterRegClass with it.

If we want to make a copy (or estimate its cost), it is better to use the
smallest class as more efficient operations might be possible.

llvm-svn: 107140
2010-06-29 14:02:34 +00:00