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Commit Graph

123851 Commits

Author SHA1 Message Date
Mike Aizatsky
bc4d11920b enabling sancov tests on linux x86_64 only
Differential Revision: http://reviews.llvm.org/D14728

llvm-svn: 253354
2015-11-17 18:25:21 +00:00
Charlie Turner
e780735f3d [ARM] Don't pessimize i32 vselect.
The underlying issues surrounding codegen for 32-bit vselects have been resolved. The pessimistic costs for 64-bit vselects remain due to the bad
scalarization that is still happening there.

I tested this on A57 in T32, A32 and A64 modes. I saw no regressions, and some improvements.

From my benchmarks, I saw these improvements in A57 (T32)
spec.cpu2000.ref.177_mesa 5.95%
lnt.SingleSource/Benchmarks/Shootout/strcat 12.93%
lnt.MultiSource/Benchmarks/MiBench/telecomm-CRC32/telecomm-CRC32 11.89%

I also measured A57 A32, A53 T32 and A9 T32 and found no performance regressions. I see much bigger wins in third-party benchmarks with this change

Differential Revision: http://reviews.llvm.org/D14743

llvm-svn: 253349
2015-11-17 17:25:15 +00:00
Sanjay Patel
b04539d10d function names start with a lower case letter; NFC
llvm-svn: 253348
2015-11-17 17:24:08 +00:00
Pawel Bylica
0fc3130a5d [Support] Tweak path::system_temp_directory() on Windows.
Summary:
This patch changes the behavior of path::system_temp_directory() on Windows to be closer to GetTempPath Windows API call. Enforces path separator to be the native one, makes path absolute, etc. GetTempPath is not used directly because of limitations/implementation bugs on Windows 7.

Windows specific unit tests are added. Most of them runs in separated process with modified environment variables.

This change fixes FileSystemTest.CreateDir unittest that had been failing when run from Unix-like shell on Windows (Unix-like path separator (/) used in env variables).

Reviewers: chapuni, rafael, aaron.ballman

Subscribers: rafael, llvm-commits

Differential Revision: http://reviews.llvm.org/D14231

llvm-svn: 253345
2015-11-17 16:54:32 +00:00
Ahmed Bougacha
d95c336de2 [AArch64] Promote f16 SELECT_CC CC operands when op is legal.
SELECT_CC has the nasty property of having operands with unrelated
types. So if you do something like:

  f32 = select_cc f16, f16, f32, f32, cc

You'd only look for the action for <select_cc, f32>, but never f16.
If the types are all legal, but the op isn't (as for f16 on AArch64,
or for f128 on x86_64/AArch64?), then you get into trouble.
For f128, we have softenSetCCOperands to handle this case.

Similarly, for f16, we can directly promote the CC operands.

llvm-svn: 253344
2015-11-17 16:45:40 +00:00
Davide Italiano
91e9f5a86b [llvm-rtdyld] Don't waste cycles invalidating instruction cache.
Now that setExecutable() changed to do all the ground work to make
memory executable on the host, we can remove all (redundant) calls
to invalidate instruction cache here.

As an added bonus, this makes invalidateInstructionCache() dead
code, so it can be removed.

Differential Revision:	http://reviews.llvm.org/D13631

llvm-svn: 253343
2015-11-17 16:37:52 +00:00
Davide Italiano
21d1263e5d [JIT/Memory] Fix up semantic of setExecutable().
setExecutable() should do everything that's needed to make the memory
executable on host, i.e. unconditionally set permissions + invalidate
instruction cache. llvm-rtdyld will be updated in my next commit.

Discusseed with: Lang Hames (as part of D13631).

llvm-svn: 253341
2015-11-17 16:34:28 +00:00
Dan Gohman
5b4abaf577 Update DebugInfo tests for the change in DEBUG_VALUE output in r253338.
llvm-svn: 253340
2015-11-17 16:15:11 +00:00
Pat Gavlin
189930fea1 Lower statepoints with multi-def targets.
Statepoint lowering currently expects that the target method of a
statepoint only defines a single value. This precludes using
statepoints with ABIs that return values in multiple registers
(e.g. the SysV AMD64 ABI). This change adds support for lowering
statepoints with mutli-def targets.

llvm-svn: 253339
2015-11-17 16:04:21 +00:00
Dan Gohman
3ee3e60f77 Use TargetRegisterInfo for printing MachineOperand register comments
Several places in AsmPrinter.cpp print comments describing MachineOperand
registers using MCRegisterInfo, which uses MCOperand-oriented names. This
doesn't work for targets that use virtual registers exclusively, as
WebAssembly does, since virtual registers are represented and printed
differently.

This patch preserves what seems to be the spirit of r229978, avoiding the
use of TM.getSubtargetImpl(), while still using MachineOperand-oriented
printing for MachineOperands.

Differential Revision: http://reviews.llvm.org/D14709

llvm-svn: 253338
2015-11-17 16:01:28 +00:00
Chad Rosier
1d3f2c21a9 Typo.
llvm-svn: 253336
2015-11-17 13:58:10 +00:00
Bradley Smith
bda2f01de3 [ARM] Default to ARMv4t in favour of adding Other to ARMArch
llvm-svn: 253335
2015-11-17 13:38:29 +00:00
Charlie Turner
3c36dcad72 [ARM] Match VABDL from log2 shuffles.
Differential Revision: http://reviews.llvm.org/D14664

llvm-svn: 253334
2015-11-17 13:21:35 +00:00
Zlatko Buljan
032cc29f2d [mips][microMIPS] Implement EXTP, EXTPDP, EXTPDPV, EXTPV, EXTR[_RS].W, EXTR_S.H, EXTRV[_RS].W and EXTRV_S.H instructions
Differential Revision: http://reviews.llvm.org/D14174

llvm-svn: 253332
2015-11-17 12:54:15 +00:00
Bradley Smith
73a323728d [ARM] Properly initialize ARMArch in the ARM subtarget
llvm-svn: 253331
2015-11-17 11:57:33 +00:00
Zlatko Buljan
34fd81a33f [mips][microMIPS] Implement SUBQ[_S].PH, SUBQ_S.W, SUBQH[_R].PH, SUBQH[_R].W, SUBU[_S].PH, SUBU[_S].QB and SUBUH[_R].QB instructions
Differential Revision: http://reviews.llvm.org/D14114

llvm-svn: 253329
2015-11-17 10:11:22 +00:00
Oliver Stannard
e538054e6d [Assembler] Make fatal assembler errors non-fatal
Currently, if the assembler encounters an error after parsing (such as an
out-of-range fixup), it reports this as a fatal error, and so stops after the
first error. However, for most of these there is an obvious way to recover
after emitting the error, such as emitting the fixup with a value of zero. This
means that we can report on all of the errors in a file, not just the first
one. MCContext::reportError records the fact that an error was encountered, so
we won't actually emit an object file with the incorrect contents.

Differential Revision: http://reviews.llvm.org/D14717

llvm-svn: 253328
2015-11-17 10:00:43 +00:00
Oliver Stannard
90a74252e6 [Assembler] Allow non-fatal errors after parsing
This adds reportError to MCContext, which can be used as an alternative to
reportFatalError when the assembler wants to try to continue processing the
rest of the file after the error is reported, so that all of the errors ina
file can be reported. It records the fact that an error was encountered, so we
can avoid emitting an object file if any errors occurred.

This patch doesn't add any uses of this function (a later patch will convert
most uses of reportFatalError to use it), but there is a small functional
change: we use the SourceManager to print the error message, even if we have a
null SMLoc. This means that we get a SourceManager-style message, with the file
and line information shown as <unknown>, rather than the "LLVM ERROR" style
used by report_fatal_error.

llvm-svn: 253327
2015-11-17 09:58:07 +00:00
Zlatko Buljan
5a9f3e5e1f [mips][microMIPS] Implement PRECEQ.W.PHL, PRECEQ.W.PHR, PRECEQU.PH.QBL, PRECEQU.PH.QBLA, PRECEQU.PH.QBR, PRECEQU.PH.QBRA, PRECEU.PH.QBL, PRECEU.PH.QBLA, PRECEU.PH.QBR and PRECEU.PH.QBRA instructions
Differential Revision: http://reviews.llvm.org/D14279

llvm-svn: 253326
2015-11-17 09:43:29 +00:00
Jay Foad
bdde8e00f5 Fix typos in comments.
llvm-svn: 253324
2015-11-17 08:54:53 +00:00
David Majnemer
7fe7d83fab [AliasAnalysis] CatchPad and CatchRet can modify escaped memory
CatchPad and CatchRet behave a lot like function calls: they can
potentially modify any memory which has been escaped.

llvm-svn: 253323
2015-11-17 08:15:14 +00:00
David Majnemer
65cf51d29b Fix a typo in BasicAliasAnalysis
llvm-svn: 253322
2015-11-17 08:15:08 +00:00
Igor Breger
f0cc44d6b9 AVX512 : regenerate the test file against trunk.
Differential Revision: http://reviews.llvm.org/D14742

llvm-svn: 253321
2015-11-17 08:03:43 +00:00
Zlatko Buljan
7e062ffc7d Added microMIPSDSPr1 assembler and disassembler tests to existing microMIPSDSPr2 test files.
llvm-svn: 253320
2015-11-17 07:58:27 +00:00
Rafael Espindola
b080f6e9fc Add MemoryBufferRef(MemoryBuffer&) constructor.
patch by Jonathan Anderson!

llvm-svn: 253311
2015-11-17 05:11:44 +00:00
Xinliang David Li
192e197bb7 Fix unaligned memory read issue exposed by ubsan
Indexed profile data as designed today does not guarantee
counter data to be well aligned, so reading needs to use
the slower form (with memcpy). This is less than ideal and 
should be improved in the future (i.e., with fixed length
function key instead of variable length name key).

llvm-svn: 253309
2015-11-17 03:47:21 +00:00
Davide Italiano
2537f35175 [Documentation] Add guidelines for grouping tests together.
This was considered a good practice but it was not documented. Now it is.

Differential Revision:	http://reviews.llvm.org/D14733

llvm-svn: 253281
2015-11-17 02:17:35 +00:00
Rafael Espindola
47008fdea7 Drop prelink support.
The way prelink used to work was

* The compiler decides if a given section only has relocations that
are know to point to the same DSO. If so, it names it
.data.rel.ro.local<something>.
* The static linker puts all of these together.
* The prelinker program assigns addresses to each library and resolves
the local relocations.

There are many problems with this:
* It is incompatible with address space randomization.
* The information passed by the compiler is redundant. The linker
knows if a given relocation is in the same DSO or not. If could sort
by that if so desired.
* There are newer ways of speeding up DSO (gnu hash for example).
* Even if we want to implement this again in the compiler, the previous
  implementation is pretty broken. It talks about relocations that are
  "resolved by the static linker". If they are resolved, there are none
  left for the prelinker. What one needs to track is if an expression
  will require only dynamic relocations that point to the same DSO.

At this point it looks like the prelinker is an historical curiosity.
For example, fedora has retired it because it failed to build for two
releases
(http://pkgs.fedoraproject.org/cgit/prelink.git/commit/?id=eb43100a8331d91c801ee3dcdb0a0bb9babfdc1f)

This patch removes support for it. That is, it stops printing the
".local" sections.

llvm-svn: 253280
2015-11-17 00:51:23 +00:00
Matthias Braun
088a172bf6 Assume lane masks are always precise
Allowing imprecise lane masks in case of more than 32 sub register lanes
lead to some tricky corner cases, and I need another bugfix for another
one. Instead I rather declare lane masks as precise and let tablegen
abort if we do not have enough bits.

This does not affect any in-tree target, even AMDGPU only needs 16 lanes
at the moment. If the 32 lanes turn out to be a problem in the future,
then we can easily change the LaneBitmask typedef to uint64_t.

Differential Revision: http://reviews.llvm.org/D14557

llvm-svn: 253279
2015-11-17 00:50:55 +00:00
David Blaikie
11eb1233c6 Fix indentation
llvm-svn: 253278
2015-11-17 00:41:02 +00:00
David Blaikie
ff19b0c37b dwarfdump: Use the index to find the right abbrev offset in DWP files
llvm-svn: 253277
2015-11-17 00:39:55 +00:00
Derek Schuff
a4a11379be [WebAssembly] Fix printing of global operands
This was regressed in r252656 which wasn't quite NFC. Instead of using a
custom instruction as before, use a pattern to select CONST_I32 for the
global addrs.

Differential Revision: http://reviews.llvm.org/D14587

llvm-svn: 253276
2015-11-17 00:20:44 +00:00
Philip Reames
577e9b1072 [PRE] Preserve !invariant.load metadata
Spoted via inspection.  Test case included.

llvm-svn: 253275
2015-11-17 00:15:09 +00:00
Simon Pilgrim
ee15a8e627 [X86][SSE] Merged BLEND shuffle decode comments. NFC.
Now that we can recognise different vector sizes.

llvm-svn: 253268
2015-11-16 23:03:18 +00:00
David Blaikie
f8dffcf9b0 Demote a single-use named function object to a lambda
llvm-svn: 253267
2015-11-16 22:56:30 +00:00
Simon Pilgrim
5f04fb3d70 [X86][SSE] Merged ALIGNR/SLLDQ/SRLDQ shuffle decode comments. NFC.
Now that we can recognise different vector sizes - will make future AVX512 additions easier.

llvm-svn: 253266
2015-11-16 22:54:41 +00:00
Simon Pilgrim
4f1e38945c [X86][SSE] Merged SHUF/PERM shuffle decode comments. NFC.
Now that we can recognise different vector sizes - will make future AVX512 additions easier.

llvm-svn: 253260
2015-11-16 22:39:27 +00:00
Simon Pilgrim
d63d2fad82 [X86][SSE] Merged UNPCK shuffle decode comments. NFC.
Now that we can recognise different vector sizes - will make future AVX512 additions easier.

llvm-svn: 253258
2015-11-16 22:21:10 +00:00
Sanjay Patel
36f22e5dda use range-based for loop; NFCI
llvm-svn: 253256
2015-11-16 22:16:52 +00:00
Stephen Canon
517872001b Add isInteger() to APFloat.
Useful utility function; this wasn't too hard to do before, but also wasn't
obviously discoverable.  Make it explicit.  Reviewed offline by Michael
Gottesman.

llvm-svn: 253254
2015-11-16 21:52:48 +00:00
Michael Zolotukhin
1bc5fae202 [PR25538]: Fix a failure caused by r253126.
In r253126 we stopped to recompute LCSSA after loop unrolling in all
cases, except the unrolling is full and at least one of the loop exits
is outside the parent loop. In other cases the transformation should not
break LCSSA, but it turned out, that we also call SimplifyLoop on the
parent loop, which might break LCSSA by itself. This fix just triggers
LCSSA recomputation in this case as well.

I'm committing it without a test case for now, but I'll try to invent
one. It's a bit tricky because in an isolated test LoopSimplify would
be scheduled before LoopUnroll, and thus will change the test and hide
the problem.

llvm-svn: 253253
2015-11-16 21:17:26 +00:00
Derek Schuff
a288942d7d [WebAssembly] Fix function return type printing
Summary:
Previously return type information for a function was derived from
return dag nodes. But this didn't work for dags with != return node. So
instead compute it directly from the LLVM function as is done for imports.

Differential Revision: http://reviews.llvm.org/D14593

llvm-svn: 253251
2015-11-16 21:12:41 +00:00
Derek Schuff
bd98758dfe [WebAssembly] Reverse the order of operands for br_if
Summary: This is to match the new version in the spec

Reviewers: sunfish

Subscribers: jfb, llvm-commits, dschuff

Differential Revision: http://reviews.llvm.org/D14519

llvm-svn: 253249
2015-11-16 21:04:51 +00:00
David Majnemer
8fe3484899 [IR] Manage TheNoneToken with a std::unique_ptr
Hopefully, this will make the sanitizer build bots happy.

llvm-svn: 253248
2015-11-16 20:55:57 +00:00
Kit Barton
1bc0b4ec67 Find available scratch register to use in function prologue and epilogue as part of shrink wrapping.
Phabricator: http://reviews.llvm.org/D13955
llvm-svn: 253247
2015-11-16 20:22:15 +00:00
Reid Kleckner
d9dbfe296b [WinEH] Don't let UnwindHelp alias the return address
On top of that, don't bother allocating and initializing UnwindHelp if
we don't have any funclets. Currently we always use RBP as our frame
pointer when funclets are present, so this change makes it impossible to
come here without any fixed stack objects.

Fixes PR25533.

llvm-svn: 253245
2015-11-16 18:47:25 +00:00
Reid Kleckner
473e0cc7f6 Use the subtarget reference that we already have
llvm-svn: 253244
2015-11-16 18:47:12 +00:00
Owen Anderson
4d5ef8fb85 Add intermediate subtract instructions to reassociation worklist.
We sometimes create intermediate subtract instructions during
reassociation.  Adding these to the worklist to revisit exposes many
additional reassociation opportunities.

Patch by Aditya Nandakumar.

llvm-svn: 253240
2015-11-16 18:07:30 +00:00
David Majnemer
723dbfed60 [LoopStrengthReduce] Don't increment iterator past the end of the BB
We tried to move the insertion point beyond instructions like landingpad
and cleanuppad.
However, we *also* tried to move past catchpad.  This is problematic
because catchpad is also a terminator.

This fixes PR25541.

llvm-svn: 253238
2015-11-16 17:37:58 +00:00
Vasileios Kalintiris
21cad2df6b [mips] Disable code generation through FastISel for MIPS32R6.
Reviewers: dsanders

Subscribers: llvm-commits, dsanders

Differential Revision: http://reviews.llvm.org/D14708

llvm-svn: 253225
2015-11-16 17:05:01 +00:00