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104026 Commits

Author SHA1 Message Date
NAKAMURA Takumi
bc730b170e Instruction::isIdenticalToWhenDefined(): Check getNumOperands() in advance of std::equal(op) to appease MSVC Debug build.
MSVC Debug build is confused with (possibly invalid) op_begin(), if op_begin() == op_end().

llvm-svn: 210000
2014-06-02 01:35:34 +00:00
Saleem Abdulrasool
80b2be2884 Support: add 6-parameter format
Since we cannot yet use variadic templates, add a specialisation for
6-parameters to format.  This is motivated by a need for the additional
parameter for formatting information for an unwind decoder for Windows on ARM.

llvm-svn: 209999
2014-06-02 01:17:54 +00:00
Saleem Abdulrasool
d2570c483b Support: add Windows ARM EH data structures
Introduce the support structures necessary to deal with the Windows ARM EH data.
These definitions are extremely aggressive about assertions to aid future use
for generation of the entries and subsequent decoding.

The names for the various fields are meant to reflect the names used by the
Visual Studio toolchain to aid communication.

Due to the complexity in reading a few of the values, there are a couple of
additional utility functions to decode the information.

In general, there are two ways to encode the unwinding information:
- packed, which places the data inline into the
  _IMAGE_ARM_RUNTIME_FUNCTION_ENTRY structure.
- unpacked, which places the data into auxiliary structures placed into the
  .xdata section.

The set of structures allow reading of data in either encoding, with the minor
caveat that epilogue scopes need to be decoded manually by constructing the
structure from the data returned by the RuntimeFunction structure.

These definitions are meant for read-only access at the current point as the
first use of them will be to decode the exception information.

llvm-svn: 209998
2014-06-02 01:17:49 +00:00
Christian Pirker
6d4cce97f1 ARMEB: Fix function return type f64
Reviewed at http://reviews.llvm.org/D3968

llvm-svn: 209990
2014-06-01 09:30:52 +00:00
Elena Demikhovsky
f929df2d1e Updates in IntelJITEventListener.cpp - by Arch Robison.
This patch updates IntelJITEventListener.cpp to account for revision 206654, which removed some methods from DILineInfo.

llvm-svn: 209989
2014-06-01 08:45:11 +00:00
Matt Arsenault
a36a2916ac R600: Set all float vector expands in the same place
llvm-svn: 209988
2014-06-01 07:38:21 +00:00
David Blaikie
365949d5af DebugInfo: Assert that DbgVariables have associated DIEs
This was previously committed in r209680 and reverted in r209683 after
it caused sanitizer builds to crash.

The issue seems to be that the DebugLoc associated with dbg.value IR
intrinsics isn't necessarily accurate. Instead, we duplicate the
DIVariables and add an InlinedAt field to them to record their
location.

We were using this InlinedAt field to compute the LexicalScope for the
variable, but not using it in the abstract DbgVariable construction and
mapping. This resulted in a formal parameter to the current concrete
function, correctly having no InlinedAt information, but incorrectly
having a DebugLoc that described an inlined location within the
function... thus an abstract DbgVariable was created for the variable,
but its DIE was never constructed (since the LexicalScope had no such
variable). This DbgVariable was silently ignored (by testing for a
non-null DIE on the abstract DbgVariable).

So, fix this by using the right scoping information when constructing
abstract DbgVariables.

In the long run, I suspect we want to undo the work that added this
second kind of location tracking and fix the places where the DebugLoc
propagation on the dbg.value intrinsic fails. This will shrink debug
info (by not duplicating DIVariables), make it more efficient (by not
having to construct new DIVariable metadata nodes to try to map back to
a single variable), and benefit all instructions.

But perhaps there are insurmountable issues with DebugLoc quality that
I'm unaware of... I just don't know how we can't /just keep the DebugLoc
from the dbg.declare to the dbg.values and never get this wrong/.

Some history context:

http://llvm.org/viewvc/llvm-project?view=revision&revision=135629
http://llvm.org/viewvc/llvm-project?view=revision&revision=137253

llvm-svn: 209984
2014-06-01 03:38:13 +00:00
Alp Toker
e8634eb077 Fix typos
llvm-svn: 209982
2014-05-31 21:26:28 +00:00
Alp Toker
c6984bfa5e ExecutionEngine: avoid NDEBUG in headers
llvm-svn: 209981
2014-05-31 21:26:17 +00:00
Alp Toker
f3f3560e44 Update a couple of header inclusion guards
llvm-svn: 209980
2014-05-31 21:26:09 +00:00
Matt Arsenault
1c23cf5566 R600/SI: Remove redundant patterns
These patterns are already handled in the instruction definition.

llvm-svn: 209979
2014-05-31 19:25:17 +00:00
Adam Nemet
807861a7b6 [SelectionDAG] Force cycle detection in AssignTopologicalOrder before aborting
DAG cycle detection is only enabled with ENABLE_EXPENSIVE_CHECKS.  However we
can run it just before we would crash in order to provide more informative
diagnostics.

Now in addition to the "Overran sorted position" message we also get the Node
printed if a cycle was detected.

Tested by building several configs: Debug+Assert, Debug+Assert+Check (this is
ENABLE_EXPENSIVE_CHECKS), Release+Assert and Release.  Also tried that the
AssignTopologicalOrder assert produces the expected results.

llvm-svn: 209977
2014-05-31 16:23:20 +00:00
Adam Nemet
267d4048ff [SelectionDAG] Pass DAG to checkForCycles
Pass the DAG down to checkForCycles from all callers where we have it.  This
allows target-specific nodes to be printed properly.

Also print some missing newlines.

llvm-svn: 209976
2014-05-31 16:23:17 +00:00
Adam Nemet
154449972f [SelectionDAG] Remove duplicate declaration
Prefer the decl in SelectionDAGNodes.h because it's used there and
SelectionDAG.h includes SelectionDAGNodes.h.

llvm-svn: 209975
2014-05-31 16:23:13 +00:00
Benjamin Kramer
9a25b19dba [Reassociate] Similar to "X + -X" -> "0", added code to handle "X + ~X" -> "-1".
Handle "X + ~X" -> "-1" in the function Value *Reassociate::OptimizeAdd(Instruction *I, SmallVectorImpl<ValueEntry> &Ops);
This patch implements:
TODO: We could handle "X + ~X" -> "-1" if we wanted, since "-X = ~X+1".

Patch by Rahul Jain!

Differential Revision: http://reviews.llvm.org/D3835

llvm-svn: 209973
2014-05-31 15:01:54 +00:00
Matt Arsenault
ff3cea9ab5 R600/SI: Fix [s|u]int_to_fp for i1
llvm-svn: 209971
2014-05-31 06:47:42 +00:00
Matt Arsenault
7946b7f3c7 Fix typos in tablegen error messages
llvm-svn: 209968
2014-05-31 05:18:52 +00:00
Simon Atanasyan
96f205e49a [yaml2obj] Add new command line option -docnum.
Input YAML file might contain multiple object file definitions.
New option `-docnum` allows to specify an ordinal number (starting from 1)
of definition used for an object file generation.

Patch reviewed by Sean Silva.

llvm-svn: 209967
2014-05-31 04:51:07 +00:00
Rafael Espindola
9e5e3d9f23 really fix the windows build.
llvm-svn: 209964
2014-05-31 03:40:00 +00:00
Rafael Espindola
54f41582c2 Fix windows build.
llvm-svn: 209961
2014-05-31 03:26:57 +00:00
Rafael Espindola
a46bdb6d4d There is no std::errc::success, remove the llvm one.
llvm-svn: 209960
2014-05-31 03:21:04 +00:00
Rafael Espindola
11e569dd23 Turn errc and windows_error into enum classes.
llvm-svn: 209957
2014-05-31 02:29:28 +00:00
Rafael Espindola
c86cc04638 Use error_code() instead of error_code::succes()
There is no std::error_code::success, so this removes much of the noise
in transitioning to std::error_code.

llvm-svn: 209952
2014-05-31 01:37:45 +00:00
Peter Collingbourne
edf9cd861d Fix the behavior of ExecuteAndWait with a non-zero timeout.
llvm-svn: 209951
2014-05-31 01:36:02 +00:00
Filipe Cabecinhas
c85c3e2c02 Make blend tests more specific
Following the lead set by r209324, I'm making these tests match the whole
instruction, so we can be sure we're lowering them correctly.

llvm-svn: 209947
2014-05-31 00:52:23 +00:00
Alexey Samsonov
b4f9b9e167 [ASan] Behave the same for functions w/o sanitize_address attribute and blacklisted functions
llvm-svn: 209946
2014-05-31 00:33:05 +00:00
Alexey Samsonov
fec237b436 [TSan] Fixup a test case after r209939
llvm-svn: 209945
2014-05-31 00:26:03 +00:00
Alexey Samsonov
b0ff4d0ab1 [TSan] Behave the same for functions w/o sanitize_thread attribute and blacklisted functions
llvm-svn: 209939
2014-05-31 00:11:37 +00:00
Rafael Espindola
0ba7b750ea delete dead code.
llvm-svn: 209938
2014-05-31 00:10:47 +00:00
Eric Christopher
1aad72164e Have the TLOF creation take a Triple rather than needing a subtarget.
llvm-svn: 209937
2014-05-31 00:07:32 +00:00
Andrea Di Biagio
3a03708285 [X86] Add two combine rules to simplify dag nodes introduced during type legalization when promoting nodes with illegal vector type.
This patch teaches the backend how to simplify/canonicalize dag node
sequences normally introduced by the backend when promoting certain dag nodes
with illegal vector type.

This patch adds two new combine rules:
1) fold (shuffle (bitcast (BINOP A, B)), Undef, <Mask>) ->
        (shuffle (BINOP (bitcast A), (bitcast B)), Undef, <Mask>)

2) fold (BINOP (shuffle (A, Undef, <Mask>)), (shuffle (B, Undef, <Mask>))) ->
        (shuffle (BINOP A, B), Undef, <Mask>).

Both rules are only triggered on the type-legalized DAG.
In particular, rule 1. is a target specific combine rule that attempts
to sink a bitconvert into the operands of a binary operation.
Rule 2. is a target independet rule that attempts to move a shuffle
immediately after a binary operation.

llvm-svn: 209930
2014-05-30 23:17:53 +00:00
Filipe Cabecinhas
8abf11ea97 Convert a vselect into a concat_vector if possible
Summary:
If both vector args to vselect are concat_vectors and the condition is
constant and picks half a vector from each argument, convert the vselect
into a concat_vectors.

Added a test.

The ConvertSelectToConcatVector is assuming it doesn't get vselects with
arguments of, for example, <undef, undef, true, true>. Those get taken
care of in the checks above its call.

Reviewers: nadav, delena, grosbach, hfinkel

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D3916

llvm-svn: 209929
2014-05-30 23:03:11 +00:00
Eric Christopher
0cc6977494 isSVR4ABI() returned !isDarwin() so just move that to the else
block and remove the unreachable code.

llvm-svn: 209927
2014-05-30 22:47:53 +00:00
Eric Christopher
f0478ea2df Rename CreateTLOF->createTLOF to match the rest of the file and the
rest of the targets with a similar function name.

llvm-svn: 209926
2014-05-30 22:47:48 +00:00
Filipe Cabecinhas
89440ec19e Separate the check for blend shuffle_vector masks
Summary:
Separate the check for blend shuffle_vector masks into isBlendMask.
This function will also be used to check if a vector shuffle is legal. No
change in functionality was intended, but we ended up improving codegen on
two tests, which were being (more) optimized only if the resulting shuffle
was legal.

Reviewers: nadav, delena, andreadb

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D3964

llvm-svn: 209923
2014-05-30 21:31:21 +00:00
Sanjay Patel
21803f5788 fixed more typos
llvm-svn: 209921
2014-05-30 21:18:13 +00:00
Adrian Prantl
fd0f672222 Roll DbgVariable::setMInsn into the constructor. No functional changes.
llvm-svn: 209920
2014-05-30 21:10:13 +00:00
Sanjay Patel
9d61204f83 added link to CMake page
llvm-svn: 209918
2014-05-30 21:07:25 +00:00
Sanjay Patel
7703900b03 fixed typo
llvm-svn: 209916
2014-05-30 20:55:55 +00:00
Matt Arsenault
09fc34b10a Make bitcast, extractelement, and insertelement considered cheap for speculation.
This helps more branches into selects. On R600,
vectors are cheap and anything that helps
remove branches is very good.

llvm-svn: 209914
2014-05-30 18:34:43 +00:00
Logan Chien
79b8446257 Fix MIPS exception personality encoding.
For MIPS, we have to encode the personality routine with
an indirect pointer to absptr; otherwise, some link warning
warning will be raised, and the program might crash in some
early MIPS Android device.

llvm-svn: 209907
2014-05-30 16:48:56 +00:00
Tim Northover
9fb84c77eb MachO: move test to ARM directory.
This test specifies an ARM triple, so it needs ARM as a registered
target.

llvm-svn: 209905
2014-05-30 16:01:29 +00:00
Rafael Espindola
db0bd4b30f PR19753: Optimize comparisons with "ashr exact" of a constanst.
Patch by suyog sarda.

llvm-svn: 209903
2014-05-30 15:54:32 +00:00
Rafael Espindola
d1ec35ff7d [pr19636] Fix known bit computation in urem instruction with power of two.
Patch by Andrey Kuharev.

llvm-svn: 209902
2014-05-30 15:00:45 +00:00
Tim Northover
89515a61ad SelectionDAG: skip barriers for unordered atomic operations
Unordered is strictly weaker than monotonic, so if the latter doesn't have any
barriers then the former certainly shouldn't.

rdar://problem/16548260

llvm-svn: 209901
2014-05-30 14:41:51 +00:00
Tim Northover
6ee9050b92 ARM: use AAPCS-style prologues for embedded MachO.
Darwin prologues save their GPRs in two stages: a narrow push of r0-r7 & lr,
followed by a wide push of the remaining registers if there are any. AAPCS uses
a single push.w instruction.

It turns out that, on average, enough registers get pushed that code is smaller
in the AAPCS prologue, which is a nice property for M-class programmers. They
also have other options available for back-traces, so can hopefully deal with
the fact that FP & LR aren't adjacent in memory.

rdar://problem/15909583

llvm-svn: 209895
2014-05-30 13:23:06 +00:00
Tim Northover
6eb5aa7fce MachO: support N_INDR aliases in assembly files.
This makes LLVM create N_INDR aliases (to be resolved by the linker) when
appropriate.

rdar://problem/15125513

llvm-svn: 209894
2014-05-30 13:22:59 +00:00
Tim Northover
73e8ecbf7f AArch64 & ARM: disable generic test that relies on no CFG changes.
llvm-svn: 209885
2014-05-30 10:56:12 +00:00
Tim Northover
3bb84c9bcc ARM & AArch64: make use of common cmpxchg idioms after expansion
The C and C++ semantics for compare_exchange require it to return a bool
indicating success. This gets mapped to LLVM IR which follows each cmpxchg with
an icmp of the value loaded against the desired value.

When lowered to ldxr/stxr loops, this extra comparison is redundant: its
results are implicit in the control-flow of the function.

This commit makes two changes: it replaces that icmp with appropriate PHI
nodes, and then makes sure earlyCSE is called after expansion to actually make
use of the opportunities revealed.

I've also added -{arm,aarch64}-enable-atomic-tidy options, so that
existing fragile tests aren't perturbed too much by the change. Many
of them either rely on undef/unreachable too pervasively to be
restored to something well-defined (particularly while making sure
they test the same obscure assert from many years ago), or depend on a
particular CFG shape, which is disrupted by SimplifyCFG.

rdar://problem/16227836

llvm-svn: 209883
2014-05-30 10:09:59 +00:00
Tim Northover
6f54bcc408 AArch64 & ARM: remove undefined behaviour from some tests.
llvm-svn: 209880
2014-05-30 08:59:55 +00:00