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Commit Graph

191733 Commits

Author SHA1 Message Date
Igor Kudrin
c206b32aa7 [DebugInfo] Add support for DWARF64 into DWARFDebugAddr.
Differential Revision: https://reviews.llvm.org/D74198
2020-02-12 13:33:01 +07:00
Igor Kudrin
98bbb1f23e [DebugInfo] Simplify DWARFDebugAddr.
The patch removes unnecessary members of DWARFDebugAddr and further
simplifies the implementation by separating parsing methods of tables
in the DWARFv5 and pre-standard formats.

Differential Revision: https://reviews.llvm.org/D74197
2020-02-12 13:33:00 +07:00
Igor Kudrin
70f13e0c61 [DebugInfo] Refine error messages in DWARFDebugAddr.
As a preparation for the subsequent patches, this updates the wordings
of some error messages in DWARFDebugAddr.

Differential Revision: https://reviews.llvm.org/D74196
2020-02-12 13:33:00 +07:00
Igor Kudrin
5c5156a6a9 [DebugInfo] Use "an address table" in diagnostic messages of DWARFDebugAddr.
This replaces a collocation "a .debug_addr table" with "an address table"
because the latter sounds more accurate.

Differential Revision: https://reviews.llvm.org/D74407
2020-02-12 13:33:00 +07:00
Igor Kudrin
80d0555a9c [DebugInfo] Do not dump header field for pre-DWARFv5 address tables.
As there is no header in pre-DWARFv5 address tables, and we fill
the class data members with some artificial values, we should not
dump them as that might be misleading.

Differential Revision: https://reviews.llvm.org/D74195
2020-02-12 13:33:00 +07:00
Igor Kudrin
aba0bf1de0 [DebugInfo] Fix reading addresses in DWARFDebugAddr.
As addresses in the address tables may have relocations, thus,
the relocations should be resolved to read the correct address.
That is especially important for targets that use RELA relocations
because in that case addends are stored in relocation sections.

Differential Revision: https://reviews.llvm.org/D74404
2020-02-12 13:32:59 +07:00
Craig Topper
42881b3a20 [X86][LegalizeTypes] Add SoftPromoteHalf support STRICT_FP_EXTEND and STRICT_FP_ROUND
This adds a strict version of FP16_TO_FP and FP_TO_FP16 and uses
them to implement soft promotion for the half type. This is
enough to provide basic support for __fp16 with strictfp.

Add the necessary X86 support to use VCVTPS2PH/VCVTPH2PS when F16C
is enabled.
2020-02-11 22:30:04 -08:00
Fangrui Song
2a138c13f8 [CMake] Delete llvm_add_go_executable and a reference to TARGET llvm-go
llvm-go was deleted by 102814b4d36ad004a2e37cd2a1e84bd2c3593d29.
2020-02-11 20:55:50 -08:00
Yuanfang Chen
c7fb4c55c4 Revert "Reland "[Support] make report_fatal_error abort instead of exit""
This reverts commit rGcd5b308b828e, rGcd5b308b828e, rG8cedf0e2994c.

There are issues to be investigated for polly bots and bots turning on
EXPENSIVE_CHECKS.
2020-02-11 20:41:53 -08:00
Matt Arsenault
65b8e5103c AMDGPU: Use conditions directly in division expansion
This was creating a select on true/false values, and then comparing
that later. This produced more work for later combines, which can be
avoided by just using the boolean values. This was copied from the
original DAG expansion, which also has the same problem. This doesn't
have a observable change using SelectionDAG, but since GlobalISel is
missing these optimizations, the final code was noticeably longer.
2020-02-11 23:11:30 -05:00
Yuanfang Chen
2168074cff Temporarily XFAIL these two tests.
llvm/test/CodeGen/X86/inline-asm-avx-v-constraint-32bit.ll
llvm/test/CodeGen/X86/inline-asm-avx512vl-v-constraint-32bit.ll
2020-02-11 19:18:23 -08:00
Yuanfang Chen
bf137f2359 Fix two more test cases for https://reviews.llvm.org/D74456. 2020-02-11 18:35:09 -08:00
Yuanfang Chen
83a2f3c1ba Reland "[Support] make report_fatal_error abort instead of exit"
Summary:
Reland D67847 after D73742 is committed. Replace `sys::Process::Exit(1)`
with `abort` in `report_fatal_error`.

After this patch, for tools turning on `CrashRecoveryContext`,
crash handler installed by `CrashRecoveryContext` is called unless
they installed a non-returning handler using `llvm::install_fatal_error_handler`
like `cc1_main` currently does.

Reviewers: rnk, MaskRay, aganea, hans, espindola, jhenderson

Subscribers: jholewinski, qcolombet, dschuff, jyknight, emaste, sdardis, nemanjai, jvesely, nhaehnle, sbc100, jgravelle-google, hiraditya, aheejin, kbarton, fedor.sergeev, asb, rbar, johnrusso, simoncook, sabuasal, niosHD, jrtc27, zzheng, edward-jones, atanasyan, steven_wu, rogfer01, MartinMosbeck, brucehoult, the_o, dexonsmith, PkmX, rupprecht, jocewei, jsji, Jim, dmgreen, lenary, s.egerton, pzheng, sameer.abuasal, apazos, luismarques, kerbowa, cfe-commits, llvm-commits

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D74456
2020-02-11 18:20:40 -08:00
Fangrui Song
28238334c2 [test] Improve test/CodeGen/X86/linux-preemption.ll 2020-02-11 17:23:37 -08:00
Austin Kerbow
e5fd9f2dc2 [AMDGPU][GlobalISel] Refactor selectDS1Addr1Offset/selectDS64Bit4ByteAligned
Differential Revision: https://reviews.llvm.org/D74261
2020-02-11 16:57:13 -08:00
Galina Kistanova
fd0b07e175 Reverted the remainings of c1c9819ef91aab51b5a23fb3027adac5a2f551cc
as it has left broken llvm-clang-lld-x86_64-scei-ps4-ubuntu-fast buildbot for long time.

Differential Revision: https://reviews.llvm.org/D73840
2020-02-11 16:20:06 -08:00
Matt Arsenault
4cc04e2aa0 AMDGPU: Don't expand more special div cases in IR
These have nicer expansions implemented in the DAG. Ideally we would
either directly implement all of these special expansions, or stop
expanding division in the IR.
2020-02-11 19:01:06 -05:00
Reid Kleckner
4858fda256 Fix MSVC build with C++ EH enabled
Mark the CrashRecoveryContextImpl constructor noexcept, so that MSVC
won't emit an unwind helper to clean up the allocation from `new` if the
constructor throws an exception.

Otherwise, MSVC complains:
  llvm\lib\Support\CrashRecoveryContext.cpp(220): error C2712: \
  Cannot use __try in functions that require object unwinding

The other simple fix would be to wrap `new` in a static helper or
lambda.

Users have reported that Tensorflow builds LLVM with /EHsc.
2020-02-11 15:56:10 -08:00
Matt Arsenault
c74d601f15 AMDGPU: Don't report 2-byte alignment as fast
This is apparently worse than 1-byte alignment. This does not attempt
to decompose 2-byte aligned wide stores, but will stop trying to
produce them.

Also fix bug in LoadStoreVectorizer which was decreasing the alignment
and vectorizing stack accesses. It was assuming a stack object was an
alloca that could have its base alignment changed, which is not true
if the pointer is derived from a function argument.
2020-02-11 18:35:00 -05:00
Derek Schuff
0e37f48abc [llvm-objcopy][WebAssembly] Add dump/add/remove-section support
Add support for adding, removing, and dumping wasm sections to objcopy

Differential Revision: https://reviews.llvm.org/D70970
2020-02-11 15:17:18 -08:00
Justin Lebar
0e4d775a3f Use std::foo_t rather than std::foo in LLVM.
Summary: C++14 migration. No functional change.

Reviewers: bkramer, JDevlieghere, lebedev.ri

Subscribers: MatzeB, hiraditya, jkorous, dexonsmith, arphaman, kadircet, lebedev.ri, usaxena95, cfe-commits, llvm-commits

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D74384
2020-02-11 15:12:51 -08:00
Matt Arsenault
7f1560ae89 AMDGPU: Add baseline tests for CGP div expansion
These cases are harmed by expanding division early in the IR, before
DAGCombiner.
2020-02-11 18:11:39 -05:00
Matt Arsenault
4da25648cc AMDGPU: Fix crash on v3i15 kernel arguments
This was split into 3 i15 arguments. The i15 piece needs to be rounded
to a simple MVT for the memory type.
2020-02-11 18:11:39 -05:00
Matt Arsenault
a1fffbace3 AMDGPU: Directly use rcp intrinsic in idiv expansions
Since natural fdiv lowering is now more conservative even with
denormals disabled, we get a slower expansion from just a plain
1.0/fdiv. Directly emit the rcp intrinsic when using it to implement
integer division to avoid a pointlessly complex sequence.
2020-02-11 18:11:39 -05:00
Matt Arsenault
1abf53fb14 AMDGPU: Don't create potentially dead rcp declarations
This will introduce unused declarations if this doesn't reach any of
the paths that will really use it.
2020-02-11 18:11:39 -05:00
Aditya Nandakumar
d71f33d6b3 [MachO] Pad section data to pointer size bytes
https://reviews.llvm.org/D74273

Pad macho section data to pointer size bytes, so that relocation
table and symbol table following section data will be pointer size
aligned.

Patch by pguo.
2020-02-11 14:52:21 -08:00
Johannes Doerfert
973208ded7 [NFC] Fix spelling 2020-02-11 16:44:04 -06:00
Craig Topper
984931d95d [X86] Don't disable code in combineHorizontalPredicateResult just because we have avx512
We aren't doing a good job of optimizing AVX512 outside of this code. So remove the bail out for AVX512 and replace with a FIXME. This at least gets us the AVX2 codegen.

Differential Revision: https://reviews.llvm.org/D74431
2020-02-11 14:36:29 -08:00
Johannes Doerfert
824188d4da [Utils] Allow "on-the-fly" argument changes for update_test_check scripts
Update test scripts were limited because they performed a single action
on the entire file and if that action was controlled by arguments, like
the one introduced in D68819, there was no record of it.

This patch introduces the capability of changing the arguments passed to
the script "on-the-fly" while processing a test file. In addition, an
"on/off" switch was added so that processing can be disabled for parts
of the file where the content is simply copied. The last extension is a
record of the invocation arguments in the auto generated NOTE. These
arguments are also picked up in a subsequent invocation, allowing
updates with special options enabled without user interaction.

To change the arguments the string `UTC_ARGS:` has to be present in a
line, followed by "additional command line arguments". That is
everything that follows `UTC_ARGS:` will be added to a growing list
of "command line arguments" which is reparsed after every update.

Reviewed By: arichardson

Differential Revision: https://reviews.llvm.org/D69701
2020-02-11 16:29:46 -06:00
Stanislav Mekhanoshin
d67e9d99f4 [AMDGPU] Fixed subreg use in sdwa-scalar-ops.mir. NFC 2020-02-11 14:27:17 -08:00
Huihui Zhang
10305a8da8 [ConstantFold][SVE] Fix constand fold for vector call.
Summary:
Do not iterate on scalable vectors.

Reviewers: sdesmalen, efriedma, apazos, huntergr, willlovett

Reviewed By: sdesmalen

Subscribers: tschuett, hiraditya, rkruppe, psnobl, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D74419
2020-02-11 14:06:15 -08:00
Krzysztof Parzyszek
886e13050e [Hexagon] Don't generate short vectors in ISD::SELECT in preprocessing
Selection DAG preprocessing runs long after legalization, so make sure
that the types can be handled by the selection code.
2020-02-11 15:27:33 -06:00
lewis-revill
13cfdc2bb4 [DebugInfo] Call site entries cannot be generated for FrameSetup calls
Instructions marked as FrameSetup do not cause requestLabelAfterInsn to
be called and so no such label is generated. Call instructions which
require call site entries to be generated require this label to be
present in order to calculate the return PC offset/address, but the
check for whether the call instruction is marked as FrameSetup was not
present.

Therefore in the case where a call instruction is marked as FrameSetup,
an assertion failure occurs if a call site entry is to be generated.
This is the case with RISC-V's implementation of save/restore via
library calls.

Differential Revision: https://reviews.llvm.org/D71593
2020-02-11 21:23:18 +00:00
lewis-revill
b0c6c4df1d [RISCV] Add support for save/restore of callee-saved registers via libcalls
This patch adds the support required for using the __riscv_save and
__riscv_restore libcalls to implement a size-optimization for prologue
and epilogue code, whereby the spill and restore code of callee-saved
registers is implemented by common functions to reduce code duplication.

Logic is also included to ensure that if both this optimization and
shrink wrapping are enabled then the prologue and epilogue code can be
safely inserted into the basic blocks chosen by shrink wrapping.

Differential Revision: https://reviews.llvm.org/D62686
2020-02-11 21:23:03 +00:00
Johannes Doerfert
640e5910d4 [Attributor][NFC] Clarify the documentation a bit more 2020-02-11 15:11:55 -06:00
Johannes Doerfert
5d53104112 [Attributor] Identify dead uses in PHIs (almost) based on dead edges
As an approximation to a dead edge we can check if the terminator is
dead. If so, the corresponding operand use in a PHI node is dead even if
the PHI node itself is not.
2020-02-11 15:11:55 -06:00
Lang Hames
b170349fb7 [ORC] Fix symbol dependence propagation algorithm in ObjectLinkingLayer.
ObjectLinkingLayer was not correctly propagating dependencies through local
symbols within an object. This could cause symbol lookup to return before a
searched-for symbol is ready if the following conditions are met:
(1) The definition of the symbol being searched for transitively depends on a
    local symbol within the same object, and that local symbol in turn
    transitively depends on an external symbol provided by some other module
    in the JIT.
(2) Concurrent compilation is enabled.
(3) Thread scheduling causes the lookup of the searched-for symbol to return
    before all transitive dependencies of the looked-up symbol are emitted.

This bug was found by inspection and has not been observed in practice.

A jitlink test case has been added to verify that symbol dependencies are
correctly propagated through local symbol definitions.
2020-02-11 12:56:41 -08:00
Lang Hames
3b9ed85d5b [JITLink] Add an assertion that block removal leaves no dangling symbols. 2020-02-11 12:56:41 -08:00
Lang Hames
1b4cebd3b1 [ORC] Add debug logging to JITDylib::addDependencies. 2020-02-11 12:56:40 -08:00
Sterling Augustine
0b336f6ee0 Update test for windows. 2020-02-11 12:35:46 -08:00
Jay Foad
666cdd68bc [AMDGPU] Fix implicit operands for ENTER_WWM pseudo
Summary:
SIInstrInfo::expandPostRAPseudo converts ENTER_WWM in-place into an
S_OR_SAVEEXEC instruction that needs certain implicit operands. Without
this patch I get errors like this that make it harder to use -stop-after
to bisect the pass pipeline:

$ llc -march=amdgcn test/CodeGen/AMDGPU/wqm.ll -stop-after=postrapseudos -o - | sed -E 's/ (from|into) custom "TargetCustom[0-9]+"//' | llc -march=amdgcn -x=mir
error: <stdin>:1295:70: missing implicit register operand 'implicit-def $scc'
    renamable $sgpr2_sgpr3 = S_OR_SAVEEXEC_B64 -1, implicit-def $exec
                                                                     ^

Note that this error is currently only generated by MIParser but it
comes with a FIXME comment:

// FIXME: Move the implicit operand verification to the machine verifier.

Reviewers: critson, arsenm, rampitec, nhaehnle

Subscribers: kzhuravl, jvesely, wdng, yaxunl, dstuttard, tpr, t-tye, hiraditya, kerbowa, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D74428
2020-02-11 20:11:41 +00:00
Sterling Augustine
ad25ac2e9f Allow retrieving source files relative to the compilation directory.
Summary:
Dwarf stores source-file names the three parts:
<compilation_directory><include_directory><filename>

Prior to this change, the code only allowed retrieving either all
three as the absolute path, or just the filename.  But many
compile-command lines--especially those in hermetic build systems
don't specify an absolute path, nor just the filename, but rather the
path relative to the compilation directory. This features allows
retrieving them in that style.

Add tests for path printing styles.

Modify createBasicPrologue to handle include directories.

Subscribers: aprantl, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D73383
2020-02-11 11:46:20 -08:00
diggerlin
313f23df6f [NFC] Refactor the tuple of symbol information with structure for llvm-objdump
SUMMARY:

address  the comment of
https://reviews.llvm.org/D74240#inline-676127
https://reviews.llvm.org/D74240#inline-675875

Reviewers: daltenty, jason liu, xiangling liao
Subscribers: wuzish, nemanjai, hiraditya

Differential Revision: https://reviews.llvm.org/D74240
2020-02-11 14:41:24 -05:00
Reid Kleckner
474d5145ea [gn] Paper over Py3 urllib2 incompatibility in gn/get.py
Tested with both Python 2.7 and Python 3.7.

Reviewed By: thakis

Differential Revision: https://reviews.llvm.org/D73234
2020-02-11 11:39:16 -08:00
Alina Sbirlea
1e37b17c69 [BasicAA] Make BasicAA a cfg pass.
Summary:
Part of the changes in D44564 made BasicAA not CFG only due to it using
PhiAnalysisValues which may have values invalidated.
Subsequent patches (rL340613) appear to have addressed this limitation.

BasicAA should not be invalidated by non-CFG-altering passes.
A concrete example is MemCpyOpt which preserves CFG, but we are testing
it invalidates BasicAA.

llvm-dev RFC: https://groups.google.com/forum/#!topic/llvm-dev/eSPXuWnNfzM

Reviewers: john.brawn, sebpop, hfinkel, brzycki

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D74353
2020-02-11 11:30:08 -08:00
Craig Topper
341faaf09a [X86] Raise the latency for VectorImul from 4 to 5 in Skylake scheduler models
Based on uops.info these should have 5 cycle latency as they did on Haswell/Broadwell. I have no additional internal information from Intel.

This was also shown as a discrepancy in the spreadsheet that was sent with an early llvm-dev post about llvm-exegesis.
It also matches Agner Fog.

Differential Revision: https://reviews.llvm.org/D74357
2020-02-11 11:24:25 -08:00
LLVM GN Syncbot
3113262a14 [gn build] Port 453a8f3af78 2020-02-11 19:14:15 +00:00
Stanislav Mekhanoshin
15d004efaa [AMDGPU] Remove AMDGPURegisterInfo
R600 and GCN do not have anything in common in terms of register
file organization anymore.

Differential Revision: https://reviews.llvm.org/D74426
2020-02-11 11:13:38 -08:00
Teresa Johnson
b852bbbbae Restore "[WPD/LowerTypeTests] Delay lowering/removal of type tests until after ICP"
This restores commit 748bb5a0f1964d20dfb3891b0948ab6c66236c70, along
with a fix for a Chromium test suite build issue (and a new test for
that case).

Differential Revision: https://reviews.llvm.org/D73242
2020-02-11 10:48:05 -08:00
Cyndy Ishida
a000512a83 [llvm][TextAPI] add simulators to output
Summary:
* for <= tbd_v3, simulator platforms appear the same as the real
platform and we distinct the difference from the architecture.

fixes: rdar://problem/59161559

Reviewers: ributzka, steven_wu

Reviewed By: ributzka

Subscribers: hiraditya, dexonsmith, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D74416
2020-02-11 10:37:37 -08:00