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Author SHA1 Message Date
Anton Korobeynikov
c82243e658 Add testcase for register scanveger assertion fix in r72755 
(double def due to livevars)

llvm-svn: 73096
 2009-06-08 22:54:15 +00:00
Anton Korobeynikov
d08df21f36 The attached patches implement most of the ARM AAPCS-VFP hard float 
ABI. The missing piece is support for putting "homogeneous aggregates"
into registers.

Patch by Sandeep Patel!

llvm-svn: 73095
 2009-06-08 22:53:56 +00:00
David Greene
5c75138561 Update documentation. 
llvm-svn: 73092
 2009-06-08 22:38:07 +00:00
David Greene
1f88852460 Add a more robust !if test. 
llvm-svn: 73091
 2009-06-08 22:34:57 +00:00
David Greene
5b0714ad86 Fix DejaGNU run line to escape special characters. 
llvm-svn: 73090
 2009-06-08 22:20:58 +00:00
Daniel Dunbar
89fef139c1 Document the stack alignment part of target data description. 
llvm-svn: 73089
 2009-06-08 22:17:53 +00:00
Anton Korobeynikov
52b2898854 Separate V6 from V6T2 since the latter has some extra nice instructions 
llvm-svn: 73085
 2009-06-08 21:20:36 +00:00
Stefanus Du Toit
ddb6f7e10b Allow setting the C runtime to be used with MSVC from cmake. 
Patch by Tareq Siraj.

llvm-svn: 73084
 2009-06-08 21:18:31 +00:00
Anton Korobeynikov
7e9e1b3e1f Add helper for checking of Thumb1 mode 
llvm-svn: 73080
 2009-06-08 20:31:02 +00:00
David Greene
62a2f2fb97 Make IntInits and ListInits typed. This helps deduce types of !if and 
other operators.  For the rare cases where a list type cannot be
deduced, provide a []<type> syntax, where <type> is the list element
type.

llvm-svn: 73078
 2009-06-08 20:23:18 +00:00
David Greene
15052a8ac9 Make !if short-circuit when possible. 
llvm-svn: 73076
 2009-06-08 19:16:56 +00:00
Bill Wendling
b0c6fe320d Revert r72898. It does not solve the problem I want it to solve. 
llvm-svn: 73075
 2009-06-08 18:18:28 +00:00
David Greene
21ba6012b2 Add a !regmatch operator to do pattern matching in TableGen. 
llvm-svn: 73074
 2009-06-08 17:00:34 +00:00
Bruno Cardoso Lopes
472eb7c299 Delete comment and fix typo 
llvm-svn: 73040
 2009-06-07 21:49:11 +00:00
Bruno Cardoso Lopes
f7d71605a6 Fix wrong elf class and byte order initializations. 
llvm-svn: 73039
 2009-06-07 21:33:20 +00:00
Bruno Cardoso Lopes
cfa07266cf Simple ELF32/64 binary files can now be emitted for x86 and x86_64 without 
relocation sections.

llvm-svn: 73038
 2009-06-07 21:22:38 +00:00
Eli Friedman
62028b7323 Fix the run-line for this test to work correctly outside of x86. 
llvm-svn: 73025
 2009-06-07 09:44:19 +00:00
Eli Friedman
2964aa5a38 Tweak the expansion code for BIT_CONVERT to generate better code 
converting from an MMX vector to an i64.

llvm-svn: 73024
 2009-06-07 09:41:57 +00:00
Eli Friedman
1609a6524f Get rid of some unnecessary code. 
llvm-svn: 73017
 2009-06-07 07:28:45 +00:00
Nick Lewycky
71dc3c5d85 Create FunctionType::isValidArgumentType to go along with isValidReturnType. 
Also create isValidElementType for ArrayType, PointerType, StructType and
VectorType.

Make LLParser use them. This closes up some holes like an assertion failure on:

  %x = type {label}

but largely doesn't change any semantics. The only thing we accept now which
we didn't before is vectors of opaque type such as "<4 x opaque>". The opaque
can be resolved to an int or float when linking.

llvm-svn: 73016
 2009-06-07 07:26:46 +00:00
Mikhail Glushenkov
1c400b6622 A basic PIC16 toolchain driver. 
Nice addition to the examples and also a starting point for Sanjiv to work on.

llvm-svn: 73013
 2009-06-07 07:08:01 +00:00
Eli Friedman
d4b463b0dc Slightly generalize the code that handles shuffles of consecutive loads 
on x86 to handle more cases.  Fix a bug in said code that would cause it 
to read past the end of an object.  Rewrite the code in 
SelectionDAGLegalize::ExpandBUILD_VECTOR to be a bit more general. 
Remove PerformBuildVectorCombine, which is no longer necessary with 
these changes.  In addition to simplifying the code, with this change, 
we can now catch a few more cases of consecutive loads.

llvm-svn: 73012
 2009-06-07 06:52:44 +00:00
Nick Lewycky
a96000f2bf Remove cyclic MDNode detection. Any attempt to create a cyclic MDNode will 
crash LLVM first.

llvm-svn: 73011
 2009-06-07 04:03:01 +00:00
Nick Lewycky
3a8ea63343 Refuse metadata* type for function arguments. 
llvm-svn: 73010
 2009-06-07 01:45:11 +00:00
Eli Friedman
2b6cb1684f PR3628: Add patterns to match SHL/SRL/SRA to the corresponding Altivec 
instructions.

llvm-svn: 73009
 2009-06-07 01:07:55 +00:00
Nick Lewycky
acd23348af Add option for specifying the path to assembler, "as". This overrides the path 
to gcc.

llvm-svn: 73008
 2009-06-07 00:50:45 +00:00
Nick Lewycky
1a54547335 Don't crash on multiple return value with no obvious inserted value. 
Fixes PR4314.

llvm-svn: 73007
 2009-06-06 23:13:08 +00:00
Eli Friedman
770f633389 PR4340: Run SimplifyDemandedVectorElts on insertelement instructions; 
sometimes it can find simplifications that won't be found otherwise.

llvm-svn: 73006
 2009-06-06 20:08:03 +00:00
Nick Lewycky
cf715254c7 Move </pre> to column one to avoid an extra line of spaces in the example. 
llvm-svn: 73003
 2009-06-06 18:14:04 +00:00
Jay Foad
a442a46de9 Use cast<> instead of dyn_cast<> for things that are known to be 
Instructions.

llvm-svn: 73002
 2009-06-06 17:49:35 +00:00
Dan Gohman
5470ba421d Rename UnknownValue to CouldNotCompute, since it holds an instance of 
SCEVCouldNotCompute, and not SCEVUnknown.

llvm-svn: 72999
 2009-06-06 14:37:11 +00:00
Eli Friedman
2dadbd05f9 Fix the expansion for CONCAT_VECTORS so that it doesn't create illegal 
types.

llvm-svn: 72993
 2009-06-06 07:08:26 +00:00
Eli Friedman
85675e8547 Factor out a couple of helpers. 
llvm-svn: 72992
 2009-06-06 07:04:42 +00:00
Eli Friedman
4395222136 Avoid crashing on a variable-index insertelement with element type i16. 
llvm-svn: 72991
 2009-06-06 06:32:50 +00:00
Nick Lewycky
74cc3dbba6 Regenerate. 
llvm-svn: 72990
 2009-06-06 06:25:09 +00:00
Nick Lewycky
b37f8b08c2 Add a flag to permit disabling libffi. 
Also, there were a bunch of flags with no text in --help because the square
brackets were in the wrong place. I've fixed those too.

llvm-svn: 72989
 2009-06-06 06:24:44 +00:00
Eli Friedman
e546f94ef5 Get rid of some bogus patterns for X86vzmovl. Don't create VZEXT_MOVL 
nodes for vectors with an i16 element type.  Add an optimization for 
building a vector which is all zeros/undef except for the bottom 
element, where the bottom element is an i8 or i16.

llvm-svn: 72988
 2009-06-06 06:05:10 +00:00
Eli Friedman
539325c8e7 Fix an obvious typo. 
llvm-svn: 72987
 2009-06-06 05:55:37 +00:00
Bruno Cardoso Lopes
bb6a353eb2 x86_64 now uses the correct ELF e_machine type 
llvm-svn: 72986
 2009-06-06 04:29:16 +00:00
Eli Friedman
1227d199be Get rid of a bogus pattern that interferes with optimization. 
llvm-svn: 72985
 2009-06-06 04:17:04 +00:00
Eli Friedman
05eef883e8 PR2598: make sure to expand illegal forms of integer/floating-point 
conversions for x86, like <2 x i32> -> <2 x float> and <4 x i16> -> 
<4 x float>.

llvm-svn: 72983
 2009-06-06 03:57:58 +00:00
Bruno Cardoso Lopes
b3b24681ca Remove elf specific info from ELFWriter.h to Elf.h. Code cleanup and more comments added 
llvm-svn: 72982
 2009-06-06 03:56:29 +00:00
Eli Friedman
c7d37a1c3a Make SINT_TO_FP/UINT_TO_FP vector legalization queries query on the 
integer type to be consistent with normal operation legalization.  No visible
change because nothing is actually using this at the moment.

llvm-svn: 72980
 2009-06-06 03:27:50 +00:00
Douglas Gregor
472479c173 More portability checks for CMake's config.h. 
llvm-svn: 72975
 2009-06-05 23:46:34 +00:00
Devang Patel
a6b3b19170 Simplify. 
llvm-svn: 72970
 2009-06-05 23:08:56 +00:00
Dan Gohman
e0d593cbf6 Add explicit keywords. 
llvm-svn: 72969
 2009-06-05 23:05:51 +00:00
Devang Patel
17bb9f4649 Simplify. 
llvm-svn: 72965
 2009-06-05 22:39:21 +00:00
Devang Patel
8d170194e8 Add new function attribute - noimplicitfloat 
Update code generator to use this attribute and remove NoImplicitFloat target option.
Update llc to set this attribute when -no-implicit-float command line option is used.

llvm-svn: 72959
 2009-06-05 21:57:13 +00:00
Nate Begeman
058d4eeccf Adapt the x86 build_vector dagcombine to the current state of the legalizer. 
build vectors with i64 elements will only appear on 32b x86 before legalize.
Since vector widening occurs during legalize, and produces i64 build_vector 
elements, the dag combiner is never run on these before legalize splits them
into 32b elements.

Teach the build_vector dag combine in x86 back end to recognize consecutive 
loads producing the low part of the vector.

Convert the two uses of TLI's consecutive load recognizer to pass LoadSDNodes
since that was required implicitly.

Add a testcase for the transform.

Old:
	subl	$28, %esp
	movl	32(%esp), %eax
	movl	4(%eax), %ecx
	movl	%ecx, 4(%esp)
	movl	(%eax), %eax
	movl	%eax, (%esp)
	movaps	(%esp), %xmm0
	pmovzxwd	%xmm0, %xmm0
	movl	36(%esp), %eax
	movaps	%xmm0, (%eax)
	addl	$28, %esp
	ret

New:
	movl	4(%esp), %eax
	pmovzxwd	(%eax), %xmm0
	movl	8(%esp), %eax
	movaps	%xmm0, (%eax)
	ret

llvm-svn: 72957
 2009-06-05 21:37:30 +00:00
Evan Cheng
ea31ec569b Changing allocation ordering from r3 ... r0 back to r0 ... r3. The order change no longer make sense after the coalescing changes we have made since then. 
llvm-svn: 72955
 2009-06-05 19:08:58 +00:00