Brian Gaeke
11c7052fb5
Add to-do list.
...
llvm-svn: 14881
2004-07-16 10:31:36 +00:00
Brian Gaeke
53dc31efcd
Do IMPLICIT_DEFs on incoming args' hard regs, to avoid confusing the regalloc.
...
Support single-fp incoming args.
Support single-fp outgoing args ('call' operands).
Support double-fp return values.
llvm-svn: 14880
2004-07-16 10:31:25 +00:00
Chris Lattner
6331eb6bbe
Delete the allocate*TargetMachine function, which is now dead .
...
The shared command line options are now in a header that makes sense.
llvm-svn: 14756
2004-07-11 04:17:10 +00:00
Chris Lattner
b67e3b01bc
Make these format a bit nicer
...
llvm-svn: 14747
2004-07-11 03:27:42 +00:00
Chris Lattner
2ada866a78
Auto-registrate target
...
llvm-svn: 14745
2004-07-11 02:48:49 +00:00
Brian Gaeke
0601002727
Support setcc on fp values.
...
llvm-svn: 14687
2004-07-08 09:08:35 +00:00
Brian Gaeke
23d171a9ed
Add floating-point branches and compares. Compares don't complete
...
until the next cycle, and there's no interlock, so they effectively
have a delay slot.
llvm-svn: 14686
2004-07-08 09:08:22 +00:00
Brian Gaeke
99a4b4ecc6
Fix bug where SwitchSection would fail to change to ".bss" successfully.
...
llvm-svn: 14685
2004-07-08 08:08:23 +00:00
Brian Gaeke
79c41545a7
Fix bug involving bool arguments to binary operators.
...
Fix typo in comment.
llvm-svn: 14684
2004-07-08 08:08:10 +00:00
Brian Gaeke
2de292734d
Fix bug in copying long constants to register pairs. We were getting
...
the top and bottom halves backwards...how embarrassing.
Support 'cast long to long' and other similar no-op casts to long.
Support 'ret long'.
llvm-svn: 14683
2004-07-08 07:52:13 +00:00
Brian Gaeke
04176a23a7
Support 'ret float'
...
llvm-svn: 14681
2004-07-08 07:22:27 +00:00
Chris Lattner
8d61e9ad98
Add #includes
...
llvm-svn: 14625
2004-07-04 17:19:21 +00:00
Chris Lattner
c83e510819
Fix potential problems with unreachable basic blocks.
...
Also, while noone's looking, add support for constant expressions. Wait,
I said not to look!
llvm-svn: 14566
2004-07-02 05:49:11 +00:00
Misha Brukman
a691e0bff7
Fix indentation to be 2 spaces.
...
llvm-svn: 14512
2004-06-30 22:11:03 +00:00
Misha Brukman
010e07078b
visitSetCondInst() takes a parameter of type `SetCondInst'
...
llvm-svn: 14508
2004-06-30 21:47:40 +00:00
Brian Gaeke
92bba4c696
Allow saving and restoring of double and float registers.
...
Allow copying of float registers.
llvm-svn: 14445
2004-06-27 22:59:56 +00:00
Brian Gaeke
6edb16d8cd
Add FITOS, FITOD, and F{ADD,SUB,MUL,DIV}{S,D}.
...
llvm-svn: 14444
2004-06-27 22:53:56 +00:00
Brian Gaeke
5b14de32c6
Support printing constant pool indices.
...
If we see an "unknown operand", abort so it's easier to fix it.
llvm-svn: 14441
2004-06-27 22:50:44 +00:00
Brian Gaeke
0cee4d2fb9
Trim whitespace.
...
Support cast of ints (and narrower) to float and double.
Support cast double to double (using load and store).
Abort if we see a CallInst or SetCondInst with long/fp args, instead
of producing bad code.
Support add, sub, mul, div of float and double.
llvm-svn: 14440
2004-06-27 22:47:33 +00:00
Misha Brukman
57b3f07b31
* LowercaseString moved to StringExtras.h
...
* Wrap long line to 80 cols
llvm-svn: 14382
2004-06-24 23:38:20 +00:00
Brian Gaeke
67fe35225a
Add FSTOD and FDTOS conversion instructions.
...
llvm-svn: 14372
2004-06-24 21:22:09 +00:00
Brian Gaeke
8ce4fc5917
Support cast float to float, cast double to float, and cast float to double.
...
(It's not yet clear how to copy doubles from register to register.)
llvm-svn: 14371
2004-06-24 21:22:08 +00:00
Brian Gaeke
003a4a500c
Make the double-fp pseudo registers be "NamedRegs".
...
llvm-svn: 14366
2004-06-24 09:23:21 +00:00
Brian Gaeke
2e0d04003c
Fix a dyn_cast in copyConstantToRegister which should have been a cast.
...
Compactify the code that emits copies of constant ints into registers.
llvm-svn: 14365
2004-06-24 09:17:47 +00:00
Brian Gaeke
734c654e50
The long integer pseudo-regs are history. So long, we hardly knew ye.
...
llvm-svn: 14364
2004-06-24 08:55:21 +00:00
Brian Gaeke
9a7eca6c51
Use correct add*Imm form in more BuildMI calls.
...
Fix bug in emitGEPOperation where we weren't passing MBB, IP to getReg.
(hey, wouldn't a constant expression lowering pass be cool? huh huhuhuh)
Fix bug in emitGEPOperation where we might try to OR a constant into a
register which was too big to fit in the immediate field.
Support and, or, xor of longs.
llvm-svn: 14363
2004-06-24 08:55:09 +00:00
Brian Gaeke
99b4ee166c
Rename the load and store opcodes. The non-fp ones only have one
...
variant worth worrying about; the fp ones have two.
llvm-svn: 14362
2004-06-24 07:37:12 +00:00
Brian Gaeke
8f0aac675d
Rename the load and store opcodes. The non-fp ones only have one
...
variant worth worrying about; the fp ones have two.
Add fp stores.
llvm-svn: 14361
2004-06-24 07:36:59 +00:00
Brian Gaeke
e39ef4e8b9
Rename the load and store opcodes. The non-fp ones only have one
...
variant worth worrying about; the fp ones have two.
Stub out the case analysis of int-to-fp casts (no code yet).
I think the number of operands passed to BuildMI for loads was wrong.
Support load and store of float and double.
llvm-svn: 14360
2004-06-24 07:36:48 +00:00
Brian Gaeke
236ef1542c
Strange as it may sound, we'll not use LDD/STD to store longs. For reasons of
...
representational consistency, we want to address the halves of each 64-bit value
separately.
llvm-svn: 14356
2004-06-24 06:44:57 +00:00
Brian Gaeke
ac14491ad0
Support constant cast expressions.
...
llvm-svn: 14355
2004-06-24 06:33:00 +00:00
Brian Gaeke
771e52d494
Add pseudo-registers and register class for 64-bit integer values.
...
llvm-svn: 14332
2004-06-22 20:14:41 +00:00
Misha Brukman
6a0ace201c
Order #includes as per style guide.
...
llvm-svn: 14305
2004-06-21 21:54:40 +00:00
Chris Lattner
cc465361d9
Move the IntrinsicLowering header into the CodeGen directory, as per PR346
...
llvm-svn: 14266
2004-06-20 07:49:54 +00:00
Brian Gaeke
26336244f5
.zero doesn't work in the Solaris assembler.
...
llvm-svn: 14231
2004-06-18 08:59:16 +00:00
Brian Gaeke
6a8de685b3
Get rid of selects the easy way
...
llvm-svn: 14230
2004-06-18 08:46:15 +00:00
Brian Gaeke
a9daa0a519
Make visitAllocaInst() look more like its X86 counterpart.
...
llvm-svn: 14229
2004-06-18 08:45:52 +00:00
Brian Gaeke
ab4687b176
Mess around with allocation order. In particular, I think we ought to be
...
using the local & in regs first because they are not clobbered by calls.
llvm-svn: 14228
2004-06-18 08:19:08 +00:00
Brian Gaeke
f5697cf56c
JMPL has a delay slot.
...
llvm-svn: 14227
2004-06-18 08:18:54 +00:00
Brian Gaeke
2a5dec63a6
Clean up the commented-out F3_3 stuff.
...
Replace it with a working class for FP instrs.
llvm-svn: 14226
2004-06-18 06:28:21 +00:00
Brian Gaeke
01309de73d
Fix jmpl.
...
Add some FP moves.
llvm-svn: 14225
2004-06-18 06:28:10 +00:00
Brian Gaeke
c045f38dcb
Support printing base+offset pairs where the offset is a register.
...
Use this for printing the jmpl indirect-call instruction.
llvm-svn: 14224
2004-06-18 06:27:59 +00:00
Brian Gaeke
92a3e14ac4
Support intrinsic calls (although no particular intrinsics are supported yet).
...
Support indirect calls.
Support returning a float value.
llvm-svn: 14223
2004-06-18 06:27:48 +00:00
Brian Gaeke
c5f1146e62
Add load instructions for floating-point registers.
...
llvm-svn: 14217
2004-06-18 05:19:27 +00:00
Brian Gaeke
7a618842f1
Support alloca instructions.
...
Support copying floating-point constants to registers.
Add assertion to visitCallInst to abort if we hit a NULL calledFunction, for now.
llvm-svn: 14216
2004-06-18 05:19:16 +00:00
Brian Gaeke
b824469b44
Make storeRegToStackSlot slightly shorter.
...
Make copyRegToReg return 1 instead of -1.
Edit a comment in emitPrologue().
llvm-svn: 14211
2004-06-17 22:34:48 +00:00
Brian Gaeke
9a0dc64af6
Set the isBranch and isTerminator flags on branch instructions correctly.
...
Add a FIXME about the (currently unused) JMPL instructions.
llvm-svn: 14210
2004-06-17 22:34:29 +00:00
Brian Gaeke
c82f209e72
Emit stores correctly; don't fail an assertion.
...
llvm-svn: 14209
2004-06-17 22:34:19 +00:00
Brian Gaeke
d084a534a2
Support generating machine instructions for Phi nodes (based on x86, but with
...
modifications for 1 LLVM BB --> many MBBs).
Fix store operand order: make it always be Base, Offset, SrcReg (think
"[ Base + Offset ] = SrcReg").
Rewrite visitBranchInst() to be even dumber (but working) -- give up on
the branch fallthrough trick, for the time being.
Make visitSetCondInst() work.
llvm-svn: 14208
2004-06-17 22:34:08 +00:00
Brian Gaeke
af2408a4ee
Recognize more branches.
...
llvm-svn: 14207
2004-06-17 22:33:57 +00:00
Brian Gaeke
7d711d517b
Use addGlobalAddress and addMBB for call & branch targets instead of addPCDisp.
...
Abort if we see a PCRelativeDisp MachineOperand, to be safe. This matches
the X86 backend.
llvm-svn: 14202
2004-06-17 19:39:23 +00:00
Chris Lattner
0cd29ae2cd
Rename Type::PrimitiveID to TypeId and ::getPrimitiveID() to ::getTypeID()
...
llvm-svn: 14201
2004-06-17 18:19:28 +00:00
Brian Gaeke
0a7b268b1a
Fix thinko in visitor... ShiftInsts should currently be delegated
...
to visitBinaryOperator.
llvm-svn: 14182
2004-06-15 21:09:46 +00:00
Brian Gaeke
5fe5e06bea
I think we'll use the standard lowering passes for now.
...
llvm-svn: 14179
2004-06-15 20:37:12 +00:00
Brian Gaeke
d5f45ba4a1
Fix bug generating code for void call instructions: don't call
...
getReg() on void value.
llvm-svn: 14178
2004-06-15 20:06:32 +00:00
Brian Gaeke
79008f4648
Squash a warning from the Solaris assembler by aligning the stack
...
on a double-word boundary instead of a single-word boundary.
llvm-svn: 14177
2004-06-15 19:53:10 +00:00
Brian Gaeke
e02c780919
Allow special-casing of operand printing based on opcode. Print
...
non-register, non-immed. arguments to SETHI and OR using %hi() and
%lo() respectively.
llvm-svn: 14176
2004-06-15 19:52:59 +00:00
Brian Gaeke
b158cb6411
Support constant GEP expressions.
...
Support copying long constants to register pairs.
Support copying ConstantPointerNulls and ConstantPointerRefs to registers.
llvm-svn: 14175
2004-06-15 19:16:07 +00:00
Chris Lattner
5ce60a188d
Adjust to new TM interfaces
...
llvm-svn: 13949
2004-06-02 05:47:26 +00:00
Brian Gaeke
7cc5d0f106
Add support for widening integral casts.
...
Flesh out the SetCC support... which currently ends in a little bit
of unfinished code (which is probably completely hilarious) for
generating the condition value splitting the basic block up into 4
blocks, like this (clearly a better API is needed for this!):
BB
cond. branch
/ / R1=1 R2=0
\ /
\ /
R=phi(R1,R2)
Other minor edits.
llvm-svn: 13423
2004-05-08 06:36:14 +00:00
Brian Gaeke
58fd2b0e4a
Add a bunch more branches
...
llvm-svn: 13422
2004-05-08 06:08:29 +00:00
Brian Gaeke
faf41642ca
Flesh out GEP support
...
llvm-svn: 13421
2004-05-08 05:27:20 +00:00
Brian Gaeke
e44dbd4a39
Add ADD with immediate
...
llvm-svn: 13420
2004-05-08 05:26:55 +00:00
Brian Gaeke
5861a59506
Add forms of CMP, SUBCC, and a few branches, and some comments.
...
llvm-svn: 13419
2004-05-08 04:21:32 +00:00
Brian Gaeke
eaf8a021e3
Add stub support for GEPs.
...
Add support for branches (based loosely on X86/InstSelectSimple).
Add support for not visiting phi nodes in the first pass.
Add support for loading bools.
Flesh out support for stores.
llvm-svn: 13418
2004-05-08 04:21:17 +00:00
Brian Gaeke
0d477a958f
Add support for copying bool constants to registers.
...
Disable the code that copies long constants to registers - it looks fishy.
Implement some simple casts: integral, smaller than longs, and equal-width
or narrowing only.
llvm-svn: 13413
2004-05-07 21:39:30 +00:00
Brian Gaeke
336b83623a
I don't think we have to have 4 extra allocated (but unused) bytes on the stack.
...
llvm-svn: 12905
2004-04-13 18:28:37 +00:00
Brian Gaeke
6d8a362874
I started working on casts, but I don't have anything compilable yet.
...
llvm-svn: 12903
2004-04-13 18:27:46 +00:00
Brian Gaeke
6badc5d83b
Don't print [%reg + 0], just print [%reg]
...
llvm-svn: 12759
2004-04-07 17:33:56 +00:00
Brian Gaeke
cb5141b4de
First version of code to handle loads. Stub function for handling stores.
...
llvm-svn: 12758
2004-04-07 17:29:37 +00:00
Brian Gaeke
3e29bc5a19
Support loading arguments from %I0...%I5 into virtual registers in
...
function prologues, and fix an off-by-one in visitCallInst that was
putting call args into the wrong registers.
llvm-svn: 12757
2004-04-07 17:04:09 +00:00
Brian Gaeke
3eb6c1d3ae
It's setting up the call args right now, but on the callee side, it's
...
trying to get incoming args off the stack, instead of the %i0...%i6 regs,
which is wrong.
llvm-svn: 12756
2004-04-07 16:41:22 +00:00
Chris Lattner
37a392dc52
This is a start on handling setcc instructions. As the comment notes, we
...
have no good way of handling this until the code generator is improved.
We should probably just emit V9 instructions in the meantime.
llvm-svn: 12745
2004-04-07 05:04:51 +00:00
Chris Lattner
bb67452b4b
andd subcc instructions which is used to create the 'cmp' pseudo instruction
...
llvm-svn: 12744
2004-04-07 05:04:01 +00:00
Chris Lattner
2f63fbf9d5
Avoid emitting an extra copy on each 32-bit operation
...
llvm-svn: 12743
2004-04-07 04:36:53 +00:00
Brian Gaeke
d98edc771e
Make generation of stack-slot loads and copies less ugly.
...
llvm-svn: 12742
2004-04-07 04:29:14 +00:00
Brian Gaeke
90c53bcbda
Fix bug in printing loads.
...
llvm-svn: 12741
2004-04-07 04:29:03 +00:00
Chris Lattner
be45dbdaf8
Add support for shift instructions, wrap some long lines
...
llvm-svn: 12740
2004-04-07 04:27:16 +00:00
Chris Lattner
ded6e64b53
Fix encoding of existing shift instructions, add rr shifts
...
llvm-svn: 12739
2004-04-07 04:26:57 +00:00
Chris Lattner
13546cb380
Add a bunch more instructions
...
llvm-svn: 12737
2004-04-07 04:06:46 +00:00
Chris Lattner
a58da750eb
Merge my changes with brians
...
llvm-svn: 12736
2004-04-07 04:05:49 +00:00
Brian Gaeke
ece16e53c4
Add in some things I forgot, which Chris helpfully reminded me of...
...
llvm-svn: 12735
2004-04-07 04:05:12 +00:00
Brian Gaeke
4b90f62e6d
Add support for the "Y" register, used by MUL & DIV.
...
llvm-svn: 12734
2004-04-07 04:01:11 +00:00
Brian Gaeke
8651efab54
Add UDIV, SDIV, and a few variants of WR.
...
llvm-svn: 12733
2004-04-07 04:01:00 +00:00
Brian Gaeke
0d35bd3ca9
Preliminary support for getting 64-bit integer constants into registers.
...
Preliminary support for division. It's gross because you have to initialize
the "Y" register, which is the top 32 bits of the thing you're dividing.
llvm-svn: 12732
2004-04-07 04:00:49 +00:00
Brian Gaeke
2aa3485241
Prune unnecessary #includes
...
llvm-svn: 12731
2004-04-06 23:25:07 +00:00
Brian Gaeke
c59ef116a2
Simple delay slot filler pass.
...
llvm-svn: 12730
2004-04-06 23:21:45 +00:00
Brian Gaeke
38ad8d1aea
Add references to delay slot filler pass.
...
Fill in addPassesToJITCompile method.
llvm-svn: 12729
2004-04-06 23:21:24 +00:00
Brian Gaeke
0ee6eb1c1a
First attempt at handling frame index elimination.
...
llvm-svn: 12728
2004-04-06 22:10:22 +00:00
Brian Gaeke
b7f86edbf3
First attempt at special-casing printing of [%reg + offset] for
...
ld/st instructions - doesn't seem to work yet, but I think it's
just a typo or something somewhere.
llvm-svn: 12727
2004-04-06 22:10:11 +00:00
Brian Gaeke
74d26802a4
Delete reference to "the Mach-O Runtime ABI".
...
llvm-svn: 12726
2004-04-06 22:09:59 +00:00
Brian Gaeke
da22005285
Deal with call return values.
...
Don't put NOPs in delay slots at all. We'll have a fix-up pass later.
llvm-svn: 12725
2004-04-06 22:09:23 +00:00
Brian Gaeke
dec12ea71d
Add support for many of the MRegisterInfo callbacks.
...
Eliminating call-frame pseudo instrs and frame indices are still stubs.
Flesh out the emitPrologue method based on better ABI knowledge.
llvm-svn: 12632
2004-04-02 20:53:37 +00:00
Brian Gaeke
b2d36cced3
Add load, store, and NOP instructions.
...
Fix up comments.
llvm-svn: 12631
2004-04-02 20:53:37 +00:00
Brian Gaeke
741518f9f6
Add support for printing pc-relative displacements of functions (as used in
...
the CALL instruction).
llvm-svn: 12630
2004-04-02 20:53:35 +00:00
Brian Gaeke
10ab592570
Add support for call instructions (0-ary only for now).
...
llvm-svn: 12629
2004-04-02 20:53:33 +00:00
Brian Gaeke
c1c4cfd741
The .type directive on Solaris uses the # character instead of @.
...
llvm-svn: 12454
2004-03-16 22:52:04 +00:00
Brian Gaeke
f97393aebf
Fix bug in zero-extending of shorts.
...
llvm-svn: 12453
2004-03-16 22:45:42 +00:00
Brian Gaeke
26deccbffb
Add UMULrr and SMULrr instructions.
...
llvm-svn: 12452
2004-03-16 22:37:13 +00:00
Brian Gaeke
fd02eeae64
Use ! for comment char; it works in both Solaris as and GAS.
...
llvm-svn: 12451
2004-03-16 22:37:12 +00:00
Brian Gaeke
199ba20b20
Make getClass more robust by adding cLong.
...
Add handling for Mul instruction.
llvm-svn: 12450
2004-03-16 22:37:11 +00:00
Brian Gaeke
de0239b2a6
Hmm, who left this sitting around in my tree
...
llvm-svn: 12255
2004-03-09 04:49:13 +00:00
Chris Lattner
a7180252e6
Avoid allocating special registers a bit more robustly
...
llvm-svn: 12207
2004-03-08 03:48:07 +00:00
Brian Gaeke
4bb4ec2388
Support return values of basic integer types.
...
Emit RETL instruction to return instead of funny JMPL.
Fix indentation.
llvm-svn: 12186
2004-03-06 05:32:28 +00:00
Brian Gaeke
855518207c
Sort stanzas into Sparc V8 book page number order.
...
Add RET, RETL. Rename SAVE, RESTORE & JMPL for consistency.
llvm-svn: 12185
2004-03-06 05:32:13 +00:00
Brian Gaeke
813f0d8512
Hack it so we do not try to allocate values to G0.
...
llvm-svn: 12184
2004-03-06 05:31:32 +00:00
Brian Gaeke
a265c3c4df
Make prolog align stack properly. Make epilog not touch any registers.
...
llvm-svn: 12183
2004-03-06 05:31:21 +00:00
Brian Gaeke
b4258231ca
Emit register names in lowercase, as required by the assembler.
...
llvm-svn: 12182
2004-03-06 05:30:21 +00:00
Brian Gaeke
13f3e2f254
Teach getRegClassForType where to find FP registers
...
llvm-svn: 12180
2004-03-06 03:54:13 +00:00
Brian Gaeke
689af03601
Asm output is looking a lot better; not correct for all operands yet though.
...
llvm-svn: 12143
2004-03-05 08:39:09 +00:00
Brian Gaeke
a24ac9bf8b
Support -print-machineinstrs
...
llvm-svn: 12124
2004-03-04 19:22:16 +00:00
Brian Gaeke
9c6c572f24
Asm printer support, based on x86 - only prints mnemonics for now
...
llvm-svn: 12113
2004-03-04 06:00:41 +00:00
Brian Gaeke
f8440c5a60
Double-FP pseudo-registers.
...
llvm-svn: 12112
2004-03-04 05:15:03 +00:00
Brian Gaeke
b2f869ee43
Subtract instructions; minor cleanups
...
llvm-svn: 12111
2004-03-04 04:37:45 +00:00
Brian Gaeke
0d71671bcf
Floating point regs
...
llvm-svn: 12110
2004-03-04 04:37:22 +00:00
Brian Gaeke
9ebecfdfe0
Simple copyConstantToReg support, SETHIi and ORri
...
llvm-svn: 12107
2004-03-04 00:56:25 +00:00
Brian Gaeke
324c928e36
Support add - note, still missing important copyConstantToRegister stuff
...
llvm-svn: 12106
2004-03-03 23:03:14 +00:00
Brian Gaeke
b78f8498f0
TargetCacheInfo has been removed; its only uses were to propagate a constant
...
(16) into certain areas of the SPARC V9 back-end. I'm fairly sure the US IIIi's
dcache has 32-byte lines, so I'm not sure where the 16 came from. However, in
the interest of not breaking things any more than they already are, I'm going
to leave the constant alone.
llvm-svn: 12043
2004-03-01 06:43:29 +00:00
Chris Lattner
c2977ac665
Adjust to change in TII ctor arguments
...
llvm-svn: 11987
2004-02-29 06:31:44 +00:00
Chris Lattner
cfc8f02250
These two virtual methods are never called.
...
llvm-svn: 11984
2004-02-29 05:59:33 +00:00
Chris Lattner
7cb71a20ca
Implement initial prolog/epilog code insertion methods.
...
llvm-svn: 11979
2004-02-29 05:18:30 +00:00
Chris Lattner
800f720e7b
Add an instruction selector capable of selecting 'ret void'
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llvm-svn: 11973
2004-02-29 00:27:00 +00:00
Chris Lattner
3583890ab7
Change this so that LLC actually tries to run the code generator, though it will
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immediately abort due to lack of an instruction selector. :)
llvm-svn: 11963
2004-02-28 20:21:45 +00:00
Chris Lattner
3852b0c3b8
Finegrainify namespacification
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llvm-svn: 11958
2004-02-28 19:52:49 +00:00
Chris Lattner
88268605ec
Tab completion is our friend.
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llvm-svn: 11957
2004-02-28 19:45:39 +00:00
Chris Lattner
013aa47975
Clean up rules
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llvm-svn: 11956
2004-02-28 19:43:40 +00:00
Chris Lattner
d2bb7e91b0
Bring this directory into "it actually compiles" land
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llvm-svn: 11955
2004-02-28 19:37:18 +00:00
Chris Lattner
3f70429d28
Fix multiple inclusion problem
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llvm-svn: 11954
2004-02-28 19:31:32 +00:00
Misha Brukman
3d1720cdb9
Instructions to call and return from functions.
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llvm-svn: 11858
2004-02-26 00:37:12 +00:00
Misha Brukman
6a13621948
SparcV8 regs are really 32-bit, not 64! Thanks, Chris.
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llvm-svn: 11835
2004-02-25 21:03:02 +00:00
Misha Brukman
f12c1e5a55
Clean up the tablegen descriptions for SparcV8.
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llvm-svn: 11834
2004-02-25 21:02:21 +00:00
Misha Brukman
c8801eb5be
Fix the SparcV8 register definitions that were imported from PPC template.
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llvm-svn: 11833
2004-02-25 21:00:05 +00:00
Misha Brukman
a4b3e0f01b
SparcV8 has different types of instructions, but F1 is only used for CALL.
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llvm-svn: 11832
2004-02-25 20:52:20 +00:00
Brian Gaeke
5166390fd2
SparcV8 skeleton
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llvm-svn: 11828
2004-02-25 19:28:19 +00:00