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72 Commits

Author SHA1 Message Date
Akira Hatanaka
89801a318c Make $fp and $ra callee-saved registers and let PrologEpilogInserter handle 
saving and restoring them.

llvm-svn: 131745
 2011-05-20 18:39:33 +00:00
Akira Hatanaka
9736ffe863 Fix bug in which nodes that write to argument registers do not get glued with the JALR node. Patch by Sasa Stankovic 
llvm-svn: 131714
 2011-05-20 02:30:51 +00:00
Akira Hatanaka
669a518bab Align i64 arguments to 64 bit boundaries. 
llvm-svn: 131668
 2011-05-19 20:29:48 +00:00
Akira Hatanaka
8ab44cecb4 Remove LLVM IR metadata in test case committed in r130847. 
llvm-svn: 130849
 2011-05-04 18:28:36 +00:00
Akira Hatanaka
e9a2d2a78f Prevent instructions using $gp from being placed between a jalr and the instruction that restores the clobbered $gp. 
llvm-svn: 130847
 2011-05-04 17:54:27 +00:00
Jakob Stoklund Olesen
307c86d1ee Don't run this test through -regalloc=basic. 
The basic allocator is really bad about hinting, so it doesn't eliminate all
copies when physreg joining is disabled.

llvm-svn: 130817
 2011-05-04 01:01:44 +00:00
Akira Hatanaka
59b356bcc3 Lower BlockAddress node when relocation-model is static. 
llvm-svn: 130131
 2011-04-25 17:10:45 +00:00
Jakob Stoklund Olesen
c9861cc9f6 Make tests register allocation independent again. 
llvm-svn: 129739
 2011-04-19 00:14:43 +00:00
Akira Hatanaka
ee5ee33cfc Re-enable test o32_cc_vararg.ll. 
llvm-svn: 129616
 2011-04-15 22:23:09 +00:00
Akira Hatanaka
025720d06f Add pass that expands pseudo instructions into target instructions after register allocation. Define pseudos that get expanded into mtc1 or mfc1 instructions. 
llvm-svn: 129594
 2011-04-15 19:52:08 +00:00
Andrew Trick
916e01c917 Recommit r129383. PreRA scheduler heuristic fixes: VRegCycle, TokenFactor latency. 
Additional fixes:
Do something reasonable for subtargets with generic
itineraries by handle node latency the same as for an empty
itinerary. Now nodes default to unit latency unless an itinerary
explicitly specifies a zero cycle stage or it is a TokenFactor chain.

Original fixes:
UnitsSharePred was a source of randomness in the scheduler: node
priority depended on the queue data structure. I rewrote the recent
VRegCycle heuristics to completely replace the old heuristic without
any randomness. To make the ndoe latency adjustments work, I also
needed to do something a little more reasonable with TokenFactor. I
gave it zero latency to its consumers and always schedule it as low as
possible.

llvm-svn: 129421
 2011-04-13 00:38:32 +00:00
Akira Hatanaka
24e15bbe94 Fix handling of functions with internal linkage. 
llvm-svn: 129099
 2011-04-07 19:51:44 +00:00
Jakob Stoklund Olesen
a0e0f8d74b These tests no longer require linear scan because reserved register coalescing is now universal. 
llvm-svn: 128936
 2011-04-05 21:40:41 +00:00
Akira Hatanaka
c2d74b05ca Add code for analyzing FP branches. Clean up branch Analysis functions. 
llvm-svn: 128718
 2011-04-01 17:39:08 +00:00
Jakob Stoklund Olesen
36c7c9d42d Fix Mips, Sparc, and XCore tests that were dependent on register allocation. 
Add an extra run with -regalloc=basic to keep them honest.

llvm-svn: 128654
 2011-03-31 18:42:43 +00:00
Akira Hatanaka
b26c89ee68 Added support for FP conditional move instructions and fixed bugs in handling of FP comparisons. 
llvm-svn: 128650
 2011-03-31 18:26:17 +00:00
Daniel Dunbar
11a8b6c4ff Revert "Re-enable test and hope to silence the buildbots", still broken. 
llvm-svn: 127369
 2011-03-09 22:48:46 +00:00
Bruno Cardoso Lopes
f34376b0e1 Add a testcase for the addc improvements introduced some commits ago. Patch by Akira Hatanaka 
llvm-svn: 127358
 2011-03-09 21:05:32 +00:00
Bruno Cardoso Lopes
51df3638f8 Re-enable test and hope to silence the buildbots 
llvm-svn: 127357
 2011-03-09 21:00:16 +00:00
Bruno Cardoso Lopes
64f0169989 try to make o32 cc tests less specific to silence some buildbots. The test isn't enabled yet, this is will be done in a subsequent commit. Patch by Akira Hatanaka. 
llvm-svn: 127356
 2011-03-09 20:59:05 +00:00
Bruno Cardoso Lopes
88bef593d8 Improve varags handling, with testcases. Patch by Sasa Stankovic 
llvm-svn: 127349
 2011-03-09 19:22:22 +00:00
Bruno Cardoso Lopes
52c64a2eb3 Improve div/rem node handling on mips. Patch by Akira Hatanaka 
llvm-svn: 127034
 2011-03-04 21:03:24 +00:00
Bruno Cardoso Lopes
1deaf83a77 Add testcase for r127032 
llvm-svn: 127033
 2011-03-04 20:48:39 +00:00
Joerg Sonnenberger
5f2f5fa638 Be nice to Xcore and the XMOS assembler and avoid quoting section names 
that contain only letters, digits and the characters "_" and ".".

llvm-svn: 127028
 2011-03-04 20:03:14 +00:00
Bruno Cardoso Lopes
99619e5bef Lowers block address. Currently asserts when relocation model is not PIC. Patch by Akira Hatanaka 
llvm-svn: 127027
 2011-03-04 20:01:52 +00:00
Joerg Sonnenberger
bb93506f95 Bug#9033: For the ELF assembler output, always quote the section name. 
llvm-svn: 126963
 2011-03-03 22:31:08 +00:00
Daniel Dunbar
5620b11961 Disable this test for now... 
llvm-svn: 125361
 2011-02-11 02:59:08 +00:00
Bruno Cardoso Lopes
3792d82914 Add mips o32 tests again with the hope that the buildbot won't complaint again 
llvm-svn: 125316
 2011-02-10 23:37:20 +00:00
Bruno Cardoso Lopes
c9968d544b Remove the test to silence the buildbot, will check it in again with a proper fix soon 
llvm-svn: 125305
 2011-02-10 20:10:17 +00:00
Bruno Cardoso Lopes
7cc40009a8 Fix a lot of o32 CC issues and add a bunch of tests. Patch by Akira Hatanaka with some small modifications by me. 
llvm-svn: 125292
 2011-02-10 18:05:10 +00:00
Bruno Cardoso Lopes
6c5db0236a Add support for mips32 madd and msub instructions. Patch by Akira Hatanaka 
llvm-svn: 123760
 2011-01-18 19:29:17 +00:00
Rafael Espindola
9afb7af08a Update tests. 
llvm-svn: 123591
 2011-01-16 18:02:57 +00:00
Bruno Cardoso Lopes
93e5c2fb64 Add ROTR and ROTRV mips32 instructions. Patch by Akira Hatanaka 
llvm-svn: 121377
 2010-12-09 17:32:30 +00:00
Bruno Cardoso Lopes
0e14644599 Match a pattern generated by a dag combiner opt where: 
(select (load (load tga0)) (load tga1)) => (load (select (load tga0) tga1))

Thanks to Akira for pointing that.

llvm-svn: 121163
 2010-12-07 19:00:20 +00:00
Devang Patel
6fe7fe8dd4 If dbg_declare() or dbg_value() is not lowered by isel then emit DEBUG message instead of creating DBG_VALUE for undefined value in reg0. 
llvm-svn: 121059
 2010-12-06 22:39:26 +00:00
Bruno Cardoso Lopes
37f2439cbd Enable mips32 mul instruction. Patch by Akira Hatanaka <ahatanaka@mips.com> 
llvm-svn: 118864
 2010-11-12 00:38:32 +00:00
Bruno Cardoso Lopes
c911863e01 Add a test to the previous added clo instruction. Patch by Akira again 
llvm-svn: 118668
 2010-11-10 02:22:44 +00:00
Evan Cheng
1ce02d180e Enable machine sinking critical edge splitting. e.g. 
define double @foo(double %x, double %y, i1 %c) nounwind {
  %a = fdiv double %x, 3.2
  %z = select i1 %c, double %a, double %y
  ret double %z
}

Was:
_foo:
        divsd   LCPI0_0(%rip), %xmm0
        testb   $1, %dil
        jne     LBB0_2
        movaps  %xmm1, %xmm0
LBB0_2:
        ret

Now:
_foo:
        testb   $1, %dil
        je      LBB0_2
        divsd   LCPI0_0(%rip), %xmm0
        ret
LBB0_2:
        movaps  %xmm1, %xmm0
        ret

This avoids the divsd when early exit is taken.
rdar://8454886

llvm-svn: 114372
 2010-09-20 22:52:00 +00:00
Duncan Sands
254f8ff0a6 Correct bogus module triple specifications. 
llvm-svn: 112469
 2010-08-30 10:48:29 +00:00
Bruno Cardoso Lopes
0fa595f073 Fix PR7174, a couple o Mips fixes: 
- Fix a typo for PIC check during jmp table lowering
- Also fix the "first jump table basic block is not
considered only reachable by fall through" problem, use this
ad-hoc solution until I come up with something better.

Patch by stetorvs@gmail.com

llvm-svn: 108820
 2010-07-20 08:37:04 +00:00
Bruno Cardoso Lopes
b127fa9a01 Fix Mips PR7473. Patch by stetorvs@gmail.com 
llvm-svn: 108816
 2010-07-20 07:58:51 +00:00
Dan Gohman
5736cd1e47 Start function numbering at 0. 
llvm-svn: 101638
 2010-04-17 16:29:15 +00:00
Dale Johannesen
4cdb545401 Split big test into multiple directories to cater to 
those who don't build all targets.

llvm-svn: 100688
 2010-04-07 20:43:35 +00:00
Dan Gohman
5fa04f2707 Delete useless trailing semicolons. 
llvm-svn: 92740
 2010-01-05 17:55:26 +00:00
Bruno Cardoso Lopes
038281c523 Support PIC loading of constant pool entries 
llvm-svn: 89863
 2009-11-25 12:17:58 +00:00
Daniel Dunbar
cfcc2952fb Unbreak test, Bruno please check. 
llvm-svn: 89329
 2009-11-19 07:18:49 +00:00
Bruno Cardoso Lopes
bf95b9699e - Add sugregister logic to handle f64=(f32,f32). 
- Support mips1 like load/store of doubles:

Instead of:
  sdc $f0, X($3)
Generate:
  swc $f0, X($3)
  swc $f1, X+4($3)

llvm-svn: 89322
 2009-11-19 06:06:13 +00:00
Evan Cheng
5c06a152a8 xfail for now. It has been failing. 
llvm-svn: 88892
 2009-11-16 05:44:04 +00:00
Bruno Cardoso Lopes
21ca44ba49 - Fix a small bug while handling target constant pools (one param was missing). 
- Add a smarter constant pool loading, instead of:

lui $2, %hi($CPI1_0)
addiu $2, $2, %lo($CPI1_0)
lwc1 $f0, 0($2)

Generate:

lui $2, %hi($CPI1_0)
lwc1 $f0, %lo($CPI1_0)($2)

llvm-svn: 88886
 2009-11-16 04:33:42 +00:00
Dan Gohman
142428ce64 Eliminate more uses of llvm-as and llvm-dis. 
llvm-svn: 81293
 2009-09-09 00:09:15 +00:00