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Commit Graph

128366 Commits

Author SHA1 Message Date
Matt Arsenault
d89dec289d AMDGPU: Match more med3 integer patterns
llvm-svn: 262864
2016-03-07 21:54:48 +00:00
Quentin Colombet
adaa42e9e7 [MIR] Teach the parser how to handle the size of generic virtual registers.
llvm-svn: 262862
2016-03-07 21:48:43 +00:00
Quentin Colombet
732081b83a [MachineRegisterInfo] Add a method to set the size of a virtual register a posteriori.
This is required for mir testing.

llvm-svn: 262861
2016-03-07 21:41:39 +00:00
Amaury Sechet
6941ebec51 Small formating change in Core.cpp . NFC
llvm-svn: 262860
2016-03-07 21:39:20 +00:00
Quentin Colombet
264b1a3444 [MachineRegisterInfo] Get rid of the global-isel ifdefs.
One additional pointer is not a big deal size-wise and it makes
the code much nicer!

llvm-svn: 262856
2016-03-07 21:22:09 +00:00
Matt Arsenault
773269eba0 AMDGPU: Remove a fixme for ptrrtoint handling
llvm-svn: 262854
2016-03-07 21:12:46 +00:00
Matt Arsenault
e24a001b35 AMDGPU: Move function only used by R600
llvm-svn: 262853
2016-03-07 21:10:13 +00:00
Matt Arsenault
42c5afa8f6 DAGCombiner: Check legality before creating extract_vector_elt
Problem not hit by any in tree target.

llvm-svn: 262852
2016-03-07 21:10:09 +00:00
Justin Bogner
20ba8abacb SelectionDAG: Remove some unused AtomicSDNode constructors. NFC
llvm-svn: 262849
2016-03-07 20:15:12 +00:00
Adam Nemet
9244a6e185 [LoopDataPrefetch] If prefetch distance is not set, skip pass
This lets select sub-targets enable this pass.  The patch implements the
idea from the recent llvm-dev thread:
http://thread.gmane.org/gmane.comp.compilers.llvm.devel/94925

The goal is to enable the LoopDataPrefetch pass for the Cyclone
sub-target only within Aarch64.

Positive and negative tests will be included in an upcoming patch that
enables selective prefetching of large-strided accesses on Cyclone.

llvm-svn: 262844
2016-03-07 18:35:42 +00:00
Marina Yatsina
dcbfbce154 [ms-inline-asm][AVX512] Add ability to use k registers in MS inline asm + fix bag with curly braces
Until now curly braces could only be used in MS inline assembly to mark block start/end.
All curly braces were removed completely at a very early stage.
This approach caused bugs like:
"m{o}v eax, ebx" turned into "mov eax, ebx" without any error.

In addition, AVX-512 added special operands (e.g., k registers), which are also surrounded by curly braces that mark them as such.
Now, we need to keep the curly braces and identify at a later stage if they are marking block start/end (if so, ignore them), or surrounding special AVX-512 operands (if so, parse them as such).

This patch fixes the bug described above and enables the use of AVX-512 special operands.

This commit is the the llvm part of the patch.
The clang part of the review is: http://reviews.llvm.org/D17766
The llvm part of the review is: http://reviews.llvm.org/D17767

Differential Revision: http://reviews.llvm.org/D17767

llvm-svn: 262843
2016-03-07 18:11:16 +00:00
Adam Nemet
1e851654db [ScopedNoAliasAA] Make test basic.ll less confusing
Summary:
This testcase had me confused.  It made me believe that you can use
alias scopes and alias scopes list interchangeably with alias.scope and
noalias.  Both langref and the other testcase use scope lists so I went
looking.

Turns out using scope directly only happens to work by chance.  When
ScopedNoAliasAAResult::mayAliasInScopes traverses this as a scope list:

!1 = !{!1, !0, !"some scope"}

, the first entry is in fact a scope but only because the scope is
happened to be defined self-referentially to make it unique globally.

The remaining elements in the tuple (!0, !"some scope") are considered
as scopes but AliasScopeNode::getDomain will just bail on those without
any error.

This change avoids this ambiguity in the test but I've also been
wondering if we should issue some sort of a diagnostics.

Reviewers: dexonsmith, hfinkel

Subscribers: mssimpso, llvm-commits

Differential Revision: http://reviews.llvm.org/D16670

llvm-svn: 262841
2016-03-07 17:49:10 +00:00
Adam Nemet
982570992d Revert "Enable LoopLoadElimination by default"
This reverts commit r262250.

It causes SPEC2006/gcc to generate wrong result (166.s) in AArch64 when
running with *ref* data set.  The error happens with
"-Ofast -flto -fuse-ld=gold" or "-O3 -fno-strict-aliasing".

llvm-svn: 262839
2016-03-07 17:38:02 +00:00
Chandler Carruth
15230fca89 [memdep] Switch to range based for loops.
llvm-svn: 262831
2016-03-07 15:12:57 +00:00
Chandler Carruth
c485afdd8a [DFSan] Remove an overly aggressive assert reported in PR26068.
This code has been successfully used to bootstrap libc++ in a no-asserts
mode for a very long time, so the code that follows cannot be completely
incorrect. I've added a test that shows the current behavior for this
kind of code with DFSan. If it is desirable for DFSan to do something
special when processing an invoke of a variadic function, it can be
added, but we shouldn't keep an assert that we've been ignoring due to
release builds anyways.

llvm-svn: 262829
2016-03-07 14:05:09 +00:00
Chandler Carruth
4e6f356033 [memdep] Switch a function to return true on success instead of false.
This is much more clear and less surprising IMO. It also makes things
more consistent with the increasingly large chunk of LLVM code that
assumes true-on-success.

llvm-svn: 262826
2016-03-07 12:45:07 +00:00
Chandler Carruth
8c30dbaf26 [memdep] Cleanup the implementation doxygen comments and remove
duplicated comments.

In several cases these had diverged making them especially nice to
canonicalize. I checked to make sure we weren't losing important
information of course.

llvm-svn: 262825
2016-03-07 12:30:06 +00:00
Chandler Carruth
b14462d39d [memdep] Finish cleaning up all of the comments' doxygen.
llvm-svn: 262824
2016-03-07 11:27:56 +00:00
Chandler Carruth
2749312ce4 [memdep] Switch from a hacky use of PointerIntPair and poorly chosen
arbitrary integers cast to Instruction pointers to a sum type over
Instruction * and a PointerEmbeddedInt.

No functionality changed.

Differential Revision: http://reviews.llvm.org/D15845

llvm-svn: 262823
2016-03-07 11:04:46 +00:00
Chandler Carruth
c463578651 [memdep] Update the comments' doxygen style and place them more clearly.
Just cleaning this up, no functionality changed. Next up will be moving
it to use the sum type instead of arbitrary "pointer"-like enums.

llvm-svn: 262822
2016-03-07 10:35:02 +00:00
Chandler Carruth
e6d2c0f6b5 [memdep] Run clang-format over the header before porting it to
the new pass manager.

The port will involve substantial edits here, and would likely introduce
bad formatting if formatted in isolation, so just get all the formatting
up to snuff. I'll also go through and try to freshen the doxygen here as
well as modernizing some of the code.

llvm-svn: 262821
2016-03-07 10:19:30 +00:00
Craig Topper
6445e0ecee [CodeGen] Add space-optimized EmitMergeInputChains1_2 to the DAG isel matching tables. Shaves about 5100 bytes from the X86 matcher table. NFC
llvm-svn: 262815
2016-03-07 07:29:12 +00:00
Mehdi Amini
a4f4ae8aaf Add a new insert_as() method to DenseMap and use it for ConstantUniqueMap
Just like the existing find_as() method, the new insert_as() accepts
an extra parameter which is used as a key to find the bucket in the
map.
When creating a Constant, we want to check the map before actually
creating the object. In this case we have to perform two queries to
the map, and this extra parameter can save recomputing the hash value
for the second query.

This is a reapply of r260458, that was reverted because it was
suspected to be the cause of instability of an internal bot, but
wasn't confirmed.

Differential Revision: http://reviews.llvm.org/D16268

From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 262812
2016-03-07 00:51:00 +00:00
Mehdi Amini
2530639bee Bitcode reader: Inline readAbbreviatedField in readRecord and move the enclosing loop in each case (NFC)
Summary: This make readRecord 20% faster, measured on an LTO build

Reviewers: rafael

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D17911

From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 262811
2016-03-07 00:38:09 +00:00
NAKAMURA Takumi
6a76c59fc3 Revert r130657, "Windows/DynamicLibrary.inc: Clean up ELM_Callback. We may check the decl instead of the versions of individual libraries."
We may assume the type of 1st argument as PCSTR in PENUMLOADED_MODULES_CALLBACK. PSTR was in the ancient mingw32.

llvm-svn: 262810
2016-03-07 00:13:09 +00:00
Simon Pilgrim
2df8497807 [X86][AVX512] Fixed VPERMT2* shuffle mask decoding and enabled target shuffle combining.
Patch to add support for target shuffle combining of X86ISD::VPERMV3 nodes, including support for detecting unary shuffles.

This uncovered several issues with the X86ISD::VPERMV3 shuffle mask decoding of non-64 bit shuffle mask elements - the bit masking wasn't being correctly computed.

Removed non-constant pool mask decode path as we have no way of testing it right now.

Differential Revision: http://reviews.llvm.org/D17916

llvm-svn: 262809
2016-03-06 21:54:52 +00:00
Valery Pykhtin
78abad3379 [AMDGPU] Using table-driven amd_kernel_code_t field parser in assembler.
Engages code from r262804.

Differential Revision: http://reviews.llvm.org/D17151

llvm-svn: 262808
2016-03-06 20:25:36 +00:00
Valery Pykhtin
cc0f8f9567 fix sanitizer-ppc64be-linux failure for r262804
error: moving a local object in a return statement prevents copy elision [-Werror,-Wpessimizing-move]

http://lab.llvm.org:8011/builders/sanitizer-ppc64be-linux/builds/930

llvm-svn: 262805
2016-03-06 15:13:54 +00:00
Valery Pykhtin
7df6fd953a [AMDGPU] table-driven parser/printer for amd_kernel_code_t structure fields
Differential Revision: http://reviews.llvm.org/D17150

llvm-svn: 262804
2016-03-06 13:27:13 +00:00
Igor Breger
c376e5b7a2 AVX512BW: Support llvm intrinsic masked vector load/store for i8/i16 element types on SKX
Differential Revision: http://reviews.llvm.org/D17913

llvm-svn: 262803
2016-03-06 12:38:58 +00:00
Wilfred Hughes
9703a437cc Fix typo.
llvm-svn: 262802
2016-03-06 12:37:34 +00:00
Valery Pykhtin
a9fc8dac69 [AMDGPU] SOPxx instructions operand naming fixed in td files.
dst -> sdst
ssrcN -> srcN

Differential Revision: http://reviews.llvm.org/D17646

llvm-svn: 262801
2016-03-06 10:31:44 +00:00
Craig Topper
1ff9694fdd [X86] Use high bits of return value from getEncoding instead of predicate functions to populate the REX and VEX prefix bits that extend register encodings. NFC
llvm-svn: 262800
2016-03-06 08:12:47 +00:00
Craig Topper
83f6a31d8f [X86] Remove unnecessary masking. The assert above it already guaranteed it. NFC
llvm-svn: 262799
2016-03-06 08:12:44 +00:00
Craig Topper
30785a5dd9 [X86] Use uint8_t instead of unsigned char as it shortens the code and more explicitly reflects the desired size.
llvm-svn: 262798
2016-03-06 08:12:42 +00:00
Igor Breger
d0d6119cbd AVX512: Remove VSHRI kmask patterns from TD file. It is incorrect to use kshiftw to implement VSHRI v4i1 , bits 15-4 is undef so the upper bits of v4i1 may not be zeroed. v4i1 should be zero_extend to v16i1 ( or any natively supported vector).
Differential Revision: http://reviews.llvm.org/D17763

llvm-svn: 262797
2016-03-06 07:46:03 +00:00
Saleem Abdulrasool
2c4c7d140a unitests: add some ARM TargetParser tests
The ARM TargetParser would construct invalid StringRefs.  This would cause
asserts to trigger.  Add some tests in LLVM to ensure that we dont regress on
this in the future.  Although there is a test for this in clang, this ensures
that the changes would get caught in the same repository.

llvm-svn: 262790
2016-03-06 04:50:55 +00:00
Alexander Kornienko
719b432be1 [docs] Updated docs to work with Doxygen 1.8.11
llvm-svn: 262786
2016-03-06 03:50:08 +00:00
Simon Pilgrim
0c991e17ab [X86][AVX] Improved VPERMILPS variable shuffle mask decoding.
Added support for decoding VPERMILPS variable shuffle masks that aren't in the constant pool.

Added target shuffle mask decoding for SCALAR_TO_VECTOR+VZEXT_MOVL cases - these can happen for v2i64 constant re-materialization

Followup to D17681

llvm-svn: 262784
2016-03-05 22:53:31 +00:00
Simon Pilgrim
203d86217a [X86] AMD Bobcat CPU (btver1) doesn't support XSAVE
btver1 is a SSSE3/SSE4a only CPU - it doesn't have AVX and doesn't support XSAVE.

Differential Revision: http://reviews.llvm.org/D17683

llvm-svn: 262782
2016-03-05 22:00:50 +00:00
Saleem Abdulrasool
6159f0c20b Support: catch invalid accesses
It is possible to invoke these methods on an invalid input resulting in an
invalid substring construction.  It seems that we do not have unit tests for
these methods.  Tests to ensure that the invalid call is caught to follow in
clang.

Resolves PR26839.

llvm-svn: 262778
2016-03-05 20:00:44 +00:00
Saleem Abdulrasool
24d4acb669 ExecutionEngine: tweak debug log
Add a newline to separate the log message.  NFC.

llvm-svn: 262777
2016-03-05 20:00:41 +00:00
Yaron Keren
558c9aa7c4 Replace GlobalScopeAsm[GlobalScopeAsm.size()-1] with GlobalScopeAsm.back(), NFC.
llvm-svn: 262775
2016-03-05 16:02:09 +00:00
Krzysztof Parzyszek
c3a6777f22 Add DAG mutation interface to the post-RA scheduler
Differential Revision: http://reviews.llvm.org/D17868

llvm-svn: 262774
2016-03-05 15:45:23 +00:00
Chandler Carruth
b71262805a [aa-eval] Enhance the comments to better describe the overview of why
this pass exists.

This is based on feedback received when moving this comment from the source
file to a new header file.

Differential Revision: http://reviews.llvm.org/D17476

llvm-svn: 262769
2016-03-05 08:20:15 +00:00
Matthias Braun
d7e6a2dcfd RegisterCoalescer: Remap subregister lanemasks before exchanging operands
Rematerializing and merging into a bigger register class at the same
time, requires the subregister range lanemasks getting remapped to the
new register class.

This fixes http://llvm.org/PR26805

llvm-svn: 262768
2016-03-05 04:36:13 +00:00
Matthias Braun
2662d0d0fe RegisterCoalescer: Need to check DstReg+SrcReg for missing undef flags
copy coalescing with enabled subregister liveness can reveal undef uses,
previously this was only checked for the SrcReg in updateRegDefsUses()
but we need to check DstReg as well.

llvm-svn: 262767
2016-03-05 04:36:10 +00:00
Matthias Braun
0e737a768d RegisterPressure: Small cleanup
llvm-svn: 262766
2016-03-05 04:36:08 +00:00
Quentin Colombet
32c807a283 [X86] Fix the lowering of setjmp intrinsic on i386.
When the lowering of the setjmp intrinsic requires
a global base pointer to be set, make sure such pointer
gets defined by the CGBR pass.

This fixes PR26742.

llvm-svn: 262762
2016-03-05 00:31:04 +00:00
Quentin Colombet
7f05c4b72c Add missing triple in my previous commit!
llvm-svn: 262760
2016-03-04 23:36:32 +00:00