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Commit Graph

151936 Commits

Author SHA1 Message Date
Andrew Zhogin
5e9e3f7cd4 [DAGCombiner] Recognise vector rotations with non-splat constants
Fixes PR33691.

Differential revision: https://reviews.llvm.org/D35381

llvm-svn: 308150
2017-07-16 23:11:45 +00:00
Dylan McKay
e228272ebd [AVR] Fix a typo in the tests
llvm-svn: 308148
2017-07-16 22:31:07 +00:00
Konstantin Zhuravlyov
12b4051c8d AMDGPU: Fix amdgpu-flat-work-group-size/amdgpu-waves-per-eu check
Differential Revision: https://reviews.llvm.org/D35433

llvm-svn: 308147
2017-07-16 19:38:47 +00:00
Simon Pilgrim
931bcda64f [X86][AVX512] Add 512-bit vector rotate tests
llvm-svn: 308146
2017-07-16 19:26:49 +00:00
Konstantin Zhuravlyov
72fb813b49 AMDGPU: Remove duplicate print outs from .AMDGPU.csdata
Differential Revision: https://reviews.llvm.org/D35428

llvm-svn: 308145
2017-07-16 19:24:08 +00:00
Davide Italiano
cafe7229d5 [InstCombine] Don't violate dominance when replacing instructions.
Differential Revision:  https://reviews.llvm.org/D35376

llvm-svn: 308144
2017-07-16 18:56:30 +00:00
Simon Pilgrim
780d5afaef Strip trailing whitespace. NFCI
llvm-svn: 308143
2017-07-16 18:37:23 +00:00
Amjad Aboud
dec4b2327f [X86] X86::CMOV to Branch heuristic based optimization.
LLVM compiler recognizes opportunities to transform a branch into IR select instruction(s) - later it will be lowered into X86::CMOV instruction, assuming no other optimization eliminated the SelectInst.
However, it is not always profitable to emit X86::CMOV instruction. For example, branch is preferable over an X86::CMOV instruction when:
1. Branch is well predicted
2. Condition operand is expensive, compared to True-value and the False-value operands

In CodeGenPrepare pass there is a shallow optimization that tries to convert SelectInst into branch, but it is not enough.
This commit, implements machine optimization pass that converts X86::CMOV instruction(s) into branch, based on a conservative heuristic.

Differential Revision: https://reviews.llvm.org/D34769

llvm-svn: 308142
2017-07-16 17:39:56 +00:00
Jakub Kuderski
c153f3743a Apply explicit instantiation workaround to DominanceFrontier
This is a workaround for the same explicit instantiation bug
as in DominatorTreeBase.

llvm-svn: 308141
2017-07-16 17:29:19 +00:00
Jakub Kuderski
8500538bd3 [Dominators] Workaround explicit instantiation bug.
Some platforms have problems with emmiting constructors when class
templates get explicitly instantiated.
This patch fixes the bug reported in D35315 by replacing `= default`
with an empty constructor body.

llvm-svn: 308140
2017-07-16 17:01:40 +00:00
Simon Pilgrim
5285a49ef8 [X86] Add F16C scheduling tests
llvm-svn: 308138
2017-07-16 14:34:18 +00:00
Simon Pilgrim
677676e52f [X86] Add POPCNT scheduling tests
llvm-svn: 308137
2017-07-16 14:22:39 +00:00
Simon Pilgrim
14a8665e4f [X86] Add BMI2 scheduling tests
llvm-svn: 308136
2017-07-16 14:09:15 +00:00
Simon Pilgrim
ccd3d05139 [X86] Add BMI1 scheduling tests
llvm-svn: 308135
2017-07-16 13:59:44 +00:00
Simon Pilgrim
228e9507d2 [X86] Add LZCNT scheduling tests
llvm-svn: 308133
2017-07-16 13:40:44 +00:00
Simon Pilgrim
49eaba61d6 [X86][SSE4A] Add EXTRQ/INSERTQ values to BTVER2 scheduling model
llvm-svn: 308132
2017-07-16 12:06:06 +00:00
Simon Pilgrim
03051514f2 [X86][AVX] Regenerate tests with constant broadcast comments
llvm-svn: 308131
2017-07-16 11:43:16 +00:00
Simon Pilgrim
09bd00be13 [X86][AVX] Regenerate vector tzcnt tests with constant broadcast comments
llvm-svn: 308130
2017-07-16 11:40:23 +00:00
Simon Pilgrim
0ad8d9774f [X86][AVX] Regenerate vector idiv tests with constant broadcast comments
llvm-svn: 308129
2017-07-16 11:38:14 +00:00
Simon Pilgrim
71e142fc8a [X86][AVX] Regenerate combine tests with constant broadcast comments
llvm-svn: 308128
2017-07-16 11:36:11 +00:00
Hiroshi Inoue
fefa37bba8 fix typos in comments; NFC
llvm-svn: 308127
2017-07-16 08:11:56 +00:00
Hiroshi Inoue
a45f824308 fix typos in comments; NFC
llvm-svn: 308126
2017-07-16 07:48:48 +00:00
Craig Topper
eaeca194ba [InstSimplify] Use commutable matchers to simplify some code. NFC
llvm-svn: 308125
2017-07-16 06:57:41 +00:00
Craig Topper
b974b7eddc [InstCombine] Move (0 - x) & 1 --> x & 1 to SimplifyDemandedUseBits.
This removes a dedicated matcher and allows us to support more than just an AND masking the lower bit.

llvm-svn: 308124
2017-07-16 05:37:58 +00:00
Teresa Johnson
f69a2918e5 Fix bot failures from r308114
Finally figured out that some bots were failing from r308114
with the message:
  llvm-lto2: LTO::run failed: No available targets are compatible with this triple.
after adding in some other checking that finally caused this to show up
in the FileCheck output.

Added "REQUIRES: x86-registered-target" which should fix it.

llvm-svn: 308119
2017-07-16 00:28:22 +00:00
Teresa Johnson
52d5345e4a Attempt 2 to debug bot failures
Modify checks from r308114 even more, to see if I can narrow down
why some bots are still failing.

llvm-svn: 308116
2017-07-16 00:01:16 +00:00
Teresa Johnson
a0079c6978 Attempt to debug bot failures
Simplifying checks from r308114, to see if I can narrow down why some
bots are still failing.

llvm-svn: 308115
2017-07-15 23:31:32 +00:00
Teresa Johnson
12fb10233b Restore with fix "[ThinLTO] Ensure we always select the same function copy to import"
This restores r308078/r308079 with a fix for bot non-determinisim (make
sure we run llvm-lto in single threaded mode so the debug output doesn't get
interleaved).

llvm-svn: 308114
2017-07-15 22:58:06 +00:00
Craig Topper
1d8169119e [IR] Implement Constant::isNegativeZeroValue/isZeroValue/isAllOnesValue/isOneValue/isMinSignedValue for ConstantDataVector without going through getElementAsConstant
Summary:
Currently these methods call ConstantDataVector::getSplatValue which uses getElementsAsConstant to create a Constant object representing the element value. This method incurs a map lookup to see if we already have created such a Constant before and if not allocates a new Constant object.

This patch changes these methods to use getElementAsAPFloat and getElementAsInteger so we can just examine the data values directly.

Reviewers: spatel, pcc, dexonsmith, bogner, craig.topper

Reviewed By: craig.topper

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D35040

llvm-svn: 308112
2017-07-15 22:06:19 +00:00
Craig Topper
f47536e576 [InstCombine] Improve the expansion in SimplifyUsingDistributiveLaws to handle cases where one side doesn't simplify, but the other side resolves to an identity value
Summary:
If one side simplifies to the identity value for inner opcode, we can replace the value with just the operation that can't be simplified.

I've removed a couple now unneeded special cases in visitAnd and visitOr. There are probably other cases I missed.

Reviewers: spatel, majnemer, hfinkel, dberlin

Reviewed By: spatel

Subscribers: grandinj, llvm-commits, spatel

Differential Revision: https://reviews.llvm.org/D35451

llvm-svn: 308111
2017-07-15 21:49:49 +00:00
Simon Pilgrim
a6d8f025c0 [X86][AVX] Regenerate tests with constant broadcast comments
llvm-svn: 308110
2017-07-15 21:17:35 +00:00
Simon Pilgrim
69d490ee69 [X86][AVX] Regenerate tests with constant broadcast comments
llvm-svn: 308109
2017-07-15 20:28:09 +00:00
Simon Pilgrim
0d29e02027 Strip trailing whitespace. NFCI
llvm-svn: 308108
2017-07-15 19:29:19 +00:00
Reid Kleckner
3f9f99bb89 [CodeView] Dump BuildInfoSym and ProcSym type indices
I need to print the type index in hex so that I can match it in
FileCheck for a test I'm writing.

llvm-svn: 308107
2017-07-15 18:10:39 +00:00
Reid Kleckner
e88825c163 Fix mis-use of std::lower_bound
Binary search in C++ is such a PITA. =/

llvm-svn: 308106
2017-07-15 18:10:15 +00:00
Sanjay Patel
122bdff7b3 [InstCombine] improve (1 << x) & 1 --> zext(x == 0) folding
1. Add a one-use check to prevent increasing instruction count.
2. Generalize the pattern matching to include vector types.

llvm-svn: 308105
2017-07-15 17:26:01 +00:00
Craig Topper
cd3c9e2148 [InstCombine] Add test cases for (X & (Y | ~X)) -> (X & Y) where the not is an inverted compare. NFC
Do the same for (X | (Y & ~X)) -> (X | Y)

llvm-svn: 308104
2017-07-15 17:09:23 +00:00
Craig Topper
5c4bfe51a0 [InstCombine] Move 4 test cases from a test that didn't use FileCheck and merge them into a existing test file. NFC
llvm-svn: 308103
2017-07-15 17:09:22 +00:00
Sanjay Patel
ee49fdd1f5 [InstCombine] add tests for (1 << x) & 1 --> zext(x == 0) ; NFC
This fold hit the trifecta:
1. It was untested.
2. It oversteps (multiuse is not checked, so increases instruction count).
3. It is incomplete (doesn't work for vectors).

llvm-svn: 308102
2017-07-15 15:55:07 +00:00
Chandler Carruth
76c1a19de1 [wasm] Update two tests for r308025 which causes scheduling changes due
to the newly improved AA information.

llvm-svn: 308100
2017-07-15 15:44:36 +00:00
Sanjay Patel
48d27fcdd0 [InstCombine] allow (0 - x) & 1 --> x & 1 for vectors
llvm-svn: 308098
2017-07-15 15:29:47 +00:00
Sanjay Patel
f1721759e8 [InstCombine] remove dead code/tests; NFCI
These patterns and tests were added to InstSimplify with:
https://reviews.llvm.org/rL303004

llvm-svn: 308096
2017-07-15 15:01:33 +00:00
Chandler Carruth
34071b5594 Revert r308078 (and subsequent tweak in r308079) which introduces a test
that appears to exhibit non-determinism and is flaking on the bots
pretty consistently.

r308078: [ThinLTO] Ensure we always select the same function copy to import
r308079: Require asserts in new test that uses debug flag
llvm-svn: 308095
2017-07-15 13:50:26 +00:00
Florian Hahn
522d2634b3 [LoopInterchange] Add some optimization remarks.
Reviewers: anemet, karthikthecool, blitz.opensource

Reviewed By: anemet

Subscribers: mzolotukhin, llvm-commits

Differential Revision: https://reviews.llvm.org/D35122

llvm-svn: 308094
2017-07-15 13:13:19 +00:00
Nuno Lopes
2f890dd021 [docs] AliasAnalysis: clarify that PartialAlias doesn't enforce
objects to start at the same address

As discussed on the ML, there's consensus that this is what the implementations
do and it seems sensible.

llvm-svn: 308090
2017-07-15 09:09:24 +00:00
Chandler Carruth
099fbc1e8e [PM/LCG] Teach the LazyCallGraph to maintain reference edges from every
function to every defined function known to LLVM as a library function.

LLVM can introduce calls to these functions either by replacing other
library calls or by recognizing patterns (such as memset_pattern or
vector math patterns) and replacing those with calls. When these library
functions are actually defined in the module, we need to have reference
edges to them initially so that we visit them during the CGSCC walk in
the right order and can effectively rebuild the call graph afterward.

This was discovered when building code with Fortify enabled as that is
a common case of both inline definitions of library calls and
simplifications of code into calling them.

This can in extreme cases of LTO-ing with libc introduce *many* more
reference edges. I discussed a bunch of different options with folks but
all of them are unsatisfying. They either make the graph operations
substantially more complex even when there are *no* defined libfuncs, or
they introduce some other complexity into the callgraph. So this patch
goes with the simplest possible solution of actual synthetic reference
edges. If this proves to be a memory problem, I'm happy to implement one
of the clever techniques to save memory here.

llvm-svn: 308088
2017-07-15 08:08:19 +00:00
Simon Atanasyan
e13ec84961 [mips] Handle the long-calls feature flags in the MIPS backend
If the `long-calls` feature flags is enabled, disable use of the `jal`
instruction. Instead of that call a function by by first loading its
address into a register, and then using the contents of that register.

Differential revision: https://reviews.llvm.org/D35168

llvm-svn: 308087
2017-07-15 07:14:25 +00:00
NAKAMURA Takumi
c0dbd017b7 SystemZCodeGen: Update libdeps. r308024 introduced LoopDataPrefetchPass.
llvm-svn: 308086
2017-07-15 06:32:12 +00:00
Yonghong Song
8e69371139 bpf: fix a compilation bug due to unused variable for release build
Signed-off-by: Yonghong Song <yhs@fb.com>
llvm-svn: 308083
2017-07-15 06:08:08 +00:00
Matt Arsenault
bd0ea56e67 AMDGPU: Return correct type during argument lowering
The type needs to be casted back to the original argument type.
Fixes an assert that for some reason is only run when
using -debug.

Includes an additional combine to avoid test regressions
from having conversions mixed with multiple Assert[SZ]ext
nodes. On subtargets where i16 is legal, this was producing an i32
register with an i16 AssertZExt, truncated to i16 with another i8
AssertZExt.

t2: i32,ch = CopyFromReg t0, Register:i32 %vreg0
t3: i16 = truncate t2
t5: i16 = AssertZext t3, ValueType:ch:i8
t6: i8 = truncate t5
t7: i32 = zero_extend t6
llvm-svn: 308082
2017-07-15 05:52:59 +00:00