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Commit Graph

176556 Commits

Author SHA1 Message Date
Clement Courbet
e68783956d [llvm-exegesis] Fix compilation before c++17.
ClusteringTest.cpp:25:23: error: constexpr variable cannot have non-literal type 'const llvm::exegesis::(anonymous namespace)::(lambda at /home/buildslave/ps4-buildslave4/llvm-clang-lld-x86_64-scei-ps4-ubuntu-fast/llvm.src/unittests/tools/llvm-exegesis/ClusteringTest.cpp:25:35)'
static constexpr auto HasPoints = [](const std::vector<int> &Indices) {

llvm-svn: 356748
2019-03-22 13:37:39 +00:00
Clement Courbet
2ed5bfe998 [llvm-exegesis] Add clustering test.
Summary: To show that dbscan is insensitive to the order of the points.

Subscribers: tschuett, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D59693

llvm-svn: 356747
2019-03-22 13:13:12 +00:00
James Henderson
6db6680acb [llvm-objcopy]Add coverage for --split-dwo and --output-format
Also fix up a couple of minor issues in the test being updated, where
FileCheck could match on incorrect output and fix the test case order to
match the struct order.

Reviewed by: grimar

Differential Revision: https://reviews.llvm.org/D59691

llvm-svn: 356746
2019-03-22 12:45:27 +00:00
George Rimar
490cc98cbb Revert r356738 "[llvm-objcopy] - Implement replaceSectionReferences for GroupSection class."
Seems this broke ubsan bot:
http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux-bootstrap-ubsan/builds/11760

llvm-svn: 356745
2019-03-22 12:14:04 +00:00
Alex Bradbury
662d042ab8 [RISCV] Add basic RV32E definitions and MC layer support
The RISC-V ISA defines RV32E as an alternative "base" instruction set
encoding, that differs from RV32I by having only 16 rather than 32 registers.
This patch adds basic definitions for RV32E as well as MC layer support
(assembling, disassembling) and tests. The only supported ABI on RV32E is
ILP32E.

Add a new RISCVFeatures::validate() helper to RISCVUtils which can be called
from codegen or MC layer libraries to validate the combination of TargetTriple
and FeatureBitSet. Other targets have similar checks (e.g. erroring if SPE is
enabled on PPC64 or oddspreg + o32 ABI on Mips), but they either duplicate the
checks (Mips), or fail to check for both codegen and MC codepaths (PPC).

Codegen for the ILP32E ABI support and RV32E codegen are left for a future
patch/patches.

Differential Revision: https://reviews.llvm.org/D59470

llvm-svn: 356744
2019-03-22 11:21:40 +00:00
Alex Bradbury
f2b04fe6b7 [RISCV] Optimize emission of SELECT sequences
This patch optimizes the emission of a sequence of SELECTs with the same
condition, avoiding the insertion of unnecessary control flow. Such a sequence
often occurs when a SELECT of values wider than XLEN is legalized into two
SELECTs with legal types. We have identified several use cases where the
SELECTs could be interleaved with other instructions. Therefore, we extend the
sequence to include non-SELECT instructions if we are able to detect that the
non-SELECT instructions do not impact the optimization.

This patch supersedes https://reviews.llvm.org/D59096, which attempted to
address this issue by introducing a new SelectionDAG node. Hat tip to Eli
Friedman for his feedback on how to best handle this issue.

Differential Revision: https://reviews.llvm.org/D59355
Patch by Luís Marques.

llvm-svn: 356741
2019-03-22 10:45:03 +00:00
Alex Bradbury
e6a58c70c2 [RISCV] Allow conversion of CC logic to bitwise logic
Indicates in the TargetLowering interface that conversions from CC logic to
bitwise logic are allowed. Adds tests that show the benefit when optimization
opportunities are detected. Also adds tests that show that when the optimization
is not applied correct code is generated (but opportunities for other
optimizations remain).

Differential Revision: https://reviews.llvm.org/D59596
Patch by Luís Marques.

llvm-svn: 356740
2019-03-22 10:39:22 +00:00
George Rimar
1e9101d9d7 [llvm-objcopy] - Fix a st_name of the first symbol table entry.
Spec says about the first symbol table entry that index 0 both designates the first entry in the table
and serves as the undefined symbol index. It should have zero value.
Hence the first symbol table entry has no name. And so has to have a st_name == 0.
(http://refspecs.linuxbase.org/elf/gabi4+/ch4.symtab.html)

Currently, we do not emit zero value for the first symbol table entry.
That happens because we add empty strings to the string builder, which
for each such case adds a zero byte:
(https://github.com/llvm-mirror/llvm/blob/master/lib/MC/StringTableBuilder.cpp#L185)
After the string optimization performed it might return non zero indexes for the
empty string requested.

The patch fixes this issue for the case above and other sections with no names.

Differential revision: https://reviews.llvm.org/D59496

llvm-svn: 356739
2019-03-22 10:28:56 +00:00
George Rimar
c70312a254 [llvm-objcopy] - Implement replaceSectionReferences for GroupSection class.
Currently, llvm-objcopy incorrectly handles compression and decompression of the
sections from COMDAT groups, because we do not implement the
replaceSectionReferences for this type of the sections.

The patch does that.

Differential revision: https://reviews.llvm.org/D59638

llvm-svn: 356738
2019-03-22 10:24:37 +00:00
James Henderson
797cb8f639 [llvm-objcopy]Add support for *-freebsd output formats
GNU objcopy can support output formats like elf32-i386-freebsd and
elf64-x86-64-freebsd. The only difference from their regular non-freebsd
counterparts that I have observed is that the freebsd versions set the
OS/ABI field to ELFOSABI_FREEBSD. This patch sets the OS/ABI field
according based on the format whenever --output-format is specified.

Reviewed by: rupprecht, grimar

Differential Revision: https://reviews.llvm.org/D59645

llvm-svn: 356737
2019-03-22 10:21:09 +00:00
Alex Bradbury
9f5c6f5c7e [RISCV][NFC] Add test case to MC/RISCV/linker-relaxation.s showing incorrect relocations being emitted
A follow-up patch will fix this case.

llvm-svn: 356736
2019-03-22 10:20:21 +00:00
Tim Renouf
239ce11bf0 [AMDGPU] Added v5i32 and v5f32 register classes
They are not used by anything yet, but a subsequent commit will start
using them for image ops that return 5 dwords.

Differential Revision: https://reviews.llvm.org/D58903

Change-Id: I63e1904081e39a6d66e4eb96d51df25ad399d271
llvm-svn: 356735
2019-03-22 10:11:21 +00:00
Alex Bradbury
7b8d7ce641 [RISCV][NFC] Expand test/MC/RISCV/linker-relaxation.s tests
Add more complete CHECK lines for the relocations generated when relaxation is
enabled, and add cases where a locally defined symbol is referenced.

Two instances of pcrel_lo(defined_symbol) are commented out, as they will
produce an error. A follow-up patch will fix this.

llvm-svn: 356734
2019-03-22 06:05:52 +00:00
Craig Topper
0fad4e575b [X86] Add 32-bit command lines with and without SSE2 to atomic-non-integer.ll. NFC
llvm-svn: 356733
2019-03-22 04:28:40 +00:00
Yonghong Song
07d91a39b4 [BPF] fix flaky btf unit test static-var-derived-type.ll
The DataSecEentries is defined as an unordered_map since
order does not really matter.
  std::unordered_map<std::string, std::unique_ptr<BTFKindDataSec>>
      DataSecEntries;
This seems causing the test static-var-derived-type.ll flaky
as two sections ".bss" and ".readonly" have undeterministic
ordering when performing map iterating, which decides the
output assembly code sequence of BTF_KIND_DATASEC entries.

Fix the test to have only one data section to remove
flakiness.

Signed-off-by: Yonghong Song <yhs@fb.com>
llvm-svn: 356731
2019-03-22 02:54:47 +00:00
Fangrui Song
72e7abe0f8 [DWARF] Refactor RelocVisitor and fix computation of SHT_RELA-typed relocation entries
Summary:
getRelocatedValue may compute incorrect value for SHT_RELA-typed relocation entries.

// DWARFDataExtractor.cpp
uint64_t DWARFDataExtractor::getRelocatedValue(uint32_t Size, uint32_t *Off,
...
  // This formula is correct for REL, but may be incorrect for RELA if the value
  // stored in the location (getUnsigned(Off, Size)) is not zero.
  return getUnsigned(Off, Size) + Rel->Value;

In this patch, we

* refactor these visit* functions to include a new parameter `uint64_t A`.
  Since these visit* functions are no longer used as visitors, rename them to resolve*.
  + REL: A is used as the addend. A is the value stored in the location where the
    relocation applies: getUnsigned(Off, Size)
  + RELA: The addend encoded in RelocationRef is used, e.g. getELFAddend(R)
* and add another set of supports* functions to check if a given relocation type is handled.
  DWARFObjInMemory uses them to fail early.

Reviewers: echristo, dblaikie

Reviewed By: echristo

Subscribers: mgorny, aprantl, aheejin, fedor.sergeev, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D57939

llvm-svn: 356729
2019-03-22 02:43:11 +00:00
Yonghong Song
009a1e855b [BPF] handle derived type properly for computing type id
Currently, the type id for a derived type is computed incorrectly.
For example,
  type #1: int
  type #2: ptr to #1

For a global variable "int *a", type #1 will be attributed to variable "a".
This is due to a bug which assigns the type id of the basetype of
that derived type as the derived type's type id. This happens
to "const", "volatile", "restrict", "typedef" and "pointer" types.

This patch fixed this bug, fixed existing test cases and added
a new one focusing on pointers plus other derived types.

Signed-off-by: Yonghong Song <yhs@fb.com>
llvm-svn: 356727
2019-03-22 01:30:50 +00:00
Craig Topper
c69c73ea42 [X86] Autogenerate complete checks. NFC
llvm-svn: 356723
2019-03-21 23:09:56 +00:00
Amara Emerson
de0bb2f505 [AArch64] Split the neon.addp intrinsic into integer and fp variants.
This is the result of discussions on the list about how to deal with intrinsics
which require codegen to disambiguate them via only the integer/fp overloads.
It causes problems for GlobalISel as some of that information is lost during
translation, while with other operations like IR instructions the information is
encoded into the instruction opcode.

This patch changes clang to emit the new faddp intrinsic if the vector operands
to the builtin have FP element types. LLVM IR AutoUpgrade has been taught to
upgrade existing calls to aarch64.neon.addp with fp vector arguments, and
we remove the workarounds introduced for GlobalISel in r355865.

This is a more permanent solution to PR40968.

Differential Revision: https://reviews.llvm.org/D59655

llvm-svn: 356722
2019-03-21 22:31:37 +00:00
Craig Topper
23b0d5481d [X86] Use LoadInst->getType() instead of LoadInst->getPointerOperandType()->getElementType(). NFCI
For the future day when the pointer's don't have element types, we shoudl just use the type of the load result instead.

llvm-svn: 356721
2019-03-21 21:37:18 +00:00
Nikita Popov
ac24d50eee [InstSimplify] Add tests for signed icmp of and/or; NFC
Even if a signed predicate is used, the ranges computed for and/or
are unsigned, resulting in missed simplifications.

llvm-svn: 356720
2019-03-21 21:13:08 +00:00
Steven Wu
81b4af3e73 [Object] Fix reading objects created with -fembed-bitcode-marker
Currently, this fails with many tools, e.g.

$ clang -fembed-bitcode-marker -c -o test.o test.c
$ nm test.o
nm: test.o The file was not recognized as a valid object file

-fembed-bitcode-marker creates a LLVM,bitcode section consisting of a single
byte. When reading the object file, IRObjectFile::findBitcodeInObject succeeds,
causing SymbolicFile::createSymbolicFile to try to read the "bitcode" rather
than using the outer Mach-O data - when then fails.

Fix this by making findBitcodeInObject return an error if the section size <= 1.

Patched by: Nicholas Allegra

Differential Revision: https://reviews.llvm.org/D44373

llvm-svn: 356718
2019-03-21 21:01:31 +00:00
Matt Arsenault
8098d943bc Mips: Fix typo in assert message
llvm-svn: 356717
2019-03-21 20:56:06 +00:00
Matt Arsenault
b47ab00d01 Mips: Don't create copy of nothing
This was creating a copy of the register the pseudo itself was
def'ing, leaving a copy of an undefined register. I'm not sure how
the verifier is not catching this, but this avoids asserting in a
future change to RegAllocFast

llvm-svn: 356716
2019-03-21 20:56:05 +00:00
Matt Arsenault
41b71f19a3 GlobalISel: Fix RegBankSelect for REG_SEQUENCE
The AArch64 test was broken since the result register already had a
set register class, so this test was a no-op. The mapping verify call
would fail because the result size is not the same as the inputs like
in a copy or phi.

The AMDGPU testcases are half broken and introduce illegal VGPR->SGPR
copies which need much more work to handle correctly (same for phis),
but add them as a baseline.

llvm-svn: 356713
2019-03-21 20:45:36 +00:00
Akira Hatanaka
9bfe38a556 Don't add a tail keyword to calls to ObjC runtime functions if the calls
are annotated with notail.

r356705 annotated calls to objc_retainAutoreleasedReturnValue with
notail on x86-64. This commit teaches ARC optimizer to check the notail
marker on the call before turning it into a tail call.

rdar://problem/38675807

llvm-svn: 356707
2019-03-21 20:16:09 +00:00
Evandro Menezes
3bd1a2cbe6 [AArch64] Update for Exynos
Fix the feature set for Exynos M4 by removing support for `+fp16fml` and fix test case.

llvm-svn: 356698
2019-03-21 18:54:58 +00:00
Jordan Rupprecht
360c997b66 [llvm-objdump] Support arg grouping for -j and -M (e.g. llvm-objdump -sj.foo -dMreg-names-raw)
Summary:
r354375 added support for most objdump groupings, but didn't add support for -j|--sections, because that wasn't possible.
r354870 added --disassembler options, but grouping still wasn't available.
r355185 supported values for grouped options.

This just puts the three of them together. This supports -j in modes like `-s -j .foo`, `-sj .foo`, `-sj=.foo`, or `-sj.foo`, and similar for `-M`.

Reviewers: ormris, jhenderson, ikudrin

Reviewed By: jhenderson, ikudrin

Subscribers: javed.absar, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D59618

llvm-svn: 356697
2019-03-21 18:45:44 +00:00
Simon Pilgrim
06a9c72d3d [X86] canonicalizeBitSelect - don't attempt to canonicalize mask registers
We don't use X86ISD::ANDNP for mask registers.

Test case from @craig.topper (Craig Topper)

llvm-svn: 356696
2019-03-21 18:32:38 +00:00
Reid Kleckner
0e0b4260d3 [llvm-pdbutil] Add -type-ref-stats to help find unused type info
Summary:
This considers module symbol streams and the global symbol stream to be
roots. Most types that this considers "unreferenced" are referenced by
LF_UDT_MOD_SRC_LINE id records, which VC seems to always include.
Essentially, they are types that the user can only find in the debugger
if they call them by name, they cannot be found by traversing a symbol.

In practice, around 80% of type information in a PDB is referenced by a
symbol. That seems like a reasonable number.

I don't really plan to do anything with this tool. It mostly just exists
for informational purposes, and to confirm that we probably don't need
to implement type reference tracking in LLD. We can continue to merge
all types as we do today without wasting space.

Reviewers: zturner, aganea

Subscribers: mgorny, hiraditya, arphaman, jdoerfert, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D59620

llvm-svn: 356692
2019-03-21 18:02:34 +00:00
Sanjay Patel
36f9cb0c86 [x86] add tests with movmsk potential (PR39665); NFC
llvm-svn: 356691
2019-03-21 17:57:56 +00:00
Craig Topper
cad0669c4c [InstCombine] Don't transform ((C1 OP zext(X)) & C2) -> zext((C1 OP X) & C2) if either zext or OP has another use.
If they have other users we'll just end up increasing the instruction count.

We might be able to weaken this to only one of them having a single use if we can prove that the and will be removed.

Fixes PR41164.

Differential Revision: https://reviews.llvm.org/D59630

llvm-svn: 356690
2019-03-21 17:50:49 +00:00
Craig Topper
ceef866b00 [X86] Don't avoid folding multiple use sign extended 8-bit immediate into instructions under optsize.
Under optsize we try to avoid folding immediates into instructions under optsize. But if the immediate is 16-bits or 32 bits, but can be encoded as an 8-bit immediate we don't save enough from disabling the folding unless the immediate has enough uses to make up for the size of the move which is either 3 bytes or 5 bytes since there are no sign extended 8-bit moves. We would also save something if the immediate was a live out of the basic block and thus a move was unavoidable, but that would require a more advanced heuristic than just counting uses.

Note we only avoid folding multiple use immediates into the patterns that use X86ISD::ADD/SUB/XOR/OR/AND/CMP/ADC/SBB nodes and not the more common ISD::ADD/SUB/XOR/OR/AND nodes.

Differential Revision: https://reviews.llvm.org/D59522

llvm-svn: 356688
2019-03-21 17:38:58 +00:00
Craig Topper
2e83bf2dab [ScalarizeMaskedMemIntrin] Add support for scalarizing expandload and compressstore intrinsics.
This adds support for scalarizing these intrinsics as well the X86TargetTransformInfo support to avoid scalarizing them in the cases X86 can handle.

I've omitted handling special cases for constant masks for this first pass. Though CodeGenPrepare can constant fold the branch conditions and remove some of the control flow anyway.

Fixes PR40994 and is covers most of PR3666. Might want to implement constant masks to close that.

Differential Revision: https://reviews.llvm.org/D59180

llvm-svn: 356687
2019-03-21 17:38:52 +00:00
Nikita Popov
ba8e158b08 [ValueTracking] Use ConstantRange based overflow check for signed sub
This is D59450, but for signed sub. This case is not NFC, because
the overflow logic in ConstantRange is more powerful than the existing
check. This resolves the TODO in the function.

I've added two tests to show that this indeed catches more cases than
the previous logic, but the main correctness test coverage here is in
the existing ConstantRange unit tests.

Differential Revision: https://reviews.llvm.org/D59617

llvm-svn: 356685
2019-03-21 17:23:51 +00:00
Krzysztof Parzyszek
57fe353199 Add more rotate tests, including ORs of rotates
This is a part of https://reviews.llvm.org/D47735.

llvm-svn: 356683
2019-03-21 17:14:22 +00:00
David Green
33d5d48479 Fixup opt-remarks.ll gold plugin test. NFC
Now that rL356594 has added a TailCallElim pass to LTO, the call gets marked as
tail.

llvm-svn: 356669
2019-03-21 14:35:06 +00:00
Florian Hahn
68b3909525 [DAGCombiner] Use getTokenFactor in a few more cases.
SDNodes can only have 64k operands and for some inputs (e.g. large
number of stores), we can reach this limit when creating TokenFactor
nodes. This patch is a follow up to D56740 and updates a few more places
that potentially can create TokenFactors with too many operands.

Reviewers: efriedma, craig.topper, aemerson, RKSimon

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D59156

llvm-svn: 356668
2019-03-21 14:32:09 +00:00
Simon Pilgrim
8c62891860 [DAGCombine] SimplifySelectCC - call FoldSetCC with the setcc result type
We were calling FoldSetCC with the compare operand type instead of the result type.

Found by OSS-Fuzz #13838 (https://bugs.chromium.org/p/oss-fuzz/issues/detail?id=13838)

llvm-svn: 356667
2019-03-21 14:07:18 +00:00
Sanjay Patel
279a8e9df1 [CodeGenPrepare] limit formation of overflow intrinsics (PR41129)
This is probably a bigger limitation than necessary, but since we don't have any evidence yet
that this transform led to real-world perf improvements rather than regressions, I'm making a
quick, blunt fix.

In the motivating x86 example from:
https://bugs.llvm.org/show_bug.cgi?id=41129
...and shown in the regression test, we want to avoid an extra instruction in the dominating
block because that could be costly.

The x86 LSR test diff is reversing the changes from D57789. There's no evidence that 1 version
is any better than the other yet.

Differential Revision: https://reviews.llvm.org/D59602

llvm-svn: 356665
2019-03-21 13:57:07 +00:00
Xing GUO
261f6ab935 [llvm-readobj] Format codes. NFC.
llvm-svn: 356664
2019-03-21 13:42:06 +00:00
Simon Pilgrim
77a4261c2d [Thumb] Fix infinite loop in ABS expansion (PR41160)
Don't expand ISD::ABS node if its legal.

llvm-svn: 356661
2019-03-21 12:41:18 +00:00
Tim Renouf
c57b91da41 [AMDGPU] Support for v3i32/v3f32
Added support for dwordx3 for most load/store types, but not DS, and not
intrinsics yet.

SI (gfx6) does not have dwordx3 instructions, so they are not enabled
there.

Some of this patch is from Matt Arsenault, also of AMD.

Differential Revision: https://reviews.llvm.org/D58902

Change-Id: I913ef54f1433a7149da8d72f4af54dbb13436bd9
llvm-svn: 356659
2019-03-21 12:01:21 +00:00
Simon Pilgrim
11d9f6f949 Fix -Wmisleading-indentation gcc7 warning. NFCI.
llvm-svn: 356658
2019-03-21 11:58:22 +00:00
Oliver Stannard
b5c44abcf5 [AArch64] Allow -mattr=tpidr-el[1|2|3]
Added subtarget features for AArch64 to use TPIDR_EL[1|2|3] as the TLS base
register, rather than the default TPIDR_EL0.

Patch by Philip Derrin!

Differential revision: https://reviews.llvm.org/D54685

llvm-svn: 356657
2019-03-21 11:30:17 +00:00
Simon Pilgrim
3a02003171 [SelectionDAG] Add scalarization of ABS node (PR41149)
Patch by: @ikulagin (Ivan Kulagin)

Differential Revision: https://reviews.llvm.org/D59577

llvm-svn: 356656
2019-03-21 11:18:54 +00:00
Pavel Labath
78fa2db647 Fix two more issues with r356652
The first problem was a use-after-free in the tests (detected by asan
bots). The temporary array created for the "create" call is guaranteed
to live only until the end of the statement. The fix there is to store
the test data in a local variable to ensure it has the right lifetime

The second issue is broken BUILD_SHARED_LIBS build, which I fix by
adding the appropriate BinaryFormat dependency to the Object unit tests.

llvm-svn: 356655
2019-03-21 10:21:55 +00:00
Alex Bradbury
dbb6015f8e [RISCV][NFC] Remove old CHECK lines from linker-relaxation.s test
The RELOC: check lines are no longer used.

llvm-svn: 356654
2019-03-21 09:53:19 +00:00
Pavel Labath
5add88c5e7 Attempt to fix modules build for r356652
The commit added a new .def file. This adds it to the list of textual
headers.

llvm-svn: 356653
2019-03-21 09:44:07 +00:00
Pavel Labath
6587b1348f [Object] Add basic minidump support
Summary:
This patch adds basic support for reading minidump files. It contains
the definitions of various important minidump data structures (header,
stream directory), and of one minidump stream (SystemInfo). The ability
to read other streams will be added in follow-up patches. However, all
streams can be read even now as raw data, which means lldb's minidump
support (where this code is taken from) can be immediately rebased on
top of this patch as soon as it lands.

As we don't have any support for generating minidump files (yet), this
tests the code via unit tests with some small handcrafted binaries in
the form of c char arrays.

Reviewers: Bigcheese, jhenderson, zturner

Subscribers: srhines, dschuff, mgorny, fedor.sergeev, lemo, clayborg, JDevlieghere, aprantl, lldb-commits, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D59291

llvm-svn: 356652
2019-03-21 09:18:59 +00:00