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184893 Commits

Author SHA1 Message Date
Sanjay Patel
e6fabd1382 [InstCombine] remove unneeded one-use checks for icmp fold
This fold and several others were added in:
rL125734
...with no explanation for the one-use checks other than the code
comments about register pressure.

Given that this is IR canonicalization, we shouldn't be worried
about register pressure though; the backend should be able to
adjust for that as needed.

There are similar checks as noted with the TODO comments. I'm
hoping to remove those restrictions too, but if any of these
does cause a regression, it should be easier to correct by making
small, individual commits.

This is part of solving PR43310 the theoretically right way:
https://bugs.llvm.org/show_bug.cgi?id=43310
...ie, if we don't cripple basic transforms, then we won't
need to add special-case code to detect larger patterns.

llvm-svn: 371940
2019-09-15 20:56:34 +00:00
Sanjay Patel
b3a2780d32 [InstCombine] add icmp tests with extra uses; NFC
llvm-svn: 371939
2019-09-15 20:13:27 +00:00
Jinsong Ji
23811f1145 [PowerPC][NFC] Add a testcase for fdiv expansion.
Pre-commit for following patch.

llvm-svn: 371938
2019-09-15 20:02:25 +00:00
Simon Pilgrim
4a4cc4e628 [GlobalISel] findGISelOptimalMemOpLowering - remove dead initalization. NFCI.
Fixes static analyzer warning that "Value stored to 'NewTySize' during its initialization is never read".

llvm-svn: 371937
2019-09-15 16:56:06 +00:00
Simon Pilgrim
1c7c7fdaaf [LoadStoreVectorizer] vectorizeLoadChain - ensure we find a valid Type down the load chain. NFCI.
Silence static analyzer uninitialized variable warning by setting the LoadTy to null and then asserting we find a real value.

llvm-svn: 371936
2019-09-15 16:44:35 +00:00
Simon Pilgrim
5387a45910 InterleavedLoadCombine - merge isa<> and dyn_cast<> duplicates. NFCI.
Silence static analyzer null dereference warning of *dyn_cast<BinaryOperator> by merging with the isa<BinaryOperator> above.

llvm-svn: 371935
2019-09-15 16:20:12 +00:00
Simon Pilgrim
cb12c82cda [DebugInfo] Don't dereference a dyn_cast<PDBSymbolData> result. NFCI.
The static analyzer is warning about a potential null dereference - but as we're in DataMemberLayoutItem we should be able to guarantee that the Symbol is a PDBSymbolData type, allowing us to use cast<PDBSymbolData> - and if not assert will fire for us.

llvm-svn: 371933
2019-09-15 15:38:26 +00:00
David Green
e94e59a2ae [ARM] Masked loads and stores
Masked loads and store fit naturally with MVE, the instructions being easily
predicated. This adds lowering for the simple cases of masked loads and stores.
It does not yet deal with widening/narrowing or pre/post inc, and so is
currently behind an option.

The llvm masked load intrinsic will accept a "passthru" value, dictating the
values used for the zero masked lanes. In MVE the instructions write 0 to the
zero predicated lanes, so we need to match a passthru that isn't 0 (or undef)
with a select instruction to pull in the correct data after the load.

Differential Revision: https://reviews.llvm.org/D67186

llvm-svn: 371932
2019-09-15 14:14:47 +00:00
Sanjay Patel
b49e547030 [SLP] limit vectorization of Constant subclasses (PR33958)
This is a fix for:
https://bugs.llvm.org/show_bug.cgi?id=33958

It seems universally true that we would not want to transform this kind of
sequence on any target, but if that's not correct, then we could view this
as a target-specific cost model problem. We could also white-list ConstantInt,
ConstantFP, etc. rather than blacklist Global and ConstantExpr.

Differential Revision: https://reviews.llvm.org/D67362

llvm-svn: 371931
2019-09-15 13:03:24 +00:00
David Green
6f42851ea4 [ARM] Simplify and update vmla test. NFC
llvm-svn: 371930
2019-09-15 11:53:05 +00:00
James Molloy
b11ee7152d [CodeEmitter] Improve testing for APInt encoding
I missed Artem's comment in D67487 before committing.

Differential Revision: https://reviews.llvm.org/D67487

llvm-svn: 371929
2019-09-15 08:44:40 +00:00
James Molloy
852739ecc8 [CodeEmitter] Support instruction widths > 64 bits
Some VLIW instruction sets are Very Long Indeed. Using uint64_t constricts the Inst encoding to 64 bits (naturally).

This change switches CodeEmitter to a mode that uses APInts when Inst's bitwidth is > 64 bits (NFC for existing targets).

When Inst.BitWidth > 64 the prototype changes to:

  void TargetMCCodeEmitter::getBinaryCodeForInstr(const MCInst &MI,
                                                  SmallVectorImpl<MCFixup> &Fixups,
                                                  APInt &Inst,
                                                  APInt &Scratch,
                                                  const MCSubtargetInfo &STI);

The Inst parameter returns the encoded instruction, the Scratch parameter is used internally for manipulating operands and is exposed so that the underlying storage can be reused between calls to getBinaryCodeForInstr. The goal is to elide any APInt constructions that we can.

Similarly the operand encoding prototype changes to:

  getMachineOpValue(const MCInst &MI, const MCOperand &MO, APInt &op, SmallVectorImpl<MCFixup> &Fixups, const MCSubtargetInfo &STI);

That is, the operand is passed by reference as APInt rather than returned as uint64_t.

To reiterate, this APInt mode is enabled only when Inst.BitWidth > 64, so this change is NFC for existing targets.

llvm-svn: 371928
2019-09-15 08:35:08 +00:00
Simon Pilgrim
a24663ee88 [TargetLowering] SimplifyDemandedBits - add EXTRACT_SUBVECTOR support.
Call SimplifyDemandedBits on the source vector.

llvm-svn: 371923
2019-09-14 16:38:26 +00:00
Roman Lebedev
e8dd40fec6 [InstSimplify] simplifyUnsignedRangeCheck(): handle few tautological cases (PR43251)
Summary:
This is split off from D67356, since these cases produce a constant,
no real need to keep them in instcombine.

Alive proofs:
https://rise4fun.com/Alive/u7Fk
https://rise4fun.com/Alive/4lV

https://bugs.llvm.org/show_bug.cgi?id=43251

Reviewers: spatel, nikic, xbolva00

Reviewed By: spatel

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D67498

llvm-svn: 371921
2019-09-14 13:47:27 +00:00
Mingjie Xing
99be271bf5 [ScheduleDAGMILive] Fix typo in comment.
Differential Revision: https://reviews.llvm.org/D67478

llvm-svn: 371916
2019-09-14 03:27:38 +00:00
Johannes Doerfert
2bbea6b20f [Attributor][Fix] Use right type to replace expressions
Summary: This should be obsolete once the functionality in D66967 is integrated.

Reviewers: uenoku, sstefan1

Subscribers: hiraditya, bollu, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D67231

llvm-svn: 371915
2019-09-14 02:57:50 +00:00
Fangrui Song
83bc3d5d9f [llvm-objcopy] Ignore -B --binary-architecture=
GNU objcopy documents that -B is only useful with architecture-less
input (i.e. "binary" or "ihex"). After D67144, -O defaults to -I, and
-B is essentially a NOP.

* If -O is binary/ihex, GNU objcopy ignores -B.
* If -O is elf*, -B provides the e_machine field in GNU objcopy.

So to convert a blob to an ELF, `-I binary -B i386:x86-64 -O elf64-x86-64` has to be specified.

`-I binary -B i386:x86-64 -O elf64-x86-64` creates an ELF with its
e_machine field set to EM_NONE in GNU objcopy, but a regular x86_64 ELF
in elftoolchain elfcopy. Follow the elftoolchain approach (ignoring -B)
to simplify code. Users that expect their command line portable should
specify -B.

Reviewed By: jhenderson

Differential Revision: https://reviews.llvm.org/D67215

llvm-svn: 371914
2019-09-14 01:36:31 +00:00
Fangrui Song
e807376803 [llvm-objcopy] Default --output-target to --input-target when unspecified
Fixes PR42171.

In GNU objcopy, if -O (--output-target) is not specified, the value is
copied from -I (--input-target).

```
objcopy -I binary -B i386:x86-64 a.txt b       # b is copied from a.txt
llvm-objcopy -I binary -B i386:x86-64 a.txt b  # b is an x86-64 object file
```

This patch changes our behavior to match GNU. With this change, we can
delete code related to -B handling (D67215).

Reviewed By: jakehehrlich

Differential Revision: https://reviews.llvm.org/D67144

llvm-svn: 371913
2019-09-14 01:36:16 +00:00
Fangrui Song
9274a89b29 [llvm-ar] Uncapitalize error messages and delete full stop
Most GNU binutils don't append full stops in error messages. This
convention has been adopted by a bunch of LLVM binary utilities. Make
llvm-ar follow the convention as well.

Reviewed By: grimar

Differential Revision: https://reviews.llvm.org/D67558

llvm-svn: 371912
2019-09-14 01:18:47 +00:00
Michael Pozulp
23932e2e9b [llvm-objcopy] Add support for response files in llvm-strip and llvm-objcopy
Summary: Addresses https://bugs.llvm.org/show_bug.cgi?id=42671

Reviewers: jhenderson, espindola, alexshap, rupprecht

Reviewed By: jhenderson

Subscribers: seiya, emaste, arichardson, jakehehrlich, MaskRay, abrachet, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D65372

llvm-svn: 371911
2019-09-14 01:14:43 +00:00
David Blaikie
1633a5ad3c Bugpoint: Remove some unnecessary c_str conversions on the journey to StringRef
llvm-svn: 371910
2019-09-14 00:32:13 +00:00
Jonas Devlieghere
028c66f478 [Reproducer] Add reproducer dump command.
This adds a reproducer dump commands which makes it possible to inspect
a reproducer from inside LLDB. Currently it supports the Files, Commands
and Version providers. I'm planning to add support for the GDB Remote
provider in a follow-up patch.

Differential revision: https://reviews.llvm.org/D67474

llvm-svn: 371909
2019-09-13 23:27:31 +00:00
Thomas Lively
c360a1f5f8 [WebAssembly] Narrowing and widening SIMD ops
Summary:
Implements target-specific LLVM intrinsics and clang builtins for
these new SIMD operations, as described at https://github.com/WebAssembly/simd/blob/master/proposals/simd/SIMD.md#integer-to-integer-narrowing.

Reviewers: aheejin

Subscribers: dschuff, sbc100, jgravelle-google, hiraditya, sunfish, cfe-commits, llvm-commits

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D67425

llvm-svn: 371906
2019-09-13 22:54:41 +00:00
Amara Emerson
30d6577498 [GlobalISel] Fix insertion point of new instructions to be after PHIs.
For some reason we sometimes insert new instructions one instruction before
the first non-PHI when legalizing. This can result in having non-PHI
instructions before PHIs, which mean that PHI elimination doesn't catch them.

Differential Revision: https://reviews.llvm.org/D67570

llvm-svn: 371901
2019-09-13 21:49:24 +00:00
Steven Wu
79c69eb4c5 [NFC][libLTO] Rearrange declaration in lto.h
Summary:
Rearrange the function declaration in lto.h so they falls in the correct
doxygen group.

Reviewers: tejohnson, bd1976llvm, deadalnix

Reviewed By: tejohnson

Subscribers: mehdi_amini, inglorion, jkorous, dexonsmith, ributzka, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D67565

llvm-svn: 371900
2019-09-13 21:19:12 +00:00
Sanjoy Das
0f3a1a9518 Add dependency from Orc to Passes
Summary: Orc uses registerFunctionAnalyses that's defined in Passes.

Reviewers: dblaikie

Subscribers: mcrosier, bixia, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D67477

llvm-svn: 371898
2019-09-13 21:07:56 +00:00
Francis Visoiu Mistrih
31c9428919 [llvm-opt-report] Improve error handling
* std::move the error extracted from the parsing creation to avoid asserts
* print a newline after the error message
* create the parser from the metadata

llvm-svn: 371895
2019-09-13 20:52:04 +00:00
Jessica Paquette
3e22de98ba [AArch64][GlobalISel] Tail call memory intrinsics
Because memory intrinsics are handled differently than other calls, we need to
check them for tail call eligiblity in the legalizer. This allows us to still
inline them when it's beneficial to do so, but also tail call when possible.

This adds simple tail calling support for when the intrinsic is followed by a
return.

It ports the attribute checks from `TargetLowering::isInTailCallPosition` into
a similarly-named function in LegalizerHelper.cpp. The target-specific
`isUsedByReturnOnly` hook is not ported here.

Update tailcall-mem-intrinsics.ll to show that GlobalISel can now tail call
memory intrinsics.

Update legalize-memcpy-et-al.mir to have a case where we don't tail call.

Differential Revision: https://reviews.llvm.org/D67566

llvm-svn: 371893
2019-09-13 20:25:58 +00:00
Jan Korous
f726c5e75f [Support] Add overload writeFileAtomically(std::function Writer)
Differential Revision: https://reviews.llvm.org/D67424

llvm-svn: 371890
2019-09-13 20:08:27 +00:00
DeForest Richards
bdeb54a918 [Docs] Bug fix for reference to nonexistent document
This commit fixes a bug in which the toctree contained a reference to a non-existent document.

llvm-svn: 371889
2019-09-13 20:05:57 +00:00
Kevin P. Neal
c5f29e2f14 [FPEnv] Document that constrained FP intrinsics cannot be mixed with non-constrained
Reviewed by:	andrew.w.kaylor, cameron.mcinally, uweigand
Approved by:	andrew.w.kaylor
Differential Revision:	https://reviews.llvm.org/D67360

llvm-svn: 371888
2019-09-13 19:36:19 +00:00
Sebastian Pop
8fa4ef5e9b [aarch64] move custom isel of extract_vector_elt to td file - NFC
In preparation for def-pat selection of dot product instructions,
this patch moves the custom instruction selection of extract_vector_elt
to the td file. Without this change it is impossible to catch a pattern that
starts with an extract_vector_elt: the custom cpp code is executed first
ahead of the patterns in the td files that are only executed at the end of
the switch statement in SelectCode(Node).

With this patch applied, it becomes possible to select a different pattern
that starts with extract_vector_elt by selecting a higher complexity than
this pattern.

The patch has been tested on aarch64-linux with make check-all.

Differential Revision: https://reviews.llvm.org/D67497

llvm-svn: 371887
2019-09-13 19:28:30 +00:00
Tim Northover
edcafcb5d1 AArch64: fix EXPENSIVE_CHECKS for arm64_32.
For some reason I'd decided to mark the end-result of a GOT load as
dead. It's clearly not (necessarily).

llvm-svn: 371883
2019-09-13 18:55:38 +00:00
Sanjay Patel
cef0ab918a [SLP] add test for vectorization of constant expressions; NFC
Goes with D67362.

llvm-svn: 371879
2019-09-13 18:33:02 +00:00
Roman Lebedev
9ebe05f6e3 [NFC][InstSimplify] Add some more tests for D67498/D67502
llvm-svn: 371877
2019-09-13 17:58:24 +00:00
Alexander Timofeev
f1f1dbe202 Revert for: [AMDGPU]: PHI Elimination hooks added for custom COPY insertion.
llvm-svn: 371873
2019-09-13 17:37:30 +00:00
Francis Visoiu Mistrih
5f57f8daa8 [Remarks][NFC] Forward declare ParsedStringTable
llvm-svn: 371870
2019-09-13 17:27:28 +00:00
Francis Visoiu Mistrih
4ecd14c20f [Remarks][NFC] Use StringLiteral for magic numbers
llvm-svn: 371869
2019-09-13 16:46:23 +00:00
Jessica Paquette
3c5cb2961b [AArch64][GlobalISel] Add support for sibcalling callees with varargs
This adds support for tail calling callees with varargs, equivalent to how it
is done in AArch64ISelLowering.

This only works for sibling calls, and does not add the necessary support for
musttail with varargs. (See r345641 for equivalent ISelLowering support.) This
should be implemented when we stop falling back on musttail.

Update call-translator-tail-call.ll to show that we can now tail call varargs.

Differential Revision: https://reviews.llvm.org/D67518

llvm-svn: 371868
2019-09-13 16:10:19 +00:00
George Rimar
676775660f [yaml2obj/ObjectYAML] - Cleanup the error reporting API, add custom errors handlers.
This is a continuation of the YAML library error reporting
refactoring/improvement and the idea by itself was mentioned
in the following thread:
https://reviews.llvm.org/D67182?id=218714#inline-603404

This performs a cleanup of all object emitters in the library.
It allows using the custom one provided by the caller.

One of the nice things is that each tool can now print its tool name,
e.g: "yaml2obj: error: <text>"

Also, the code became a bit simpler.

Differential revision: https://reviews.llvm.org/D67445

llvm-svn: 371865
2019-09-13 16:00:16 +00:00
James Henderson
1a909630d5 [docs][llvm-readelf][llvm-readobj] Improve --stack-sizes documentation
llvm-readobj's document was missing --stack-sizes entirely from its
document, so this patch adds it. It also adds a note to the llvm-readelf
description that the switch is only implemented for GNU style output
currently. For reference, --stack-sizes was added in r367942.

Reviewed by: MaskRay

Differential Revision: https://reviews.llvm.org/D67548

llvm-svn: 371862
2019-09-13 15:01:39 +00:00
Craig Topper
9a1d55880e [X86] Use incDecVectorConstant to simplify the min/max code in LowerVSETCC.
incDecVectorConstant is used for a similar reason in LowerVSETCCWithSUBUS
so we might as well share the code.

llvm-svn: 371861
2019-09-13 14:59:08 +00:00
Nico Weber
fe26bc2586 Fix a few spellos in docs.
(Trying to debug an incremental build thing on a bot...)

llvm-svn: 371860
2019-09-13 14:58:24 +00:00
Nico Weber
dd0d908417 gn build: pacify "gn format" after 371102
llvm-svn: 371858
2019-09-13 14:35:20 +00:00
Jinsong Ji
25fcb83d99 [PowerPC][NFC] Move codegen tests to PowerPC from MIR/PowerPC
All tests with -run-pass !=none should not in MIR/, See MIR/README.

```
Tests for codegen passes should NOT be here but in
test/CodeGen/sometarget. As
a rule of thumb this directory should only contain tests using
'llc -run-pass none'.
```

llvm-svn: 371857
2019-09-13 14:18:36 +00:00
Benjamin Kramer
a051ec5aef [ADT] Remove a workaround for old versions of clang
llvm-svn: 371856
2019-09-13 13:47:49 +00:00
James Henderson
11f18d5eba [docs][llvm-objcopy][llvm-strip] Improve --strip-unneeded description
Behaviour was recently added to this switch to strip debug sections too.
See r369761.

This change also makes the description for the --strip-unneeded switch
consistent between the two docs.

Reviewed by: MaskRay

Differential Revision: https://reviews.llvm.org/D67546

llvm-svn: 371855
2019-09-13 13:26:52 +00:00
Nico Weber
c19d943856 gn build: (manually) merge r371834, take 2
llvm-svn: 371851
2019-09-13 13:07:54 +00:00
Nico Weber
3457b3fd67 Revert "gn build: (manually) merge r371834"
This reverts commit abc7e2b6004cd693cf3b6dedbc7908e099c7ac6a.
The commit was incomplete. I'll revert and reland the full commit,
so that the correct change is a single commit.

llvm-svn: 371850
2019-09-13 13:04:59 +00:00
Nico Weber
0f67698ab7 gn build: (manually) merge r371834
llvm-svn: 371849
2019-09-13 12:59:06 +00:00