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Commit Graph

162683 Commits

Author SHA1 Message Date
Pavel Labath
8899e5c1cb Make the test case from r329552 more portable
- when tuning for SCE debugger (default for ps4 targets), we will not emit
  the DW_AT_linkage_name, which this test needs. I explicitly set the
  debugger tuning parameter to get the attribute always.
- darwin targets did not like the "section .text.startup" fragment of
  the test. This is not actually needed for the test, so I remove it.

llvm-svn: 329555
2018-04-09 09:11:40 +00:00
Jonas Devlieghere
862d40896f [dsymutil] Remove trailing colon. NFC
llvm-svn: 329554
2018-04-09 09:10:34 +00:00
Jonas Devlieghere
396e6ea6d7 [dsymutil] Don't try to load Swift ASTs as objects.
With the threading refactoring, loading of object files happens before
checking whether we're dealing with a swift AST. While that's not an
issue per se, it causes a warning to be printed:

  warning: /path/to/a.swiftmodule: The file was not recognized as a valid object file
  note: while processing /path/to/a.swiftmodule

This suppresses the warning by checking for a Swift AST before
attempting to load is as an object file.

rdar://39240444

llvm-svn: 329553
2018-04-09 09:09:59 +00:00
Pavel Labath
e53b6af8c1 [CodeGen/AccelTable]: Don't emit accelerator entries for functions with no names
Summary:
We were emitting accelerator entries for functions with no name, which
is contrary to the DWARF v5 spec: "All other (i.e., *not*
DW_TAG_namespace) debugging information entries without a DW_AT_name
attribute are excluded." Besides that, a name table entry with an empty
string as a key is fairly useless.

We can sometimes end up with functions which have a DW_AT_linkage_name but no
DW_AT_name. One such example is the global-constructor-initialization functions,
which C++ compilers synthesize for each compilation unit with global
constructors.
A very strict reading of the DWARF v5 spec would suggest that we should not even
emit the accelerator entry for the linkage name in this case, but I don't think
we should go that far.

I found this when running the dwarf verifier over llvm codebase compiled
with DWARF v5 accelerator tables.

Reviewers: JDevlieghere, aprantl, dblaikie

Subscribers: vleschuk, clayborg, echristo, probinson, llvm-commits

Differential Revision: https://reviews.llvm.org/D45367

llvm-svn: 329552
2018-04-09 08:41:57 +00:00
Sam Parker
f18a3c417c [DAGCombine] Improve ReduceLoad for SRL
Recommitting r329283, third time lucky...

If the SRL node is only used by an AND, we may be able to set the
ExtVT to the width of the mask, making the AND redundant. To support
this, another check has been added in isLegalNarrowLoad which queries
whether the load is valid.

Differential Revision: https://reviews.llvm.org/D41350

llvm-svn: 329551
2018-04-09 08:16:11 +00:00
Craig Topper
3f9e77a67b [X86] Merge some of the autoupgrade handling for masked intrinsics that just need to upgrade to an unmasked version plus a select. NFCI
These are were previously grouped in small groups of similarish intrinsics. But all the intrinsics have the same number of arguments and the same order. So we can move them all into a larger group for handling.

llvm-svn: 329549
2018-04-09 06:15:09 +00:00
Max Kazantsev
307d95073b [IRCE] Relax restriction on collected range checks
In IRCE, we have a very old legacy check that works when we collect comparisons that we
treat as range checks. It ensures that the value against which the indvar is compared is
loop invariant and is also positive.

This latter condition remained there since the times when IRCE was only able to handle
signed latch comparison. As the optimization evolved, it now learned how to intersect
signed or unsigned ranges, and this logic has no reliance on the fact that the right border
of each range should be positive.

The old implementation of this non-negativity check was also naive enough and just looked
into ranges (while most of other IRCE logic tries to use power of SCEV implications), so this
check did not allow to deal with the most simple case that looks like follows:

  int size; // not known non-negative
  int length; //known non-negative;
  i = 0;
  if (size != 0) {
    do {
      range_check(i < size);
      range_check(i < length);
    ++i;
    } while (i < size)
  }

In this case, even if from some dominating conditions IRCE could parse loop
structure, it could only remove the range check against `length` and simply
ignored the check against `size`.

In this patch we remove this obsolete check. It will allow IRCE to pick comparison
against `size` as a potential range check and then let Range Intersection logic
decide whether it is OK to eliminate it or not.

Differential Revision: https://reviews.llvm.org/D45362
Reviewed By: samparker

llvm-svn: 329547
2018-04-09 06:01:22 +00:00
Hiroshi Inoue
b7fe5786cc [NFC] fix trivial typos in comments and error message
"is is" -> "is", "are are" -> "are"

llvm-svn: 329546
2018-04-09 04:37:53 +00:00
Dean Michael Berris
3153e6c6d9 [XRay][llvm+clang] Consolidate attribute list files
Summary:
This change consolidates the always/never lists that may be provided to
clang to externally control which functions should be XRay instrumented
by imbuing attributes. The files follow the same format as defined in
https://clang.llvm.org/docs/SanitizerSpecialCaseList.html for the
sanitizer blacklist.

We also deprecate the existing `-fxray-instrument-always=` and
`-fxray-instrument-never=` flags, in favour of `-fxray-attr-list=`.

This fixes http://llvm.org/PR34721.

Reviewers: echristo, vlad.tsyrklevich, eugenis

Reviewed By: vlad.tsyrklevich

Subscribers: llvm-commits, cfe-commits

Differential Revision: https://reviews.llvm.org/D45357

llvm-svn: 329543
2018-04-09 04:02:09 +00:00
Michael Zolotukhin
e15a25d24e Remove MachineLoopInfo dependency from AsmPrinter.
Summary:
Currently MachineLoopInfo is used in only two places:
1) for computing IsBasicBlockInsideInnermostLoop field of MCCodePaddingContext, and it is never used.
2) in emitBasicBlockLoopComments, which is called only if `isVerbose()` is true.
Despite that, we currently have a dependency on MachineLoopInfo, which makes
pass manager to compute it and MachineDominator Tree. This patch removes the
use (1) and makes the use (2) lazy, thus avoiding some redundant
recomputations.

Reviewers: opaparo, gadi.haber, rafael, craig.topper, zvi

Subscribers: rengolin, javed.absar, hiraditya, llvm-commits

Differential Revision: https://reviews.llvm.org/D44812

llvm-svn: 329542
2018-04-09 00:54:47 +00:00
Sanjay Patel
f3297fbfb1 [TargetSchedule] shrink interface for init(); NFCI
The TargetSchedModel is always initialized using the TargetSubtargetInfo's 
MCSchedModel and TargetInstrInfo, so we don't need to extract those and 
pass 3 parameters to init().

Differential Revision: https://reviews.llvm.org/D44789

llvm-svn: 329540
2018-04-08 19:56:04 +00:00
Craig Topper
355c80f441 [X86] Add SchedWrites for CMOV and SETCC. Use them to remove InstRWs.
Summary:
Cmov and setcc previously used WriteALU, but on Intel processors at least they are more restricted than basic ALU ops.

This patch adds new SchedWrites for them and removes the InstRWs. I had to leave some InstRWs for CMOVA/CMOVBE and SETA/SETBE because those have an extra uop relative to the other condition codes on Intel CPUs.

The test changes are due to fixing a missing ZnAGU dependency on the memory form of setcc.

Reviewers: RKSimon, andreadb, GGanesh

Reviewed By: RKSimon

Subscribers: GGanesh, llvm-commits

Differential Revision: https://reviews.llvm.org/D45380

llvm-svn: 329539
2018-04-08 17:53:18 +00:00
Craig Topper
105c7a5507 [X86][Znver1] Remove InstRWs for BLENDVPS/PD
Summary:
This removes the InstRWs for BLENDVPS/PD in favor of WriteFVarBlend. The latency listed was 3 cycles but WriteFVarBlend is defined as 1 cycle latency. The 1 cycle latency matches Agner Fog's data.

The patterns were missing the VEX forms which is why there are no test changes. We don't test "-mcpu=znver1 -mattr=-avx"

Reviewers: RKSimon, GGanesh

Reviewed By: RKSimon

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D44841

llvm-svn: 329538
2018-04-08 17:53:15 +00:00
Jonas Devlieghere
07e6b85380 [dsymutil] Don't crash on empty CU
Add some additional checks so we don't crash on empty compile units.

llvm-svn: 329537
2018-04-08 17:35:17 +00:00
Mandeep Singh Grang
516677b29e [Support] Change std::sort to llvm::sort in response to r327219
Summary:
r327219 added wrappers to std::sort which randomly shuffle the container before sorting.
This will help in uncovering non-determinism caused due to undefined sorting
order of objects having the same key.

To make use of that infrastructure we need to invoke llvm::sort instead of std::sort.

Note: This patch is one of a series of patches to replace *all* std::sort to llvm::sort.
Refer the comments section in D44363 for a list of all the required patches.

Reviewers: chandlerc, jordan_rose, bkramer

Reviewed By: bkramer

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D45140

llvm-svn: 329536
2018-04-08 16:46:22 +00:00
Mandeep Singh Grang
6187739e4c [PowerPC] Change std::sort to llvm::sort in response to r327219
Summary:
r327219 added wrappers to std::sort which randomly shuffle the container before sorting.
This will help in uncovering non-determinism caused due to undefined sorting
order of objects having the same key.

To make use of that infrastructure we need to invoke llvm::sort instead of std::sort.

Note: This patch is one of a series of patches to replace *all* std::sort to llvm::sort.
Refer the comments section in D44363 for a list of all the required patches.

Reviewers: hfinkel, RKSimon

Reviewed By: RKSimon

Subscribers: nemanjai, kbarton, llvm-commits

Differential Revision: https://reviews.llvm.org/D44870

llvm-svn: 329535
2018-04-08 16:45:04 +00:00
Mandeep Singh Grang
7ba97efb96 [X86] Change std::sort to llvm::sort in response to r327219
Summary:
r327219 added wrappers to std::sort which randomly shuffle the container before sorting.
This will help in uncovering non-determinism caused due to undefined sorting
order of objects having the same key.

To make use of that infrastructure we need to invoke llvm::sort instead of std::sort.

Note: This patch is one of a series of patches to replace *all* std::sort to llvm::sort.
Refer the comments section in D44363 for a list of all the required patches.

Reviewers: chandlerc, craig.topper, RKSimon

Reviewed By: chandlerc, craig.topper

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D44874

llvm-svn: 329534
2018-04-08 16:42:52 +00:00
Piotr Padlewski
697355b3e6 NFC: Update NewGVN invariant.group test
llvm-svn: 329533
2018-04-08 16:04:09 +00:00
Andrea Di Biagio
6e48c08339 [llvm-mca] Simplify code. NFC
llvm-svn: 329532
2018-04-08 15:10:19 +00:00
Piotr Padlewski
f667813adf Mark invariant.group as experimental
Differential Revision: https://reviews.llvm.org/D33235

llvm-svn: 329531
2018-04-08 13:53:04 +00:00
Xin Tong
0f0f7121d2 [LIR] Reorder header. NFC
llvm-svn: 329530
2018-04-08 13:19:53 +00:00
Simon Pilgrim
d48e54641e [X86] Regenerate and + immediate mask tests
Added i686 checks

llvm-svn: 329529
2018-04-08 12:31:52 +00:00
Simon Pilgrim
b6a3dd2747 [X86][PKU] Regenerate rdpkru/wrpkru intrinsic tests
Added i686 checks

llvm-svn: 329528
2018-04-08 12:30:30 +00:00
Simon Pilgrim
8f618894d4 [X86][SSE3] Regenerate mwait/monitor intrinsic tests
Added i686 checks

llvm-svn: 329527
2018-04-08 12:29:11 +00:00
Piotr Padlewski
2980a37a3e NFC: delete ValueMap move ctor
llvm-svn: 329526
2018-04-08 12:23:58 +00:00
Zvi Rackover
48ee485e44 DAGCombiner: Combine SDIV with non-splat vector pow2 divisor
Summary:
Extend existing SDIV combine for pow2 constant divider to handle
non-splat vectors of pow2 constants.

Reviewers: RKSimon, craig.topper, spatel, hfinkel, efriedma

Reviewed By: RKSimon

Subscribers: magabari, llvm-commits

Differential Revision: https://reviews.llvm.org/D42479

llvm-svn: 329525
2018-04-08 11:35:20 +00:00
Simon Pilgrim
9f2a807458 [X86][Btver2] Add vector extract costs
llvm-svn: 329524
2018-04-08 11:26:26 +00:00
Eric Fiselier
d3b507dfd6 [ADT] Fix MapVector when 'Map::mapped_type != unsigned'.
Previously MapVector assumed `Map::mapped_type` was `unsigned`.
This caused problems when using MapVector with a user-specified
map where this didn't hold (For example StringMap<unsigned>).

This patch adjusts MapVector to use the same type as the underlying
map, avoiding reference binding errors in functions like `insert`.

llvm-svn: 329523
2018-04-08 08:48:58 +00:00
Michal Gorny
e1be48589a [LLVMTestingSupport] Add explicit linkage to LLVMSupport
Explicitly link LLVMTestingSupport library against LLVMSupport. This
is necessary to fix linking errors when LLVMTestingSupport is built
as a shared library (with BUILD_SHARED_LIBS=ON) and -Wl,-z,defs is used.

Differential Revision: https://reviews.llvm.org/D45408

llvm-svn: 329522
2018-04-08 06:49:17 +00:00
Guozhi Wei
fb70343484 [DAGCombiner] Fold (zext (and/or/xor (shl/shr (load x), cst), cst))
In our real world application, we found the following optimization is missed in DAGCombiner

(zext (and/or/xor (shl/shr (load x), cst), cst)) -> (and/or/xor (shl/shr (zextload x), (zext cst)), (zext cst))

If the user of original zext is an add, it may enable further lea optimization on x86.

This patch add a new function CombineZExtLogicopShiftLoad to do this optimization.

Differential Revision: https://reviews.llvm.org/D44402

llvm-svn: 329516
2018-04-07 23:36:10 +00:00
Philip Pfaffe
b6ed76a42e Revert "Followup for r329293: Temporarily disable the breaking test on windows."
This reverts commit r329393 / b52ba35e7759cd4002221be1dbb63ec80fde21ec.

llvm-svn: 329514
2018-04-07 20:22:38 +00:00
Simon Pilgrim
d7531468dd [X86] Regenerate atom pshufb test
llvm-svn: 329511
2018-04-07 19:50:09 +00:00
Craig Topper
ece489723a [X86] Combine vXi64 multiplies to MULDQ/MULUDQ during DAG combine instead of lowering.
Previously we used a custom lowering for this because of the AVX1 splitting requirement. But we can do the split during DAG combine if we check the types and subtarget

llvm-svn: 329510
2018-04-07 19:09:52 +00:00
Craig Topper
ca582c644a [DAGCombiner] Add a combine to turn a build vector of zero extends of extract vector elts into a vector zero extend and possibly an extract subvector.
llvm-svn: 329509
2018-04-07 19:09:50 +00:00
Robert Widmann
58b3cf78df [llgo] Move SetSubprogram
Summary: Fixes the bots - I moved LLVMSetSubprogram into the DIBuilder bindings, so the Go bindings need to move as well.

Reviewers: whitequark

Reviewed By: whitequark

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D45402

llvm-svn: 329505
2018-04-07 16:26:59 +00:00
Simon Pilgrim
dc5b4111e0 [CostModel][X86] Regenerate vector reduction cost tests with update_analyze_test_checks.py
NOTE: We're only really interested in the extractelement cost (which represents the entire reduction).
llvm-svn: 329504
2018-04-07 14:20:10 +00:00
Sanjay Patel
7a4b8d9410 [InstCombine] simplify code that propagates FMF; NFC
llvm-svn: 329503
2018-04-07 14:14:23 +00:00
Simon Pilgrim
e9a4a3920c [CostModel][X86] Regenerate vector select cost tests with update_analyze_test_checks.py
llvm-svn: 329502
2018-04-07 14:09:54 +00:00
Sanjay Patel
5d9b2cef51 [InstCombine] add/move tests for fsub folds; NFC
There are a pair of folds that try to merge fneg into fsub
with an intervening cast, but as shown in the FIXME tests,
they can create extra instructions.

llvm-svn: 329501
2018-04-07 14:07:58 +00:00
Simon Pilgrim
7a86538035 [CostModel][X86] Regenerate vector integer truncation cost tests with update_analyze_test_checks.py
llvm-svn: 329500
2018-04-07 14:05:35 +00:00
Simon Pilgrim
a8cab279eb [CostModel][X86] Regenerate silvermont (and added goldmont) cost tests with update_analyze_test_checks.py
llvm-svn: 329499
2018-04-07 14:02:14 +00:00
Simon Pilgrim
2d7addee08 [CostModel][X86] Fix v32i16/v64i8 SETCC costs on AVX512BW targets
llvm-svn: 329498
2018-04-07 13:24:33 +00:00
Simon Pilgrim
81a6db4f51 [CostModel][X86] Regenerate vector comparison cost tests with update_analyze_test_checks.py
llvm-svn: 329497
2018-04-07 12:47:35 +00:00
Simon Pilgrim
787f0b993b [llvm-exegesis] Fix unused return value warning and add a useful error message for event counter reads.
llvm-svn: 329496
2018-04-07 11:37:21 +00:00
Tim Northover
beda738748 Reapply ARM: Do not spill CSR to stack on entry to noreturn functions
Should fix UBSan bot by also checking there's no "uwtable" attribute
before skipping. Otherwise the unwind table will be useless since its
moves expect CSRs to actually be preserved.

A noreturn nounwind function can be expected to never return in any way, and by
never returning it will also never have to restore any callee-saved registers
for its caller. This makes it possible to skip spills of those registers during
function entry, saving some stack space and time in the process. This is rather
useful for embedded targets with limited stack space.

Should fix PR9970.

Patch mostly by myeisha (pmb).

llvm-svn: 329494
2018-04-07 10:57:03 +00:00
Roman Lebedev
2e10472667 [InstCombine] Get rid of select of bittest (PR36950 / PR17564)
Summary:
See [[ https://bugs.llvm.org/show_bug.cgi?id=36950 | PR36950 ]], [[ https://bugs.llvm.org/show_bug.cgi?id=17564 | PR17564 ]], D45065, D45107
https://godbolt.org/g/iAYRup

Alive proof: https://rise4fun.com/Alive/uiH

Testing: `ninja check-llvm`

Reviewers: spatel, craig.topper

Reviewed By: spatel

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D45108

llvm-svn: 329492
2018-04-07 10:37:24 +00:00
Roman Lebedev
f69ee08c94 [unittests] ADT: silence -Wself-assign diagnostics
Summary:
D44883 extends -Wself-assign to also work on C++ classes.
In it's current state (as suggested by @rjmccall), it is not under it's own sub-group.
Since that diag is enabled by `-Wall`, stage2 testing showed that:
* It does not fire on any llvm code
* It does fire for these 3 unittests
* It does fire for libc++ tests

This diff simply silences those new warnings in llvm's unittests.
A similar diff will be needed for libcxx. (`libcxx/test/std/language.support/support.types/byteops/`, maybe something else)

Since i don't think we want to repeat rL322901, let's talk about it.
I've subscribed everyone who i think might be interested...

There are several ways forward:
* Not extend -Wself-assign, close D44883. Not very productive outcome i'd say.
* Keep D44883 in it's current state.
  Unless your custom overloaded operators do something unusual for when self-assigning,
  the warning is no less of a false-positive than the current -Wself-assign.
  Except for tests of course, there you'd want to silence it. The current suggestion is:
  ```
  S a;
  a = (S &)a;
  ```
* Split the diagnostic in two - `-Wself-assign-builtin` (i.e. what is `-Wself-assign` in trunk),
  and `-Wself-assign-overloaded` - the new part in D44883.
  Since, as i said, i'm not really sure why it would be less of a error than the current `-Wself-assign`,
  both would still be in `-Wall`. That way one could simply pass `-Wno-self-assign-overloaded` for all the tests.
  Pretty simple to do, and will surely work.
* Split the diagnostic in two - `-Wself-assign-trivial`, and `-Wself-assign-nontrivial`.
  The choice of which diag to emit would depend on trivial-ness of that particular operator.
  The current `-Wself-assign` would be `-Wself-assign-trivial`.
  https://godbolt.org/g/gwDASe - `A`, `B` and `C` case would be treated as trivial, and `D`, `E` and `F` as non-trivial.
  Will be the most complicated to implement.

Thoughts?

Reviewers: aaron.ballman, rsmith, rtrieu, rjmccall, dblaikie, atrick, gottesmm

Reviewed By: dblaikie

Subscribers: lebedev.ri, phosek, vsk, rnk, thakis, sammccall, mclow.lists, llvm-commits, rjmccall

Differential Revision: https://reviews.llvm.org/D45082

llvm-svn: 329491
2018-04-07 10:37:18 +00:00
Vitaly Buka
c6f736aceb Fix stack-use-after-scope in test previously hidden by -fmerge-all-constants
llvm-svn: 329489
2018-04-07 09:46:00 +00:00
Robert Widmann
e88501d956 [LLVM-C] Move DIBuilder Bindings For Block Scopes
Summary: Move LLVMDIBuilderCreateFunction , LLVMDIBuilderCreateLexicalBlock, and LLVMDIBuilderCreateLexicalBlockFile from Go to LLVM-C.

Reviewers: whitequark, harlanhaskins, deadalnix

Reviewed By: whitequark, harlanhaskins

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D45352

llvm-svn: 329488
2018-04-07 06:07:55 +00:00
Vitaly Buka
37f0ead627 Revert "ARM: Do not spill CSR to stack on entry to noreturn functions"
Breaks ubsan test TestCases/Misc/missing_return.cpp on ARM

This reverts commit r329287

llvm-svn: 329486
2018-04-07 05:36:44 +00:00