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Commit Graph

159352 Commits

Author SHA1 Message Date
Paul Robinson
fa778bec05 [DWARFv5] Support DW_FORM_line_strp in llvm-dwarfdump.
This form is like DW_FORM_strp, but points to .debug_line_str instead
of .debug_str as the string section.  It's intended to be used from
the line-table header, and allows string-pooling of directory and
filenames across compilation units.

Differential Revision: https://reviews.llvm.org/D42553

llvm-svn: 323476
2018-01-25 22:02:36 +00:00
Easwaran Raman
bd3a1aab59 [SyntheticCounts] Rewrite the code using only graph traits.
Summary:
The intent of this is to allow the code to be used with ThinLTO. In
Thinlink phase, a traditional Callgraph can not be computed even though
all the necessary information (nodes and edges of a call graph) is
available. This is due to the fact that CallGraph class is closely tied
to the IR. This patch first extends GraphTraits to add a CallGraphTraits
graph. This is then used to implement a version of counts propagation
on a generic callgraph.

Reviewers: davidxl

Subscribers: mehdi_amini, tejohnson, llvm-commits

Differential Revision: https://reviews.llvm.org/D42311

llvm-svn: 323475
2018-01-25 22:02:29 +00:00
Joel Jones
4cec19ffa9 [AArch64] Enable aggressive FMA on T99 and provide AArch64 options for others.
This patch enables aggressive FMA by default on T99, and provides a -mllvm
option to enable the same on other AArch64 micro-arch's (-mllvm
-aarch64-enable-aggressive-fma).

Test case demonstrating the effects on T99 is included.

Patch by: steleman (Stefan Teleman)

Differential Revision: https://reviews.llvm.org/D40696

llvm-svn: 323474
2018-01-25 21:55:39 +00:00
Vedant Kumar
051cdef3c9 [Debug] Add dbg.value intrinsics for PHIs created during LCSSA.
This patch is an enhancement to propagate dbg.value information when
Phis are created on behalf of LCSSA.  I noticed a case where a value
carried across a loop was reported as <optimized out>.

Specifically this case:

  int bar(int x, int y) {
    return x + y;
  }

  int foo(int size) {
    int val = 0;
    for (int i = 0; i < size; ++i) {
      val = bar(val, i);  // Both val and i are correct
    }
    return val; // <optimized out>
  }

In the above case, after all of the interesting computation completes
our value is reported as "optimized out." This change will add a
dbg.value to correct this.

This patch also moves the dbg.value insertion routine from
LoopRotation.cpp into Local.cpp, so that we can share it in both places
(LoopRotation and LCSSA).

Patch by Matt Davis!

Differential Revision: https://reviews.llvm.org/D42551

llvm-svn: 323472
2018-01-25 21:37:07 +00:00
Vedant Kumar
d07c26287f [Debug] Add a utility to propagate dbg.value to new PHIs, NFC
This simply moves an existing utility to Utils for reuse.

Split out of: https://reviews.llvm.org/D42551

Patch by Matt Davis!

llvm-svn: 323471
2018-01-25 21:37:05 +00:00
Evgeniy Stepanov
b7fb5801e7 [asan] Fix kernel callback naming in instrumentation module.
Right now clang uses "_n" suffix for some user space callbacks and "N" for the matching kernel ones. There's no need for this and it actually breaks kernel build with inline instrumentation. Use the same callback names for user space and the kernel (and also make them consistent with the names GCC uses).

Patch by Andrey Konovalov.

Differential Revision: https://reviews.llvm.org/D42423

llvm-svn: 323470
2018-01-25 21:28:51 +00:00
Craig Topper
4a4cc9aaaf [X86] Teach Intel syntax InstPrinter to print lock prefixes that have been parsed from the asm parser.
The asm parser puts the lock prefix in the MCInst flags so we need to check that in addition to TSFlags. This matches what the ATT printer does.

llvm-svn: 323469
2018-01-25 21:23:57 +00:00
Craig Topper
59b93a878f [X86] Combine two unnecessarily complicated ifs that had the same body. NFC
llvm-svn: 323468
2018-01-25 21:23:51 +00:00
Aaron Ballman
d75397b53e Revert r322132; it appears to be an accidental commit, based on the commit message. The original author of the commit has not commented on whether this was accidental or purposeful, so if this revert is in error, the author can re-commit with an actual commit message.
llvm-svn: 323466
2018-01-25 21:08:23 +00:00
Aaron Ballman
9f0f6d25f7 Reverting r323463 as it appears to be an accidental commit. Regardless, it broke a lot of build bots, so reverting back to green.
http://lab.llvm.org:8011/builders/lldb-amd64-ninja-netbsd8/builds/9294
http://lab.llvm.org:8011/builders/llvm-clang-lld-x86_64-scei-ps4-ubuntu-fast/builds/24084
http://lab.llvm.org:8011/builders/clang-ppc64le-linux-lnt/builds/9567

llvm-svn: 323465
2018-01-25 21:03:38 +00:00
Jake Ehrlich
9e42d579d2 tmp
llvm-svn: 323463
2018-01-25 20:24:17 +00:00
Easwaran Raman
3831ff54c8 Re-land "[ThinLTO] Add call edges' relative block frequency to per-module summary."
It was reverted after buildbot regressions.

Original commit message:

This allows relative block frequency of call edges to be passed
to the thinlink stage where it will be used to compute synthetic
entry counts of functions.

llvm-svn: 323460
2018-01-25 19:27:17 +00:00
Shoaib Meenai
f6c223bd56 [CMake] Fix Bug Report URL
It looks like this hasn't been updated since bugzilla moved.

Patch by Colden Cullen.

Differential Revision: https://reviews.llvm.org/D42496

llvm-svn: 323457
2018-01-25 19:16:46 +00:00
Vedant Kumar
529e9bc053 Revert "asan: add kernel inline instrumentation test"
This reverts commit r323451. It breaks this bot:

http://lab.llvm.org:8011/builders/llvm-clang-lld-x86_64-scei-ps4-ubuntu-fast/builds/24077

llvm-svn: 323454
2018-01-25 18:20:19 +00:00
Krzysztof Parzyszek
4b27c66175 [Hexagon] SETEQ and SETNE are valid integer condition codes
llvm-svn: 323452
2018-01-25 18:07:27 +00:00
Vedant Kumar
dc237bbd66 asan: add kernel inline instrumentation test
Patch by Andrey Konovalov!

Differential Revision: https://reviews.llvm.org/D42473

llvm-svn: 323451
2018-01-25 18:05:44 +00:00
Alexey Bataev
21dab65307 Revert "[SLP] Fix for PR32086: Count InsertElementInstr of the same elements as shuffle."
This reverts commit r323441 to fix buildbots.

llvm-svn: 323447
2018-01-25 17:28:12 +00:00
Benjamin Kramer
2bb5afc3db [ADT] Make moving Optional not reset the Optional it moves from.
This brings it in line with std::optional. My recent changes to
make Optional of trivial types trivially copyable introduced
diverging behavior depending on the type, which is bad. Now all
types have the same moving behavior.

llvm-svn: 323445
2018-01-25 17:24:22 +00:00
George Rimar
7489087151 [LTO] - Introduce GlobalResolution::Prevailing flag.
It is NFC refactoring change that will make
D42107 a bit smaller.

Differential revision: https://reviews.llvm.org/D42528

llvm-svn: 323444
2018-01-25 17:23:27 +00:00
Sam McCall
45da3cf0f3 Give scope_exit helper correct move semantics
llvm-svn: 323442
2018-01-25 16:55:48 +00:00
Alexey Bataev
2823b5dc5e [SLP] Fix for PR32086: Count InsertElementInstr of the same elements as shuffle.
Summary:
If the same value is going to be vectorized several times in the same
tree entry, this entry is considered to be a gather entry and cost of
this gather is counter as cost of InsertElementInstrs for each gathered
value. But we can consider these elements as ShuffleInstr with
SK_PermuteSingle shuffle kind.

Reviewers: spatel, RKSimon, mkuper, hfinkel

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D38697

llvm-svn: 323441
2018-01-25 16:45:18 +00:00
Simon Pilgrim
d65b7cc7d9 [X86] Apply clang-format to detectUSatPattern. NFCI.
Cleanup from D42544

llvm-svn: 323439
2018-01-25 16:38:56 +00:00
Krzysztof Parzyszek
5de8dcdfe0 Revert "[Hexagon] Replace EmitFunctionEntryCode with a DAG preprocessing code"
This reverts r323374. The fix needs a different approach.

llvm-svn: 323438
2018-01-25 16:36:53 +00:00
Sanjay Patel
cb0b058905 [InstCombine] narrow masked zexted binops (PR35792)
This is guarded by shouldChangeType(), so the tests show that
we don't do the fold if the narrower type is not legal. Note
that there is a proposal (D42424) that would change the results
for the specific cases shown in these tests. That difference is
also discussed in PR35792:
https://bugs.llvm.org/show_bug.cgi?id=35792

Alive proofs for the cases handled here as well as the bitwise 
logic binops that we should already do better on:
https://rise4fun.com/Alive/c97
https://rise4fun.com/Alive/Lc5E
https://rise4fun.com/Alive/kdf

llvm-svn: 323437
2018-01-25 16:34:36 +00:00
Sanjay Patel
813ee2220b [InstCombine] add tests for PR35792; NFC
llvm-svn: 323436
2018-01-25 16:03:44 +00:00
Alexey Bataev
112b81231e Revert "[SLP] Fix for PR32086: Count InsertElementInstr of the same elements as shuffle."
This reverts commit r323430 to fix buildbots.

llvm-svn: 323432
2018-01-25 15:20:29 +00:00
Alexey Bataev
ef5c1967dc [SLP] Fix for PR32086: Count InsertElementInstr of the same elements as shuffle.
Summary:
If the same value is going to be vectorized several times in the same
tree entry, this entry is considered to be a gather entry and cost of
this gather is counter as cost of InsertElementInstrs for each gathered
value. But we can consider these elements as ShuffleInstr with
SK_PermuteSingle shuffle kind.

Reviewers: spatel, RKSimon, mkuper, hfinkel

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D38697

llvm-svn: 323430
2018-01-25 15:01:36 +00:00
Simon Pilgrim
385891780e [X86][SSE] Add tests for vector truncation with signed saturation
AVX512 isn't using X86ISD::VTRUNCS and SSE/AVX isn't using PACKSS/PACKUS

llvm-svn: 323428
2018-01-25 14:56:21 +00:00
Hans Wennborg
756e8f8932 Update build_llvm_package.bat
I moved to a new machine and had to adjust a few things:

- Use %USERNAME% instead of %USER% (not sure why %USER% didn't work anymore)
- Update paths for using Python 3.6 instead of 3.5
- Skip building OpenMP which seems broken on Windows
- Work around new vsdevcmd.bat changing paths:
  https://developercommunity.visualstudio.com/content/problem/26780/vsdevcmdbat-changes-the-current-working-directory.html
- Build stage-0 compiler with MinSizeRel to work around VS 2017 bug:
  https://developercommunity.visualstudio.com/content/problem/139043/miscompile-in-trivial-c-program-with-155-preview-2.html

llvm-svn: 323427
2018-01-25 14:43:10 +00:00
Simon Pilgrim
6812a33d3c [X86][SSE] Add tests for vector truncation with unsigned saturation
AVX512 tends to do a good job, but there are some missed opportunities with SSE/AVX

llvm-svn: 323422
2018-01-25 14:28:55 +00:00
Zvi Rackover
f56864884c X86 Tests: Add AVX+XOP config to SDIV combine tests
As pointed out in D42479, XOP also needs to be covered as it supports
vector shifts with variable shift amount.

llvm-svn: 323418
2018-01-25 14:07:33 +00:00
Amjad Aboud
ba09d82dc0 Another try to commit 323321 (aggressive instruction combine).
llvm-svn: 323416
2018-01-25 12:06:32 +00:00
George Rimar
ba9f28eca0 [LTO] - Get rid of friend 'computeDeadSymbols'. NFC.
computeDeadSymbols accessed isLive() which was not public
before. It does not make much sence to keep isLive() private
because flags are available via flags() public member anyways.

llvm-svn: 323415
2018-01-25 11:45:02 +00:00
Jonas Devlieghere
33eed2b799 [Dwarf] Add dsymutil Atom extensions. NFC
This patch extends the atom types used by the Apple accelerator tables
with two dsymutil extensions:

 - DW_ATOM_type_type_flags
 - DW_ATOM_qual_name_hash

llvm-svn: 323414
2018-01-25 11:19:08 +00:00
Mikael Holmen
7a1f7a9d90 [GlobalOpt] Emit fragments using field offsets from struct layout
Summary:
When creating the debug fragments for a SRA'd struct, use the fields'
offsets, taken from the struct layout, as the offsets for the resulting
fragments. This fixes an issue where GlobalOpt would emit fragments with
incorrect offsets for padded fields.

This should solve PR36016.

Patch by David Stenberg.

Reviewers: aprantl

Reviewed By: aprantl

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D42489

llvm-svn: 323411
2018-01-25 10:09:26 +00:00
Igor Laevsky
0fefdb08dc [FuzzMutate] Inst deleter doesn't work with PhiNodes
Differential Revision: https://reviews.llvm.org/D42412

llvm-svn: 323409
2018-01-25 09:22:18 +00:00
Eugene Leviant
449a2735e1 [IRMover] Add comment and fix test case
llvm-svn: 323407
2018-01-25 08:35:52 +00:00
Craig Topper
ce1999a1e1 [X86] Expand IMUL/MUL instregexs in Intel scheduler models. Add load latency to some of them in SkylakeClient model.
The regular expressions and the imul names caused some instructions to be matched by multiple regexs creating unpredictable results.

This changes them all to use explicit instrs instead.

While doing this I also found that some instructions in Skylake were missing load latency so I fixed that too.

llvm-svn: 323406
2018-01-25 06:57:42 +00:00
Craig Topper
3a3e63c149 [X86] Expand IMUL/MUL instregexs in Znver1 scheduler to show what's actually implemented.
The IMUL instruction names mixed with the prefix matching of the instregex lead to some strange matches. The worst being that several memory instructions are using the register form latency.

I don't know what the right answer is, so I've left TODOs and will try to work with the AMD folks to get this cleaned up.

llvm-svn: 323405
2018-01-25 06:57:39 +00:00
Don Hinton
7c9b4f6a12 [cmake] Set cmake policy CMP0068 to suppress warnings on OSX
Set cmake policy CMP0068=NEW, if available, and set
"CMAKE_BUILD_WITH_INSTALL_NAME_DIR=On" globally to
maintain current behavior.

This is needed to suppress warnings on OSX starting with cmake version
3.9.6.

Differential Revision: https://reviews.llvm.org/D42463

llvm-svn: 323404
2018-01-25 04:55:18 +00:00
Craig Topper
fae7861fa0 [X86] Name the MMX phaddd instruction with 3 Ds instead of just 2. NFC
llvm-svn: 323403
2018-01-25 04:45:32 +00:00
Craig Topper
cc7c2fbcc1 [X86] Remove 64/128/256 from MMX/SSE/AVX instruction names for overall consistency. NFC
MMX instrutions all start with MMX_ so the 64 isn't needed for disambigutation.
SSE/AVX1 instructions are assumed 128-bit so we don't need to say 128.
AVX2 instructions should use a Y to indicate 256-bits.

llvm-svn: 323402
2018-01-25 04:45:30 +00:00
Craig Topper
0a6f713634 [X86] Remove unnecessary '_alt' and '_Int' from scheduler model regular expressions.
These were treated as optional suffixes, but the regular expressions are already prefix matches so this is unnecessary. It breaks the binary search optimization in tablegen due to the top level question mark.

llvm-svn: 323401
2018-01-25 04:45:28 +00:00
Aditya Nandakumar
af9f61606c Add support for pattern matching MachineInsts.
https://reviews.llvm.org/D42439

Add Instcombine like matchers for MachineInstructions. There are only
globalISel matchers for now.

llvm-svn: 323400
2018-01-25 02:53:06 +00:00
Lang Hames
0943412040 [ORC] Refactor the various lookupFlags methods to return the flags map via the
first argument.

This makes lookupFlags more consistent with lookup (which takes the query as the
first argument) and composes better in practice, since lookups are usually
linearly chained: Each lookupFlags can populate the result map based on the
symbols not found in the previous lookup. (If the maps were returned rather than
passed by reference there would have to be a merge step at the end).

llvm-svn: 323398
2018-01-25 01:43:00 +00:00
Aditya Nandakumar
44de88f9fc [GISel]: Fix modules build by including <cassert>
llvm-svn: 323394
2018-01-25 01:16:14 +00:00
Lang Hames
c647b54b9d [ORC] Try to silence compiler error at
http://lab.llvm.org:8011/builders/lld-x86_64-darwin13/builds/17264

NFC.

llvm-svn: 323393
2018-01-25 01:05:29 +00:00
Aditya Nandakumar
65202b9329 [GISel]: Implement GlobalISel combiner API.
https://reviews.llvm.org/D41373

The various components are

GICombinerHelper contains transformations that are common to all
targets. Targets can pick and choose which transformations (at
function/opcode granularity) each pass uses via configuring a
GICombinerInfo.

GICombiner contains some common code and it does the traversal,
driving of combines, worklist management and iterating until
convergence.

GICombinerInfo is an interface with a virtual method called combine.
The combiner info will allow targets to pick and choose (or
implement their own specific combines). CombineInfos can make
use of available combines in GICombineHelper to configure the
transformations for a particular pass. Currently this approach allows
cherry picking transformations from helpers (at function/opcode
granularity) and also allows early returning on specific
transformations. Targets also get to prioritize whether target specific
combines run before/after the opt-in generic combines. Ideally we would
like this part to be configured by both C++ and Tablegen. The
CombinerInfo also has a field which indicates how to deal with
IllegalOps (ie - should we allow to create them/or legalize them?).

A CombinerPass would configure a CombinerInfo, create the GICombiner
with the Info, and call
GICombiner::combineMachineInstrs(MachineFunction&).
This organization is very similar to the GISelLegalizer.

llvm-svn: 323392
2018-01-25 00:41:58 +00:00
Volkan Keles
081998b7f1 [GlobalISel][TableGen] Fix the statistics for emitted patters
Collected statistics for the number of patterns emitted can be
incorrect because rules can be grouped if OptimizeMatchTable
is enabled. Increase the counter in RuleMatcher::emit(...)
to avoid that.

llvm-svn: 323391
2018-01-25 00:18:52 +00:00
Lang Hames
e2eabc82ff [ORC] Add helpers for building orc::SymbolResolvers from legacy findSymbol-style
functions/methods that return JITSymbols.

lookupFlagsWithLegacyFn takes a SymbolNameSet and a legacy lookup function and
returns a LookupFlagsResult. It uses the legacy lookup function to search for
each symbol. If found, getFlags is called on the symbol and the flags added to
the SymbolFlags map. If not found, the symbol is added to the SymbolsNotFound
set.

lookupWithLegacyFn takes an AsynchronousSymbolQuery, a SymbolNameSet and a
legacy lookup function. Each symbol in the SymbolNameSet is searched for via the
legacy lookup function. If it is found, its getAddress function is called
(triggering materialization if it has not happened already) and the resulting
mapping stored in the query. If it is not found the symbol is added to the
unresolved symbols set which is returned at the end of the function. If an
error occurs during legacy lookup or materialization it is passed to the
query via setFailed and the function returns immediately.

llvm-svn: 323388
2018-01-24 23:09:07 +00:00