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Commit Graph

210 Commits

Author SHA1 Message Date
Vikram S. Adve
bcd2ba2fea Modify AllocateLocalVar method to take a size argument.
llvm-svn: 1318
2001-11-15 15:22:26 +00:00
Ruchira Sasanka
897fbc8db8 fixed setUsedRegAtMI
llvm-svn: 1317
2001-11-15 15:00:53 +00:00
Ruchira Sasanka
9892c23157 Changed phi elimination code
llvm-svn: 1311
2001-11-15 00:27:14 +00:00
Ruchira Sasanka
7b4fe5d51b Small changed to printing a machine operand - It the operand is a def, it prints
a star after it - only for debugging

llvm-svn: 1309
2001-11-14 20:05:23 +00:00
Vikram S. Adve
a8f8fd19c0 Don't assume constant operand can only be in position 1!
llvm-svn: 1308
2001-11-14 18:49:45 +00:00
Vikram S. Adve
9ed66f8e94 Idiotic error in last fix.
llvm-svn: 1306
2001-11-14 17:55:02 +00:00
Vikram S. Adve
e3c0a06ef9 Don't need to load a NULL pointer constant from memory!
llvm-svn: 1305
2001-11-14 17:24:49 +00:00
Ruchira Sasanka
6d6f616a06 Added support method for setting interference for pseudo instructions
llvm-svn: 1303
2001-11-14 15:37:13 +00:00
Ruchira Sasanka
f00a3e0aab Added interference for args in pseudo instructions
llvm-svn: 1300
2001-11-14 15:33:58 +00:00
Chris Lattner
4046596beb Remove much cruft from the MemAccessInst instruction
llvm-svn: 1298
2001-11-14 11:27:58 +00:00
Ruchira Sasanka
a39f918171 commented out lines printing code after scheduling
llvm-svn: 1295
2001-11-13 23:12:53 +00:00
Ruchira Sasanka
b1e6823bc1 Fixed a bug concering LR spilling. Earlier, added spilled code was not inserted
into the instruction stream correctly.

llvm-svn: 1294
2001-11-13 23:09:30 +00:00
Vikram S. Adve
3df85d6132 Do the same for allocating spills to get their alignment right too.
llvm-svn: 1285
2001-11-12 23:40:22 +00:00
Vikram S. Adve
af9c0a766a When allocating space on stack for writing a register,
use the size of the register, not the size of the Value type,
to get the right alignment.

llvm-svn: 1284
2001-11-12 23:26:35 +00:00
Vikram S. Adve
0bd498dd38 Bug fix in offset alignment computations: don't subtract the padding
value from size *before* subtracting size from offset!

llvm-svn: 1283
2001-11-12 23:26:23 +00:00
Ruchira Sasanka
d6c5e0f535 For phi elimination, now we are generating only one instruction
using cpValue2Value instead of
passing vector to createCopyInstructionByType.

llvm-svn: 1272
2001-11-12 19:42:27 +00:00
Vikram S. Adve
624846d3fd Eliminate most uses of the machine instruction vector for each LLVM instr,
since some m. instr. may be generated by LLVM instrs. in other blocks.
Handle non-SSA (anti and output) edges and true edges uniformly by
working with machine instructions alone.

llvm-svn: 1269
2001-11-12 18:53:43 +00:00
Ruchira Sasanka
9b7638e108 Added phi elimination code - not final
llvm-svn: 1264
2001-11-12 14:44:50 +00:00
Vikram S. Adve
1fc185b8e7 Improved printing routines.
llvm-svn: 1263
2001-11-12 14:19:47 +00:00
Vikram S. Adve
3a5bf13976 Major improvement to how nodes are built for a BB.
LLVM instruction is no longer recorded in each node, but BB is.

llvm-svn: 1262
2001-11-12 14:18:01 +00:00
Vikram S. Adve
31372d2b26 Adjust all stack variable offsets to be aligned by size.
llvm-svn: 1261
2001-11-12 05:17:23 +00:00
Vikram S. Adve
51265e7072 Fix errors in computing downgrowing offsets, and in
computing size of extra outgoing args.

llvm-svn: 1256
2001-11-11 21:23:33 +00:00
Vikram S. Adve
0b0bd6e749 Only add true dep. edges from an earlier to a later instruction.
This wasn't a problem until we started putting copies for Phi values
that produced cycles in the SchedGraph!

llvm-svn: 1254
2001-11-11 01:23:27 +00:00
Ruchira Sasanka
bf9791fe90 Changed code to ignore Phi Nodes in PhyRegAlloc
llvm-svn: 1253
2001-11-10 21:21:36 +00:00
Ruchira Sasanka
699d104906 Coalesing bug fix - now checks for the same regType instead of the same
regClass since FP class has two reg Types.

llvm-svn: 1236
2001-11-10 00:20:24 +00:00
Ruchira Sasanka
c32ebd1a4e No major change
llvm-svn: 1235
2001-11-09 23:49:42 +00:00
Vikram S. Adve
cc746868d7 Use node->getOpCode() instead of node->getMachineInstr()->getOpCode().
Much nicer.

llvm-svn: 1223
2001-11-09 02:14:20 +00:00
Chris Lattner
d0f1f10bec Add method decl
llvm-svn: 1217
2001-11-08 20:55:05 +00:00
Ruchira Sasanka
5ebbfbdd2e corrected insertCode4Spilled ... bug.
llvm-svn: 1212
2001-11-08 19:11:30 +00:00
Ruchira Sasanka
1f95b36e06 Uncommented LR spill code insertion
llvm-svn: 1207
2001-11-08 16:43:25 +00:00
Vikram S. Adve
841ffd6a44 Major change to how defs are found when adding dependences (they
are now found as part of the initial walk of the machine code).
Also memory load/store instructions can be generated for non-memory
LLVM instructions, which wasn't handled before.  It is now.

llvm-svn: 1199
2001-11-08 05:20:23 +00:00
Vikram S. Adve
149bd3837d MachineCodeForMethod is now an annotation on class Method.
llvm-svn: 1198
2001-11-08 05:18:18 +00:00
Vikram S. Adve
3cefc04c0a Added two minor methods.
llvm-svn: 1187
2001-11-08 04:49:52 +00:00
Vikram S. Adve
2c8710f0c4 Removed class RegStackOffsets and used class MachineCodeForMethod
directly to manage stack frame.

llvm-svn: 1186
2001-11-08 04:48:50 +00:00
Vikram S. Adve
2cdcbfb6e0 Major overhaul of stack frame management.
llvm-svn: 1185
2001-11-08 04:47:06 +00:00
Ruchira Sasanka
0b842b90ef Fixed bug - added code in pushUnconstrainedIGNodes() to check whether a node
is already pushed to stack by a previous call to the same method.

llvm-svn: 1154
2001-11-06 15:25:38 +00:00
Vikram S. Adve
f83b90af5c Bug fix: uninitialized variable.
llvm-svn: 1147
2001-11-06 05:11:05 +00:00
Vikram S. Adve
c3993d28ca Modified graph construction to use one pass to find all defs.
Avoids having to handle some special cases that cause complex interactions
with instr. selection.

llvm-svn: 1138
2001-11-05 04:04:23 +00:00
Vikram S. Adve
24fbd417a0 Make reg. numbers signed ints.
llvm-svn: 1137
2001-11-05 03:56:02 +00:00
Chris Lattner
ea63d43a07 Minor method rename
llvm-svn: 1119
2001-11-04 08:08:34 +00:00
Ruchira Sasanka
b5a9b22fa7 Added an assertion since it seems like AdjList returns an errornous size in method
IGNode::pushOnStack().

llvm-svn: 1116
2001-11-03 22:01:09 +00:00
Ruchira Sasanka
77cc18917c Added support for correct spilling of %ccr
llvm-svn: 1112
2001-11-03 20:41:22 +00:00
Ruchira Sasanka
116fbe7fc7 Arranged stack frame - needs furhter organization
llvm-svn: 1108
2001-11-03 17:14:44 +00:00
Ruchira Sasanka
7673c5f6e0 Arranged stack frame - needs furhter organization
Moved InsertCallerSaveInstr to the SparcRegInfo.cpp

llvm-svn: 1106
2001-11-03 17:13:27 +00:00
Vikram S. Adve
7cb485ebbd Record constants that need to be emitted in the assembly code.
llvm-svn: 1010
2001-10-28 21:46:23 +00:00
Vikram S. Adve
ffe94cb175 Allow combinations of True/Anti/Output flags for each edge to
support, e.g., dependences on Call instructions.

llvm-svn: 1009
2001-10-28 21:45:02 +00:00
Vikram S. Adve
9515b10102 Add edges between call instructions and (a) load/store instructions, and
(b) any instructions that use or set CC registers.  Whether or not the
latter are needed really should be machine-dependent.

llvm-svn: 1008
2001-10-28 21:43:33 +00:00
Ruchira Sasanka
3c4d2dea7c Added support for spilling
llvm-svn: 992
2001-10-28 18:15:12 +00:00
Ruchira Sasanka
e095b077cf Added spill code support; moved insertCallerSaving to SparRegInfo since
we need to handle %ccr reg in a special way.

llvm-svn: 990
2001-10-28 18:12:02 +00:00
Ruchira Sasanka
9aa7352c15 added support to move "added instructions" after the delay slot
llvm-svn: 968
2001-10-23 21:38:42 +00:00