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Author SHA1 Message Date
Eli Friedman
ffa3b8b5f1 Support MSVC x86-32 sret convention. PR11688. Patch by Joe Groff. 
llvm-svn: 148513
 2012-01-20 00:05:46 +00:00
Chad Rosier
ce02cd3faa Fix typo. 
llvm-svn: 148497
 2012-01-19 21:50:08 +00:00
Benjamin Kramer
b3479ef519 Silence warnings about mixing enums. 
llvm-svn: 148495
 2012-01-19 21:11:13 +00:00
Owen Anderson
989d05dfdb Add a dump() implementation for sub-instruction MCOperands. 
llvm-svn: 148493
 2012-01-19 19:32:20 +00:00
Owen Anderson
61bdf3c55c Add a new form of MCOperand, for representing sub-instructions. This is intended for supporting bundles through the MC layer, rather than lowering them pre-MC as we currently do for Thumb2 IT blocks. Since these sub-instruction operands hold pointers to the sub-instructions, it is the responsibility of the target's AsmPrinter to provide storage for them for the duration of the EmitInstruction() call. 
llvm-svn: 148492
 2012-01-19 19:24:37 +00:00
Dan Gohman
9bb84ffb6c Set the "tail" flag on pattern-matched objc_storeStrong calls. 
rdar://10531041.

llvm-svn: 148490
 2012-01-19 19:14:36 +00:00
Devang Patel
b42cea31aa Post process 'and', 'sub' instructions and select better encoding, if available. 
llvm-svn: 148489
 2012-01-19 18:40:55 +00:00
Nick Lewycky
522fc7d29f Actually, this code handles wrapped sets just fine. Noticed by inspection. 
llvm-svn: 148487
 2012-01-19 18:19:42 +00:00
Devang Patel
27ef211648 Intel syntax: There is no need to create unary expr for simple negative displacement. 
llvm-svn: 148486
 2012-01-19 18:15:51 +00:00
Devang Patel
999eaa4b85 Post process 'xor', 'or' and 'cmp' instructions and select better encoding, if available. 
llvm-svn: 148485
 2012-01-19 17:53:25 +00:00
Evgeniy Stepanov
f329e9ee4d Emit ARM EHABI unwinding instructions for 3 more Thumb instructions. 
llvm-svn: 148473
 2012-01-19 12:53:06 +00:00
Craig Topper
cee7bd6b73 Folding table additions and fixes for AVX. 
llvm-svn: 148467
 2012-01-19 08:50:38 +00:00
Craig Topper
3d928aa51b Merge 128-bit and 256-bit SHUFPS/SHUFPD handling. 
llvm-svn: 148466
 2012-01-19 08:19:12 +00:00
Evan Cheng
5a5dfca748 More bundle related API additions. 
llvm-svn: 148465
 2012-01-19 07:47:03 +00:00
Evan Cheng
860e0dcf72 Rewriter should definitly rewrite instructions inside bundles. 
llvm-svn: 148464
 2012-01-19 07:46:36 +00:00
Chris Lattner
b57d05e24b Introduce a new MutableArrayRef class, which refers to a series of mutable 
T's that are consequtively in memory.

llvm-svn: 148463
 2012-01-19 06:34:52 +00:00
Evan Cheng
fe9c0eef4b Enhance finalizeBundle to return end of bundle iterator because it makes sense. 
llvm-svn: 148462
 2012-01-19 06:13:10 +00:00
Jim Grosbach
8a63389253 ARM assembly diagnostic caret in better position for FPImm. 
llvm-svn: 148459
 2012-01-19 02:47:30 +00:00
Jim Grosbach
87e683580c Thumb2 relaxation for tADR to t2ADR. 
llvm-svn: 148456
 2012-01-19 02:09:38 +00:00
Jim Grosbach
ad42e2fc2a Add comment and fix range check in condition. 
llvm-svn: 148455
 2012-01-19 01:50:30 +00:00
Jim Grosbach
48afa48c3e Add testcase. 
llvm-svn: 148454
 2012-01-19 01:36:59 +00:00
Lang Hames
059e79c753 Added methods to get the live range immediately before a given slot. Intended to parallel the getVNInfoBefore method. 
llvm-svn: 148453
 2012-01-19 01:36:06 +00:00
Nick Lewycky
9888a01041 Space after punctuation. 
llvm-svn: 148451
 2012-01-19 01:13:47 +00:00
Evan Cheng
86ca08f633 - Slight change to finalizeBundle() interface. LastMI is not exclusive (pointing 
to instruction right after the last instruction in the bundle.
- Add a finalizeBundle() variant that doesn't specify LastMI. Instead, the code
  will find the last instruction in the bundle by following the 'InsideBundle'
  marker. This is useful in case bundles are formed early (i.e. during MI
  scheduling) but finalized later (i.e. after register allocator has finished
  rewriting virtual registers with physical registers).

llvm-svn: 148444
 2012-01-19 00:46:06 +00:00
Nick Lewycky
c1e7e2eaf6 Add a TargetOption for disabling tail calls. 
llvm-svn: 148442
 2012-01-19 00:34:10 +00:00
Evan Cheng
cfc7639cc7 Rename Finalizebundle to finalizeBundle to conform to coding guideline. 
llvm-svn: 148440
 2012-01-19 00:06:10 +00:00
Jakob Stoklund Olesen
498e016c87 Add experimental -x86-use-regmask command line option. 
It adds register mask operands to x86 call instructions.  Once all the
backend passes support register mask operands, this will be permanently
enabled.

llvm-svn: 148438
 2012-01-18 23:52:22 +00:00
Jakob Stoklund Olesen
85ef53eb8d Ignore register mask operands when lowering instructions to MC. 
This is similar to implicit register operands.  MC doesn't understand
register liveness and call clobbers.

llvm-svn: 148437
 2012-01-18 23:52:19 +00:00
Jakob Stoklund Olesen
acb9eccef3 Add a RegisterMaskSDNode class. 
This SelectionDAG node will be attached to call nodes by LowerCall(),
and eventually becomes a MO_RegisterMask MachineOperand on the
MachineInstr representing the call instruction.

LowerCall() will attach a register mask that depends on the calling
convention.

llvm-svn: 148436
 2012-01-18 23:52:12 +00:00
Rafael Espindola
700f91def8 Add support for the gnueabihf environment. Patch by Sylvestre Ledru. 
llvm-svn: 148434
 2012-01-18 23:35:29 +00:00
Jim Grosbach
b7ab9edb4e Thumb2 alternate syntax for LDR(literal) and friends. 
Explicit pc-relative syntax. For example, "ldrb r2, [pc, #-22]".

rdar://10250964

llvm-svn: 148432
 2012-01-18 22:46:46 +00:00
Devang Patel
ee49d825b1 Process instructions after match to select alternative encoding which may be more desirable. 
llvm-svn: 148431
 2012-01-18 22:42:29 +00:00
Jim Grosbach
fc85e00ba5 Replace FIXME with explanatory comment. 
llvm-svn: 148427
 2012-01-18 22:04:42 +00:00
Jim Grosbach
a1e220fa82 Thumb2 relaxation for LDR(literal). 
If the fixup is out of range for the Thumb1 instruction, relax it
to the Thumb2 encoding instead.

rdar://10711829

llvm-svn: 148424
 2012-01-18 21:54:16 +00:00
Jim Grosbach
9de520d7ad MCAssembler tweak for determining when a symbol difference is resolved. 
If the two fragments are in the same Atom, then the difference
expression is resolvable at compile time. Previously we were checking
that they were in the same fragment, but that breaks down in the
presence of instruction relaxation which has multiple fragments in the
same atom.

rdar://10711829

llvm-svn: 148423
 2012-01-18 21:54:12 +00:00
Jim Grosbach
956279e57a Rename pattern for clarity. 
llvm-svn: 148422
 2012-01-18 21:54:09 +00:00
Dan Gohman
7e17e84f9c Add a depth limit to avoid runaway recursion. 
llvm-svn: 148419
 2012-01-18 21:24:45 +00:00
Dan Gohman
48f4e5752e Use llvm.global_ctors to locate global constructors instead 
of recognizing them by name.

llvm-svn: 148416
 2012-01-18 21:19:38 +00:00
Jakub Staszak
edd8e46c61 Remove trailing spaces and unneeded includes. 
llvm-svn: 148415
 2012-01-18 21:16:33 +00:00
Nadav Rotem
d5e875c776 Document the fact that the selection dag changes the vselect condition type 
llvm-svn: 148411
 2012-01-18 20:50:30 +00:00
Lang Hames
0958707826 Fixed macro condition. 
llvm-svn: 148408
 2012-01-18 19:48:31 +00:00
Jim Grosbach
fc0e8e0ba5 Tidy up. 80 columns. 
llvm-svn: 148401
 2012-01-18 18:52:20 +00:00
Jim Grosbach
f88f0b08c4 Tidy up. MCAsmBackend naming conventions. 
llvm-svn: 148400
 2012-01-18 18:52:16 +00:00
Bill Wendling
3820625bc1 Remove dead code. 
llvm-svn: 148384
 2012-01-18 10:10:28 +00:00
Nadav Rotem
afc446fbcb Fix a bug in the type-legalization of vector integers. When we bitcast one vector type to another, we must not bitcast the result if one type is widened while the other is promoted. 
llvm-svn: 148383
 2012-01-18 08:33:18 +00:00
Pete Cooper
a60db79835 Fix ISD::REG_SEQUENCE to accept physical registers and change TwoAddressInstructionPass to insert copies for any physical reg operands of the REG_SEQUENCE 
llvm-svn: 148377
 2012-01-18 04:16:16 +00:00
Jim Grosbach
b3bef2861c Thumb2 load/store fixups don't set the thumb bit. 
Load/store instructions w/ a fixup to be relative a function marked as thumb
don't use the low bit to specify thumb vs. non-thumb like interworking
branches do, so don't set it when dealing with those fixups.

rdar://10348687.

llvm-svn: 148366
 2012-01-18 00:40:25 +00:00
Jim Grosbach
700e5901a7 Move some ARM specific MCAssmebler bits into the ARMAsmBackend. 
llvm-svn: 148364
 2012-01-18 00:23:57 +00:00
Jakob Stoklund Olesen
e9c53bc69b Add a CoveredBySubRegs property to Register descriptions. 
When set, this bit indicates that a register is completely defined by
the value of its sub-registers.

Use the CoveredBySubRegs property to infer which super-registers are
call-preserved given a list of callee-saved registers.  For example, the
ARM registers D8-D15 are callee-saved.  This now automatically implies
that Q4-Q7 are call-preserved.

Conversely, Win64 callees save XMM6-XMM15, but the corresponding
YMM6-YMM15 registers are not call-preserved because they are not fully
defined by their sub-registers.

llvm-svn: 148363
 2012-01-18 00:16:39 +00:00
Daniel Dunbar
f17ae2a76a [lit] Add a --filter option which is useful when dealing with virtual test 
paths.

llvm-svn: 148362
 2012-01-18 00:03:12 +00:00