..
cconv
[mips] Explicitly select mips32r2 CPU for test cases require 64-bit FPU. NFC
2019-07-09 15:48:05 +00:00
compactbranches
cstmaterialization
Fast-ISel
GlobalISel
[MIPS GlobalISel] Skip copies in addUseDef and addDefUses
2019-07-11 09:28:34 +00:00
indirect-jump-hazard
Rename ExpandISelPseudo->FinalizeISel, delay register reservation
2019-06-19 00:25:39 +00:00
instverify
Rename ExpandISelPseudo->FinalizeISel, delay register reservation
2019-06-19 00:25:39 +00:00
llvm-ir
[mips] Use reg-exp in tests to tolerate register indexes changing. NFC
2019-05-29 14:59:07 +00:00
longbranch
micromips-sizereduction
Describe stack-id as an enum
2019-06-17 09:13:29 +00:00
mips32r6
mips64r6
mirparser
Rename ExpandISelPseudo->FinalizeISel, delay register reservation
2019-06-19 00:25:39 +00:00
msa
[mips] Explicitly select mips32r2 CPU for test cases require 64-bit FPU. NFC
2019-07-09 15:48:05 +00:00
tailcall
2008-06-05-Carry.ll
2008-07-03-SRet.ll
2008-07-06-fadd64.ll
2008-07-07-Float2Int.ll
2008-07-07-FPExtend.ll
2008-07-07-IntDoubleConvertions.ll
2008-07-15-InternalConstant.ll
2008-07-15-SmallSection.ll
2008-07-16-SignExtInReg.ll
2008-07-22-Cstpool.ll
2008-07-23-fpcmp.ll
2008-07-29-icmp.ll
2008-07-31-fcopysign.ll
2008-08-01-AsmInline.ll
2008-08-03-fabs64.ll
2008-08-03-ReturnDouble.ll
2008-08-04-Bitconvert.ll
2008-08-06-Alloca.ll
2008-08-07-CC.ll
2008-08-07-FPRound.ll
2008-08-08-ctlz.ll
2008-10-13-LegalizerBug.ll
2008-11-10-xint_to_fp.ll
2009-11-16-CstPoolLoad.ll
2010-07-20-Switch.ll
2010-11-09-CountLeading.ll
2010-11-09-Mul.ll
2011-05-26-BranchKillsVreg.ll
2012-12-12-ExpandMemcpy.ll
2013-11-18-fp64-const0.ll
abicalls.ll
abiflags32.ll
[mips] Explicitly select mips32r2 CPU for test cases require 64-bit FPU. NFC
2019-07-09 15:48:05 +00:00
abiflags-xx.ll
addc.ll
addi.ll
address-selection.ll
addressing-mode.ll
adjust-callstack-sp.ll
align16.ll
alloca16.ll
alloca.ll
analyzebranch.ll
and1.ll
ase_warnings.ll
asm-large-immediate.ll
assertzext-trunc.ll
atomic64.ll
[FastISel] Skip creating unnecessary vregs for arguments
2019-06-10 16:53:37 +00:00
atomic.ll
[FastISel] Skip creating unnecessary vregs for arguments
2019-06-10 16:53:37 +00:00
atomicCmpSwapPW.ll
[FastISel] Skip creating unnecessary vregs for arguments
2019-06-10 16:53:37 +00:00
atomicops.ll
beqzc1.ll
beqzc.ll
biggot.ll
blez_bgez.ll
blockaddr.ll
br-jmp.ll
branch-relaxation-with-hazard.ll
brconeq.ll
brconeqk.ll
brconeqz.ll
brconge.ll
brcongt.ll
brconle.ll
brconlt.ll
brconne.ll
brconnek.ll
brconnez.ll
brdelayslot.ll
brind-tailcall.ll
brind.ll
brsize3.ll
brsize3a.ll
brundef.ll
bswap.ll
buildpairextractelementf64.ll
buildpairf64-extractelementf64-implicit-sp.ll
Rename ExpandISelPseudo->FinalizeISel, delay register reservation
2019-06-19 00:25:39 +00:00
cache-intrinsic.ll
call-optimization.ll
cfi_offset.ll
[mips] Explicitly select mips32r2 CPU for test cases require 64-bit FPU. NFC
2019-07-09 15:48:05 +00:00
check-adde-redundant-moves.ll
check-noat.ll
ci2.ll
cins.ll
cmov.ll
cmplarge.ll
coalesce-partial-redundant-reguse-terminator.mir
const1.ll
const4a.ll
const6.ll
const6a.ll
const-mult.ll
[DAGCombine][X86][AArch64][MIPS][LANAI] (C - x) - y -> C - (x + y) fold (PR41952)
2019-06-04 11:06:21 +00:00
constantfp0.ll
constraint-c-err.ll
constraint-c.ll
countleading.ll
cprestore.ll
ctlz-v.ll
ctlz.ll
cttz-v.ll
dagcombine_crash.ll
dagcombine-store-gep-chain-slow.ll
DbgValueOtherTargets.test
delay-slot-fill-forward.ll
delay-slot-kill.ll
dext.ll
dins.ll
disable-tail-merge.ll
div_rem.ll
div.ll
divrem.ll
divu_remu.ll
divu.ll
double2int.ll
dsp-patterns-cmp-vselect.ll
dsp-patterns.ll
dsp-r1.ll
dsp-r2.ll
dsp-spill-reload.ll
[FastISel] Skip creating unnecessary vregs for arguments
2019-06-10 16:53:37 +00:00
dsp-vec-load-store.ll
dynamic-stack-realignment.ll
eh-dwarf-cfa.ll
eh-return32.ll
eh-return64.ll
eh.ll
ehframe-indirect.ll
elf_eflags.ll
emergency-spill-slot-near-fp.ll
emit-big-cst.ll
emutls_generic.ll
ex2.ll
extins.ll
f16abs.ll
f32-to-i64-single-float.ll
fabs.ll
fastcc_byval.ll
fastcc.ll
fcmp.ll
fcopysign-f32-f64.ll
fcopysign.ll
fixdfsf.ll
fmadd1.ll
fneg.ll
fp16-promote.ll
fp16instrinsmc.ll
fp16mix.ll
fp16static.ll
fp64a.ll
[mips] Show error in case of using FP64 mode on pre MIPS32R2 CPU
2019-07-09 15:48:16 +00:00
fp-contract.ll
[mips] Explicitly select mips32r2 CPU for test cases require 64-bit FPU. NFC
2019-07-09 15:48:05 +00:00
fp-indexed-ls.ll
fp-spill-reload.ll
fpbr.ll
fpneeded.ll
fpnotneeded.ll
fpxx.ll
frame-address-err.ll
frame-address.ll
frameindex.ll
frem.ll
global-address.ll
global-pointer-reg.ll
gpopt-explict-section.ll
gpreg-lazy-binding.ll
gprestore.ll
helloworld.ll
hf1_body.ll
hf16_1.ll
hf16call32_body.ll
hf16call32.ll
hfptrcall.ll
i32k.ll
i64arg.ll
imm.ll
indirectcall.ll
init-array.ll
inline-asm-i-constraint-i1.ll
[TargetLowering] Extend bool args to inline-asm according to getBooleanType
2019-05-22 16:16:15 +00:00
inlineasm64.ll
inlineasm_constraint_m.ll
inlineasm_constraint_R.ll
inlineasm_constraint_ZC.ll
inlineasm_constraint.ll
inlineasm-assembler-directives.ll
inlineasm-cnstrnt-bad-I-1.ll
inlineasm-cnstrnt-bad-J.ll
inlineasm-cnstrnt-bad-K.ll
inlineasm-cnstrnt-bad-l1.ll
inlineasm-cnstrnt-bad-L.ll
inlineasm-cnstrnt-bad-N.ll
inlineasm-cnstrnt-bad-O.ll
inlineasm-cnstrnt-bad-P.ll
inlineasm-cnstrnt-reg64.ll
inlineasm-cnstrnt-reg.ll
inlineasm-constraint_ZC_2.ll
inlineasm-opcode-bad-y.ll
inlineasm-operand-code.ll
inlineasm-output-template.ll
inlineasmmemop.ll
insn-zero-size-bb.ll
int-to-float-conversion.ll
internalfunc.ll
Revert r361356: "[MIR] Add simple PRE pass to MachineCSE"
2019-05-27 06:00:00 +00:00
interrupt-attr-64-error.ll
interrupt-attr-args-error.ll
interrupt-attr-error.ll
interrupt-attr.ll
jtstat.ll
jump-table-mul.ll
jumptable_labels.ll
l3mc.ll
largeimm1.ll
largeimmprinting.ll
lazy-binding.ll
lb1.ll
lbu1.ll
lcb2.ll
lcb3c.ll
lcb4a.ll
lcb5.ll
lh1.ll
lhu1.ll
lit.local.cfg
[lit] Delete empty lines at the end of lit.local.cfg NFC
2019-06-17 09:51:07 +00:00
llcarry.ll
llrint-conv.ll
[CodeGen] Add lrint/llrint builtins
2019-05-28 20:47:44 +00:00
llround-conv.ll
[CodeGen] Add lround/llround builtins
2019-05-16 13:15:27 +00:00
load-store-left-right.ll
long-call-attr.ll
long-call-mcount.ll
long-calls.ll
longbranch.ll
lrint-conv.ll
[CodeGen] Add lrint/llrint builtins
2019-05-28 20:47:44 +00:00
lround-conv.ll
[CodeGen] Add lround/llround builtins
2019-05-16 13:15:27 +00:00
lw16-base-reg.ll
machineverifier.ll
madd-msub.ll
[DAGCombine][X86][AArch64][MIPS][LANAI] (C - x) - y -> C - (x + y) fold (PR41952)
2019-06-04 11:06:21 +00:00
mature-mc-support.ll
mbrsize4a.ll
memcpy.ll
micromips64-unsupported.ll
micromips-addiu.ll
micromips-addu16.ll
micromips-and16.ll
micromips-andi.ll
micromips-ase-function-attribute.ll
micromips-atomic1.ll
micromips-atomic.ll
micromips-attr.ll
micromips-b-range.ll
micromips-compact-branches.ll
micromips-compact-jump.ll
micromips-delay-slot-jr.ll
micromips-delay-slot.ll
micromips-directives.ll
micromips-eva.mir
Rename ExpandISelPseudo->FinalizeISel, delay register reservation
2019-06-19 00:25:39 +00:00
micromips-gcc-except-table.ll
micromips-gp-rc.ll
micromips-jal.ll
micromips-li.ll
micromips-load-effective-address.ll
micromips-lwc1-swc1.ll
micromips-mtc-mfc.ll
micromips-not16.ll
micromips-or16.ll
micromips-pseudo-mtlohi-expand.ll
[mips] Use reg-exp in tests to tolerate register indexes changing. NFC
2019-05-29 14:59:07 +00:00
micromips-rdhwr-directives.ll
micromips-shift.ll
micromips-short-delay-slot.mir
Describe stack-id as an enum
2019-06-17 09:13:29 +00:00
micromips-subu16.ll
micromips-sw-lw-16.ll
micromips-sw.ll
micromips-target-external-symbol-reloc.ll
Rename ExpandISelPseudo->FinalizeISel, delay register reservation
2019-06-19 00:25:39 +00:00
micromips-xor16.ll
mips3-spill-slot.ll
mips16_32_1.ll
mips16_32_3.ll
mips16_32_4.ll
mips16_32_5.ll
mips16_32_6.ll
mips16_32_7.ll
mips16_32_8.ll
mips16_32_9.ll
mips16_32_10.ll
mips16_fpret.ll
mips16-hf-attr-2.ll
mips16-hf-attr.ll
mips16ex.ll
mips16fpe.ll
mips64-f128-call.ll
mips64-f128.ll
mips64-libcall.ll
mips64-sret.ll
mips64directive.ll
mips64ext.ll
mips64extins.ll
mips64fpimm0.ll
mips64fpldst.ll
mips64imm.ll
mips64instrs.ll
mips64intldst.ll
mips64lea.ll
mips64muldiv.ll
mips64shift.ll
mips64signextendsesf.ll
mips64sinttofpsf.ll
mips-shf-gprel.s
mipslopat.ll
misha.ll
mno-ldc1-sdc1.ll
mul.ll
mulll.ll
mulull.ll
nacl-align.ll
nacl-branch-delay.ll
nacl-reserved-regs.ll
named-register-n32.ll
named-register-n64.ll
named-register-o32.ll
neg1.ll
nmadd.ll
no-odd-spreg-msa.ll
no-odd-spreg.ll
nomips16.ll
not1.ll
null-streamer.ll
null.ll
o32_cc_byval.ll
o32_cc_vararg.ll
o32_cc.ll
octeon_popcnt.ll
octeon.ll
optimize-fp-math.ll
optimize-pic-o0.ll
or1.ll
pbqp-reserved-physreg.ll
powif64_16.ll
pr33682.ll
pr33978.ll
pr34975.ll
pr35071.ll
pr36061.ll
prevent-hoisting.ll
private-addr.ll
private.ll
pseudo-jump-fill.ll
ra-allocatable.ll
rdhwr-directives.ll
reloc-jalr.ll
rem.ll
remat-immed-load.ll
remu.ll
return_address_err.ll
return_address.ll
return-vector.ll
rotate.ll
s2rem.ll
sb1.ll
sel1c.ll
sel2c.ll
select.ll
selectcc.ll
selectiondag-optlevel.ll
seleq.ll
seleqk.ll
selgek.ll
selgt.ll
selle.ll
selltk.ll
selne.ll
selnek.ll
selpat.ll
selTBteqzCmpi.ll
selTBtnezCmpi.ll
selTBtnezSlti.ll
setcc-se.ll
seteq.ll
seteqz.ll
setge.ll
setgek.ll
setle.ll
setlt.ll
setltk.ll
setne.ll
setuge.ll
setugt.ll
setule.ll
setult.ll
setultk.ll
sh1.ll
shift-parts.ll
shrink-wrap-buildpairf64-extractelementf64.mir
shrink-wrapping.ll
simplebr.ll
sint-fp-store_pattern.ll
sitofp-selectcc-opt.ll
sll1.ll
sll2.ll
sll-micromips-r6-encoding.mir
slt.ll
small-section-reserve-gp.ll
spill-copy-acreg.ll
sr1.ll
sra1.ll
sra2.ll
srl1.ll
srl2.ll
stack-alignment.ll
[mips] Explicitly select mips32r2 CPU for test cases require 64-bit FPU. NFC
2019-07-09 15:48:05 +00:00
stackcoloring.ll
stacksize.ll
start-asm-file.ll
stchar.ll
stldst.ll
sub1.ll
sub2.ll
swzero.ll
tail16.ll
tglobaladdr-wrapper.ll
thread-pointer.ll
tls16_2.ll
tls16.ll
tls-alias.ll
tls-models.ll
tls.ll
tnaked.ll
trap1.ll
trap.ll
uitofp.ll
ul1.ll
unaligned-memops-mapping.mir
Rename ExpandISelPseudo->FinalizeISel, delay register reservation
2019-06-19 00:25:39 +00:00
unaligned-memops.ll
Rename ExpandISelPseudo->FinalizeISel, delay register reservation
2019-06-19 00:25:39 +00:00
unalignedload.ll
unsized-global.ll
v2i16tof32.ll
vector-load-store.ll
vector-setcc.ll
weak.ll
whitespace.ll
xor1.ll
xray-mips-attribute-instrumentation.ll
xray-section-group.ll
zeroreg.ll
