| .. |
|
AsmParser
|
[AArch64] - Return address signing dwarf support
|
2018-12-18 10:37:42 +00:00 |
|
Disassembler
|
[AArch64][v8.5A] Add Memory Tagging instructions
|
2018-10-02 10:04:39 +00:00 |
|
InstPrinter
|
[AArch64][v8.5A] Add Branch Target Identification instructions
|
2018-09-27 14:54:33 +00:00 |
|
MCTargetDesc
|
[AArch64] [MinGW] Allow enabling SEH exceptions
|
2018-12-18 08:32:37 +00:00 |
|
TargetInfo
|
|
|
|
Utils
|
[AArch64][v8.5A] Add Branch Target Identification instructions
|
2018-09-27 14:54:33 +00:00 |
|
AArch64.h
|
Introduce control flow speculation tracking pass for AArch64
|
2018-12-18 08:50:02 +00:00 |
|
AArch64.td
|
[AArch64] Refactor the Exynos scheduling predicates
|
2018-12-10 17:17:26 +00:00 |
|
AArch64A53Fix835769.cpp
|
|
|
|
AArch64A57FPLoadBalancing.cpp
|
llvm::sort(C.begin(), C.end(), ...) -> llvm::sort(C, ...)
|
2018-09-27 02:13:45 +00:00 |
|
AArch64AdvSIMDScalarPass.cpp
|
|
|
|
AArch64AsmPrinter.cpp
|
[COFF, ARM64] Emit COFF function header
|
2018-12-11 18:36:14 +00:00 |
|
AArch64BranchTargets.cpp
|
[AArch64][v8.5A] Branch Target Identification code-generation pass
|
2018-10-08 14:04:24 +00:00 |
|
AArch64CallingConvention.h
|
|
|
|
AArch64CallingConvention.td
|
AArch64: clean up some whitespace in Windows CC (NFC)
|
2018-12-04 22:19:29 +00:00 |
|
AArch64CallLowering.cpp
|
[AArch64] Support adding X[8-15,18] registers as CSRs.
|
2018-09-22 22:17:50 +00:00 |
|
AArch64CallLowering.h
|
|
|
|
AArch64CleanupLocalDynamicTLSPass.cpp
|
|
|
|
AArch64CollectLOH.cpp
|
|
|
|
AArch64CompressJumpTables.cpp
|
AArch64: add a pass to compress jump-table entries when possible.
|
2018-10-24 20:19:09 +00:00 |
|
AArch64CondBrTuning.cpp
|
|
|
|
AArch64ConditionalCompares.cpp
|
|
|
|
AArch64ConditionOptimizer.cpp
|
|
|
|
AArch64DeadRegisterDefinitionsPass.cpp
|
|
|
|
AArch64ExpandPseudoInsts.cpp
|
|
|
|
AArch64FalkorHWPFFix.cpp
|
|
|
|
AArch64FastISel.cpp
|
Introduce control flow speculation tracking pass for AArch64
|
2018-12-18 08:50:02 +00:00 |
|
AArch64FrameLowering.cpp
|
[AArch64] - Return address signing dwarf support
|
2018-12-18 10:37:42 +00:00 |
|
AArch64FrameLowering.h
|
[ARM64] [Windows] Handle funclets
|
2018-11-09 23:33:30 +00:00 |
|
AArch64GenRegisterBankInfo.def
|
|
|
|
AArch64InstrAtomics.td
|
|
|
|
AArch64InstrFormats.td
|
[NFC][AArch64] Split out backend features
|
2018-12-06 15:39:17 +00:00 |
|
AArch64InstrInfo.cpp
|
Introduce control flow speculation tracking pass for AArch64
|
2018-12-18 08:50:02 +00:00 |
|
AArch64InstrInfo.h
|
[AArch64] Refactor the Exynos scheduling predicates
|
2018-12-10 17:17:26 +00:00 |
|
AArch64InstrInfo.td
|
[NFC][AArch64] Split out backend features
|
2018-12-06 15:39:17 +00:00 |
|
AArch64InstructionSelector.cpp
|
Introduce control flow speculation tracking pass for AArch64
|
2018-12-18 08:50:02 +00:00 |
|
AArch64ISelDAGToDAG.cpp
|
[AArch64][v8.5A] Add speculation restriction system registers
|
2018-09-27 14:05:46 +00:00 |
|
AArch64ISelLowering.cpp
|
Introduce control flow speculation tracking pass for AArch64
|
2018-12-18 08:50:02 +00:00 |
|
AArch64ISelLowering.h
|
[ARM64] [Windows] Handle funclets
|
2018-11-09 23:33:30 +00:00 |
|
AArch64LegalizerInfo.cpp
|
[GlobalISel] Restrict G_MERGE_VALUES capability and replace with new opcodes.
|
2018-12-10 18:44:58 +00:00 |
|
AArch64LegalizerInfo.h
|
[GISel]: Provide standard interface to observe changes in GISel passes
|
2018-12-05 20:14:52 +00:00 |
|
AArch64LoadStoreOptimizer.cpp
|
|
|
|
AArch64MachineFunctionInfo.h
|
[COFF, ARM64] Make sure to forward arguments from vararg to musttail vararg
|
2018-10-30 20:46:10 +00:00 |
|
AArch64MacroFusion.cpp
|
[PATCH] [NFC][AArch64] Fix refactoring of macro fusion
|
2018-10-16 17:41:45 +00:00 |
|
AArch64MacroFusion.h
|
|
|
|
AArch64MCInstLower.cpp
|
[ARM64] [Windows] Handle funclets
|
2018-11-09 23:33:30 +00:00 |
|
AArch64MCInstLower.h
|
|
|
|
AArch64PBQPRegAlloc.cpp
|
|
|
|
AArch64PBQPRegAlloc.h
|
|
|
|
AArch64PerfectShuffle.h
|
|
|
|
AArch64PfmCounters.td
|
[llvm-exegesis][NFC] Add a way to declare the default counter binding for unbound CPUs for a target.
|
2018-11-09 13:15:32 +00:00 |
|
AArch64PreLegalizerCombiner.cpp
|
[GISel]: Provide standard interface to observe changes in GISel passes
|
2018-12-05 20:14:52 +00:00 |
|
AArch64PromoteConstant.cpp
|
|
|
|
AArch64RedundantCopyElimination.cpp
|
|
|
|
AArch64RegisterBankInfo.cpp
|
|
|
|
AArch64RegisterBankInfo.h
|
|
|
|
AArch64RegisterBanks.td
|
|
|
|
AArch64RegisterInfo.cpp
|
Introduce control flow speculation tracking pass for AArch64
|
2018-12-18 08:50:02 +00:00 |
|
AArch64RegisterInfo.h
|
[ARM64] [Windows] Handle funclets
|
2018-11-09 23:33:30 +00:00 |
|
AArch64RegisterInfo.td
|
[AArch64][v8.5A] Restrict indirect tail calls to use x16/17 only when using BTI
|
2018-10-08 14:09:15 +00:00 |
|
AArch64SchedA53.td
|
|
|
|
AArch64SchedA57.td
|
|
|
|
AArch64SchedA57WriteRes.td
|
|
|
|
AArch64SchedCyclone.td
|
|
|
|
AArch64SchedExynosM1.td
|
[AArch64] Fix instructions order (NFC)
|
2018-12-18 23:19:55 +00:00 |
|
AArch64SchedExynosM3.td
|
[AArch64] Simplify the Exynos M3 pipeline model
|
2018-12-18 23:19:57 +00:00 |
|
AArch64SchedFalkor.td
|
|
|
|
AArch64SchedFalkorDetails.td
|
|
|
|
AArch64SchedKryo.td
|
|
|
|
AArch64SchedKryoDetails.td
|
|
|
|
AArch64SchedPredExynos.td
|
[AArch64] Simplify the scheduling predicates (NFC)
|
2018-12-14 20:04:58 +00:00 |
|
AArch64SchedPredicates.td
|
[AArch64] Simplify the scheduling predicates (NFC)
|
2018-12-14 20:04:58 +00:00 |
|
AArch64SchedThunderX2T99.td
|
|
|
|
AArch64SchedThunderX.td
|
|
|
|
AArch64Schedule.td
|
[AArch64] Refactor the scheduling predicates (3/3) (NFC)
|
2018-11-26 21:47:46 +00:00 |
|
AArch64SelectionDAGInfo.cpp
|
|
|
|
AArch64SelectionDAGInfo.h
|
|
|
|
AArch64SIMDInstrOpt.cpp
|
|
|
|
AArch64SpeculationHardening.cpp
|
Introduce control flow speculation tracking pass for AArch64
|
2018-12-18 08:50:02 +00:00 |
|
AArch64StorePairSuppress.cpp
|
[CodeGen][NFC] Make TII::getMemOpBaseImmOfs return a base operand
|
2018-11-28 12:00:20 +00:00 |
|
AArch64Subtarget.cpp
|
[AArch64] Refactor the scheduling predicates (1/3) (NFC)
|
2018-11-26 21:47:28 +00:00 |
|
AArch64Subtarget.h
|
[NFC][AArch64] Split out backend features
|
2018-12-06 15:39:17 +00:00 |
|
AArch64SVEInstrInfo.td
|
|
|
|
AArch64SystemOperands.td
|
[NFC][AArch64] Split out backend features
|
2018-12-06 15:39:17 +00:00 |
|
AArch64TargetMachine.cpp
|
Introduce control flow speculation tracking pass for AArch64
|
2018-12-18 08:50:02 +00:00 |
|
AArch64TargetMachine.h
|
|
|
|
AArch64TargetObjectFile.cpp
|
|
|
|
AArch64TargetObjectFile.h
|
|
|
|
AArch64TargetTransformInfo.cpp
|
[LV] Support vectorization of interleave-groups that require an epilog under
|
2018-10-31 09:57:56 +00:00 |
|
AArch64TargetTransformInfo.h
|
[LV] Support vectorization of interleave-groups that require an epilog under
|
2018-10-31 09:57:56 +00:00 |
|
CMakeLists.txt
|
Introduce control flow speculation tracking pass for AArch64
|
2018-12-18 08:50:02 +00:00 |
|
LLVMBuild.txt
|
|
|
|
SVEInstrFormats.td
|
Remove extra whitespace. NFC. (test commit)
|
2018-09-28 08:45:28 +00:00 |
