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532a78148a
Don't expand SDIV with an immediate that is a power of 2 if we optimise for minimum code size. For example: sdiv %1, i32 4 gets expanded to a sequence of 3 instructions, but this is suboptimal for minimum code size so instead we just generate a MOV and a SDIV if integer division is supported. Differential Revision: https://reviews.llvm.org/D54546 llvm-svn: 347965
80 lines
1.9 KiB
LLVM
80 lines
1.9 KiB
LLVM
; RUN: llc -mtriple=armv7a -mattr=+hwdiv-arm %s -o - | FileCheck %s --check-prefixes=CHECK,DIV
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; RUN: llc -mtriple=armv7a -mattr=-hwdiv-arm %s -o - | FileCheck %s --check-prefixes=CHECK,NODIV
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; Check SREM
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define dso_local i32 @test_rem(i32 %F) local_unnamed_addr #0 {
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; CHECK-LABEL: test_rem
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; CHECK: asr r1, r0, #31
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; CHECK-NEXT: add r1, r0, r1, lsr #30
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; CHECK-NEXT: bic r1, r1, #3
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; CHECK-NEXT: sub r0, r0, r1
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entry:
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%div = srem i32 %F, 4
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ret i32 %div
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}
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; Try an i16 sdiv, with a small immediate.
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define dso_local signext i16 @f0(i16 signext %F) local_unnamed_addr #0 {
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; CHECK-LABEL: f0
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; DIV: mov r1, #2
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; DIV-NEXT: sdiv r0, r0, r1
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; DIV-NEXT: sxth r0, r0
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; DIV-NEXT: bx lr
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; NODIV: uxth r1, r0
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; NODIV-NEXT: add r0, r0, r1, lsr #15
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; NODIV-NEXT: sxth r0, r0
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; NODIV-NEXT: asr r0, r0, #1
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; NODIV-NEXT: bx lr
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entry:
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%0 = sdiv i16 %F, 2
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ret i16 %0
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}
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; Try an i32 sdiv, with a small immediate.
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define dso_local i32 @f1(i32 %F) local_unnamed_addr #0 {
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; CHECK-LABEL: f1
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; DIV: mov r1, #4
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; DIV-NEXT: sdiv r0, r0, r1
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; DIV-NEXT: bx lr
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; NODIV: asr r1, r0, #31
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; NODIV-NEXT: add r0, r0, r1, lsr #30
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; NODIV-NEXT: asr r0, r0, #2
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; NODIV-NEXT: bx lr
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entry:
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%div = sdiv i32 %F, 4
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ret i32 %div
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}
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; Try a large power of 2 immediate, which should also be materialised with 1
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; move immediate instruction.
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define dso_local i32 @f2(i32 %F) local_unnamed_addr #0 {
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; CHECK-LABEL: f2
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; DIV: mov r1, #131072
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; DIV-NEXT: sdiv r0, r0, r1
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; DIV-NEXT: bx lr
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entry:
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%div = sdiv i32 %F, 131072
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ret i32 %div
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}
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; MinSize not set, so should expand to the faster but longer sequence.
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define dso_local i32 @f3(i32 %F) {
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; CHECK-LABEL: f3
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; CHECK: asr r1, r0, #31
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; CHECK-NEXT: add r0, r0, r1, lsr #30
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; CHECK-NEXT: asr r0, r0, #2
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; CHECK-NEXT: bx lr
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entry:
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%div = sdiv i32 %F, 4
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ret i32 %div
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}
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attributes #0 = { minsize norecurse nounwind optsize readnone }
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