RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-26 14:33:02 +02:00
Code Issues Projects Releases Wiki Activity
5395a754c3
llvm-mirror/lib/Target/AArch64
History
Duncan P. N. Exon Smith c536535bb8 AArch64: Stop using MachineInstr::getNextNode() 
Stop using `getNextNode()` to get an insertion point (at least, in this
one place).  Instead, use iterator logic directly.

The `getNextNode()` interface isn't actually supposed to work for
creating iterators; it's supposed to return `nullptr` (not a real
iterator) if this is the last node.  It's currently broken and will
"happen" to work, but if we ever fix the function, we'll get some
strange failures in places like this.

llvm-svn: 249764
2015-10-08 22:43:26 +00:00
..
AsmParser [MC layer][AArch64] llvm-mc accepts 4-bit immediate values for 2015-10-05 13:42:31 +00:00
Disassembler [MC layer][AArch64] llvm-mc accepts 4-bit immediate values for 2015-10-05 13:42:31 +00:00
InstPrinter
MCTargetDesc Fix pr24486. 2015-10-05 12:07:05 +00:00
TargetInfo
Utils [AArch64][v8.1a] The "pan" sysreg isn't MSR-specific. NFCI. 2015-08-04 00:55:11 +00:00
AArch64.h
AArch64.td [AArch64] Lower READCYCLECOUNTER using MRS PMCCTNR_EL0. 2015-09-01 16:23:45 +00:00
AArch64A53Fix835769.cpp Fix some comment typos. 2015-08-08 18:27:36 +00:00
AArch64A57FPLoadBalancing.cpp MachineRegisterInfo: Remove UsedPhysReg infrastructure 2015-07-14 17:52:07 +00:00
AArch64AddressTypePromotion.cpp [AArch64] Make the naming of the Address Type Promotion pass consistent. 2015-08-05 15:32:23 +00:00
AArch64AdvSIMDScalarPass.cpp [AArch64] Register (existing) AArch64AdvSIMDScalar pass with LLVM pass manager. 2015-08-05 15:18:58 +00:00
AArch64AsmPrinter.cpp
AArch64BranchRelaxation.cpp [AArch64] Register (existing) AArch64BranchRelaxation pass with LLVM pass manager. 2015-08-05 16:12:10 +00:00
AArch64CallingConvention.h Move most user of TargetMachine::getDataLayout to the Module one 2015-07-16 06:11:10 +00:00
AArch64CallingConvention.td Move most user of TargetMachine::getDataLayout to the Module one 2015-07-16 06:11:10 +00:00
AArch64CleanupLocalDynamicTLSPass.cpp AArch64: Stop using MachineInstr::getNextNode() 2015-10-08 22:43:26 +00:00
AArch64CollectLOH.cpp [AArch64][CollectLOH] Remove an invalid assertion and add a test case exposing it. 2015-08-31 19:02:00 +00:00
AArch64ConditionalCompares.cpp wrap OptSize and MinSize attributes for easier and consistent access (NFCI) 2015-08-04 15:49:57 +00:00
AArch64ConditionOptimizer.cpp AArch64: use AddressingModes.h accessors for compare shifts 2015-07-29 16:39:56 +00:00
AArch64DeadRegisterDefinitionsPass.cpp [AArch64] Register AArch64DeadRegisterDefinition pass with LLVM pass manager. 2015-08-05 17:35:34 +00:00
AArch64ExpandPseudoInsts.cpp [AArch64] Register (existing) AArch64ExpandPseudo pass with LLVM pass manager. 2015-08-05 14:22:53 +00:00
AArch64FastISel.cpp FastISel: Factor out common code; NFC intended 2015-08-26 01:38:00 +00:00
AArch64FrameLowering.cpp Remove redundant TargetFrameLowering::getFrameIndexOffset virtual 2015-08-15 02:32:35 +00:00
AArch64FrameLowering.h Remove redundant TargetFrameLowering::getFrameIndexOffset virtual 2015-08-15 02:32:35 +00:00
AArch64InstrAtomics.td
AArch64InstrFormats.td [MC layer][AArch64] llvm-mc accepts 4-bit immediate values for 2015-10-05 13:42:31 +00:00
AArch64InstrInfo.cpp [Machine Combiner] Refactor machine reassociation code to be target-independent. 2015-09-21 15:09:11 +00:00
AArch64InstrInfo.h MIR Serialization: Serialize the operand's bit mask target flags. 2015-08-18 22:52:15 +00:00
AArch64InstrInfo.td [MC layer][AArch64] llvm-mc accepts 4-bit immediate values for 2015-10-05 13:42:31 +00:00
AArch64ISelDAGToDAG.cpp [MC layer][AArch64] llvm-mc accepts 4-bit immediate values for 2015-10-05 13:42:31 +00:00
AArch64ISelLowering.cpp [AArch64] Fold a floating-point divide by power of two into fp conversion. 2015-10-07 17:51:37 +00:00
AArch64ISelLowering.h [AArch64] Emit clrex in the expanded cmpxchg fail block. 2015-09-22 17:21:44 +00:00
AArch64LoadStoreOptimizer.cpp [AArch64] Deprecate a command-line option used for testing. 2015-10-01 18:17:12 +00:00
AArch64MachineFunctionInfo.h Fix typo "fuction" noticed in comments in AssumptionCache.h, and also all the other files that have the same typo. All comments, no functionality change! (Merely a "fuctionality" change.) 2015-07-29 22:32:47 +00:00
AArch64MCInstLower.cpp Convert some AArch64 code to foreach loops. NFC. 2015-08-03 19:04:32 +00:00
AArch64MCInstLower.h
AArch64PBQPRegAlloc.cpp
AArch64PBQPRegAlloc.h
AArch64PerfectShuffle.h
AArch64PromoteConstant.cpp Rename inst_range() to instructions() for consistency. NFC 2015-08-06 19:10:45 +00:00
AArch64RegisterInfo.cpp [AArch64] Remove check for Darwin that was needed to decide if x18 should 2015-07-27 19:18:47 +00:00
AArch64RegisterInfo.h Targets: commonize some stack realignment code 2015-07-20 22:51:32 +00:00
AArch64RegisterInfo.td
AArch64SchedA53.td
AArch64SchedA57.td
AArch64SchedA57WriteRes.td
AArch64SchedCyclone.td
AArch64Schedule.td
AArch64SelectionDAGInfo.cpp Remove getDataLayout() from TargetSelectionDAGInfo (had no users) 2015-07-09 02:10:08 +00:00
AArch64SelectionDAGInfo.h Remove getDataLayout() from TargetSelectionDAGInfo (had no users) 2015-07-09 02:10:08 +00:00
AArch64StorePairSuppress.cpp
AArch64Subtarget.cpp Revert r247692: Replace Triple with a new TargetTuple in MCTargetDesc/* and related. NFC. 2015-09-15 16:17:27 +00:00
AArch64Subtarget.h Add Triple::isAndroid(). 2015-10-08 21:21:24 +00:00
AArch64TargetMachine.cpp constify the Function parameter to the TTI creation callback and 2015-09-16 23:38:13 +00:00
AArch64TargetMachine.h
AArch64TargetObjectFile.cpp
AArch64TargetObjectFile.h
AArch64TargetTransformInfo.cpp [CostModel][AArch64] Remove amortization factor for some of the vector select instructions 2015-09-09 15:35:02 +00:00
AArch64TargetTransformInfo.h constify the Function parameter to the TTI creation callback and 2015-09-16 23:38:13 +00:00
CMakeLists.txt
LLVMBuild.txt
Makefile