| .. |
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AsmParser
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[APFloat] Add recoverable string parsing errors to APFloat
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2020-01-06 10:09:01 +02:00 |
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Disassembler
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[AMDGPU][MC] Remove duplicate code introduced in r359316.
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2019-12-04 11:44:12 +00:00 |
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MCTargetDesc
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[MC] Add parameter Address to MCInstrPrinter::printInstruction
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2020-01-06 20:44:14 -08:00 |
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TargetInfo
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[cmake] Explicitly mark libraries defined in lib/ as "Component Libraries"
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2019-11-21 10:48:08 -08:00 |
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Utils
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[IR] Split out target specific intrinsic enums into separate headers
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2019-12-11 18:02:14 -08:00 |
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AMDGPU.h
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[IR] Split out target specific intrinsic enums into separate headers
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2019-12-11 18:02:14 -08:00 |
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AMDGPU.td
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[AMDGPU] w/a for gfx908 mfma SrcC literal HW bug
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2019-08-23 22:09:58 +00:00 |
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AMDGPUAliasAnalysis.cpp
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AMDGPU: Improve alias analysis for GDS
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2019-07-17 11:22:19 +00:00 |
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AMDGPUAliasAnalysis.h
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AMDGPUAlwaysInlinePass.cpp
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AMDGPU: Simplify getAddressSpace calls
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2019-10-31 07:51:38 -07:00 |
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AMDGPUAnnotateKernelFeatures.cpp
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Use llvm::StringLiteral instead of StringRef in few places
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2019-09-20 14:31:42 +00:00 |
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AMDGPUAnnotateUniformValues.cpp
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Sink all InitializePasses.h includes
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2019-11-13 16:34:37 -08:00 |
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AMDGPUArgumentUsageInfo.cpp
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AMDGPUArgumentUsageInfo.h
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AMDGPU: Fix Register copypaste error
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2019-09-05 23:07:10 +00:00 |
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AMDGPUAsmPrinter.cpp
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[NFC] Fix trivial typos in comments
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2020-01-06 10:50:26 +00:00 |
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AMDGPUAsmPrinter.h
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[AMDGPU] separate accounting for agprs
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2019-10-02 00:26:58 +00:00 |
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AMDGPUAtomicOptimizer.cpp
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Sink all InitializePasses.h includes
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2019-11-13 16:34:37 -08:00 |
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AMDGPUCallingConv.td
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[AMDGPU] Adjust number of SGPRs available in Calling Convention
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2019-08-28 15:00:45 +00:00 |
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AMDGPUCallLowering.cpp
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[AMDGPU] Don't create MachinePointerInfos with an UndefValue pointer
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2019-12-23 15:58:19 +00:00 |
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AMDGPUCallLowering.h
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AMDGPU/GlobalISel: Rename MIRBuilder to B. NFC
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2019-09-09 23:06:13 +00:00 |
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AMDGPUCodeGenPrepare.cpp
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AMDGPU: Refactor treatment of denormal mode
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2019-11-19 19:55:43 +05:30 |
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AMDGPUFeatures.td
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AMDGPUFixFunctionBitcasts.cpp
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AMDGPUFrameLowering.cpp
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Use Align for TFL::TransientStackAlignment
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2019-10-21 08:31:25 +00:00 |
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AMDGPUFrameLowering.h
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Use Align for TFL::TransientStackAlignment
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2019-10-21 08:31:25 +00:00 |
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AMDGPUGenRegisterBankInfo.def
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AMDGPU/GlobalISel: Replace handling of boolean values
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2020-01-06 18:26:42 -05:00 |
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AMDGPUGISel.td
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AMDGPU: Remove VOP3Mods0Clamp0OMod
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2020-01-07 15:10:08 -05:00 |
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AMDGPUGlobalISelUtils.cpp
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AMDGPU/GlobalISel: Add new utils file
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2020-01-03 15:25:50 -05:00 |
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AMDGPUGlobalISelUtils.h
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AMDGPU/GlobalISel: Add new utils file
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2020-01-03 15:25:50 -05:00 |
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AMDGPUHSAMetadataStreamer.cpp
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[AMDGPU] add support for hostcall buffer pointer as hidden kernel argument
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2019-11-20 15:53:55 +05:30 |
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AMDGPUHSAMetadataStreamer.h
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[llvm] Migrate llvm::make_unique to std::make_unique
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2019-08-15 15:54:37 +00:00 |
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AMDGPUInline.cpp
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[AMDGPU] Tune inlining parameters for AMDGPU target (part 2)
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2019-11-19 16:33:16 +03:00 |
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AMDGPUInstrInfo.cpp
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AMDGPUInstrInfo.h
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AMDGPUInstrInfo.td
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AMDGPU/GlobalISel: Select mul24 intrinsics
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2019-12-30 14:24:25 -05:00 |
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AMDGPUInstructions.td
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AMDGPU: Annotate EXTRACT_SUBREGs with source register classes
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2020-01-07 21:56:16 -05:00 |
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AMDGPUInstructionSelector.cpp
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AMDGPU: Remove VOP3Mods0Clamp0OMod
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2020-01-07 15:10:08 -05:00 |
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AMDGPUInstructionSelector.h
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AMDGPU: Remove VOP3Mods0Clamp0OMod
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2020-01-07 15:10:08 -05:00 |
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AMDGPUISelDAGToDAG.cpp
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AMDGPU: Remove VOP3Mods0Clamp0OMod
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2020-01-07 15:10:08 -05:00 |
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AMDGPUISelLowering.cpp
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AMDGPU: Fix not using v_cvt_f16_[iu]16
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2020-01-07 15:10:07 -05:00 |
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AMDGPUISelLowering.h
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AMDGPU: Improve llvm.round.f64 lowering for CI+
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2019-12-30 09:55:46 -05:00 |
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AMDGPULegalizerInfo.cpp
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AMDGPU/GlobalISel: Fix scalar G_SELECT for arbitrary pointers
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2020-01-07 16:36:31 -05:00 |
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AMDGPULegalizerInfo.h
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AMDGPU/GlobalISel: Legalize FDIV64
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2019-11-19 21:02:27 -08:00 |
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AMDGPULibCalls.cpp
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Sink all InitializePasses.h includes
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2019-11-13 16:34:37 -08:00 |
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AMDGPULibFunc.cpp
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[AMDGPU] Downgrade from StringLiteral to const char* in an attempt to make GCC 5 happy
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2019-08-25 12:47:31 +00:00 |
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AMDGPULibFunc.h
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AMDGPULowerIntrinsics.cpp
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AMDGPULowerKernelArguments.cpp
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[Alignment] Migrate Attribute::getWith(Stack)Alignment
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2019-10-15 12:56:24 +00:00 |
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AMDGPULowerKernelAttributes.cpp
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AMDGPUMachineCFGStructurizer.cpp
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[AMDGPU] Fixes -Wrange-loop-analysis warnings
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2019-12-22 19:39:28 +01:00 |
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AMDGPUMachineFunction.cpp
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AMDGPU: Refactor treatment of denormal mode
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2019-11-19 19:55:43 +05:30 |
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AMDGPUMachineFunction.h
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AMDGPU: Refactor treatment of denormal mode
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2019-11-19 19:55:43 +05:30 |
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AMDGPUMachineModuleInfo.cpp
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AMDGPUMachineModuleInfo.h
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AMDGPUMacroFusion.cpp
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AMDGPUMacroFusion.h
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AMDGPUMCInstLower.cpp
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[MC] Add parameter Address to MCInstPrinter::printInst
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2020-01-06 20:42:22 -08:00 |
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AMDGPUOpenCLEnqueuedBlockLowering.cpp
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Fix parameter name comments using clang-tidy. NFC.
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2019-07-16 04:46:31 +00:00 |
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AMDGPUPerfHintAnalysis.cpp
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AMDGPUPerfHintAnalysis.h
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AMDGPUPrintfRuntimeBinding.cpp
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[AMDGPU] add support for hostcall buffer pointer as hidden kernel argument
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2019-11-20 15:53:55 +05:30 |
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AMDGPUPromoteAlloca.cpp
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Resubmit "[Alignment][NFC] Deprecate CreateMemCpy/CreateMemMove"
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2019-12-17 10:07:46 +01:00 |
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AMDGPUPropagateAttributes.cpp
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AMDGPU: Move DEBUG_TYPE definition below includes
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2019-07-08 18:48:39 +00:00 |
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AMDGPUPTNote.h
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AMDGPURegisterBankInfo.cpp
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AMDGPU/GlobalISel: Fix unused variable warning in release
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2020-01-06 22:31:33 -05:00 |
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AMDGPURegisterBankInfo.h
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AMDGPU/GlobalISel: Replace handling of boolean values
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2020-01-06 18:26:42 -05:00 |
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AMDGPURegisterBanks.td
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AMDGPU/GlobalISel: Replace handling of boolean values
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2020-01-06 18:26:42 -05:00 |
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AMDGPURegisterInfo.cpp
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AMDGPU/GlobalISel: Handle more G_INSERT cases
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2019-10-07 19:16:26 +00:00 |
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AMDGPURegisterInfo.h
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AMDGPU/GlobalISel: Handle more G_INSERT cases
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2019-10-07 19:16:26 +00:00 |
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AMDGPURegisterInfo.td
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[AMDGPU] gfx908 register file changes
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2019-07-09 19:41:51 +00:00 |
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AMDGPURewriteOutArguments.cpp
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Sink all InitializePasses.h includes
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2019-11-13 16:34:37 -08:00 |
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AMDGPUSearchableTables.td
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[AMDGPU][SILoadStoreOptimizer] Merge TBUFFER loads/stores
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2019-11-20 22:59:30 +01:00 |
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AMDGPUSubtarget.cpp
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AMDGPU: Switch backend default max workgroup size to 1024
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2019-11-13 07:11:02 +05:30 |
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AMDGPUSubtarget.h
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AMDGPU: Refactor treatment of denormal mode
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2019-11-19 19:55:43 +05:30 |
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AMDGPUTargetMachine.cpp
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Sink all InitializePasses.h includes
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2019-11-13 16:34:37 -08:00 |
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AMDGPUTargetMachine.h
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AMDGPUTargetObjectFile.cpp
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AMDGPUTargetObjectFile.h
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AMDGPUTargetTransformInfo.cpp
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[AMDGPU] Implemented fma cost analysis
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2019-12-18 23:54:20 -08:00 |
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AMDGPUTargetTransformInfo.h
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[AMDGPU] Implemented fma cost analysis
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2019-12-18 23:54:20 -08:00 |
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AMDGPUUnifyDivergentExitNodes.cpp
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Sink all InitializePasses.h includes
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2019-11-13 16:34:37 -08:00 |
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AMDGPUUnifyMetadata.cpp
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[AMDGPU] Fixes -Wrange-loop-analysis warnings
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2019-12-22 19:39:28 +01:00 |
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AMDILCFGStructurizer.cpp
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Sink all InitializePasses.h includes
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2019-11-13 16:34:37 -08:00 |
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AMDKernelCodeT.h
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BUFInstructions.td
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[AMDGPU] drop getIsFP td helper
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2019-10-17 21:46:56 +00:00 |
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CaymanInstructions.td
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CMakeLists.txt
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AMDGPU/GlobalISel: Add new utils file
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2020-01-03 15:25:50 -05:00 |
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DSInstructions.td
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[AMDGPU] Add missing flags to DS_Real
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2019-11-05 14:24:48 -08:00 |
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EvergreenInstructions.td
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AMDGPU: Start redefining atomic PatFrags
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2019-08-01 03:25:52 +00:00 |
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FLATInstructions.td
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AMDGPU/GlobalISel: Select some 128-bit load/stores
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2019-12-27 08:49:43 -05:00 |
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GCNDPPCombine.cpp
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[AMDGPU][DPP] Corrected DPP combiner
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2019-11-20 15:56:45 +03:00 |
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GCNHazardRecognizer.cpp
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Make more use of MachineInstr::mayLoadOrStore.
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2019-12-19 11:51:52 +00:00 |
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GCNHazardRecognizer.h
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[AMDGPU] gfx908 hazard recognizer
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2019-07-11 21:30:34 +00:00 |
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GCNILPSched.cpp
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Prune a LegacyDivergenceAnalysis and MachineLoopInfo include each
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2019-10-19 01:31:09 +00:00 |
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GCNIterativeScheduler.cpp
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[llvm] Migrate llvm::make_unique to std::make_unique
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2019-08-15 15:54:37 +00:00 |
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GCNIterativeScheduler.h
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GCNMinRegStrategy.cpp
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GCNNSAReassign.cpp
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Sink all InitializePasses.h includes
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2019-11-13 16:34:37 -08:00 |
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GCNProcessors.td
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[AMDGPU] gfx908 target
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2019-07-09 18:10:06 +00:00 |
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GCNRegBankReassign.cpp
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Sink all InitializePasses.h includes
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2019-11-13 16:34:37 -08:00 |
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GCNRegPressure.cpp
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Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM
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2019-08-15 19:22:08 +00:00 |
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GCNRegPressure.h
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Finish moving TargetRegisterInfo::isVirtualRegister() and friends to llvm::Register as started by r367614. NFC
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2019-08-01 23:27:28 +00:00 |
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GCNSchedStrategy.cpp
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[AMDGPU] Revert scheduling to reduce spilling
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2020-01-03 15:20:21 -08:00 |
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GCNSchedStrategy.h
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AMDGPU: Avoid constructing new std::vector in initCandidate
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2019-09-05 22:44:06 +00:00 |
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LLVMBuild.txt
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MIMGInstructions.td
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[AMDGPU] deduplicate tablegen predicates
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2019-11-04 12:19:17 -08:00 |
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R600.td
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R600AsmPrinter.cpp
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[NFC] Fix trivial typos in comments
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2020-01-06 10:50:26 +00:00 |
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R600AsmPrinter.h
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R600ClauseMergePass.cpp
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R600ControlFlowFinalizer.cpp
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Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM
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2019-08-15 19:22:08 +00:00 |
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R600Defines.h
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R600EmitClauseMarkers.cpp
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R600ExpandSpecialInstrs.cpp
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Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM
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2019-08-15 19:22:08 +00:00 |
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R600FrameLowering.cpp
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R600FrameLowering.h
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Use Align for TFL::TransientStackAlignment
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2019-10-21 08:31:25 +00:00 |
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R600InstrFormats.td
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R600InstrInfo.cpp
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Fix "use of uninitialized variable" static analyzer warning. NFCI.
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2020-01-07 12:06:54 +00:00 |
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R600InstrInfo.h
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Use MCRegister in copyPhysReg
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2019-11-11 14:42:33 +05:30 |
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R600Instructions.td
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AMDGPU: Redefine load PatFrags
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2019-07-16 17:38:50 +00:00 |
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R600ISelLowering.cpp
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[TargetLowering][AMDGPU] Make scalarizeVectorLoad return a pair of SDValues instead of creating a MERGE_VALUES node. NFCI
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2019-12-30 19:36:04 -08:00 |
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R600ISelLowering.h
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R600MachineFunctionInfo.cpp
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R600MachineFunctionInfo.h
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R600MachineScheduler.cpp
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Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM
|
2019-08-15 19:22:08 +00:00 |
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R600MachineScheduler.h
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R600OpenCLImageTypeLoweringPass.cpp
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R600OptimizeVectorRegisters.cpp
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Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM
|
2019-08-15 19:22:08 +00:00 |
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R600Packetizer.cpp
|
Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM
|
2019-08-15 19:22:08 +00:00 |
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R600Processors.td
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R600RegisterInfo.cpp
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Finish moving TargetRegisterInfo::isVirtualRegister() and friends to llvm::Register as started by r367614. NFC
|
2019-08-01 23:27:28 +00:00 |
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R600RegisterInfo.h
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R600RegisterInfo.td
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R600Schedule.td
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R700Instructions.td
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SIAddIMGInit.cpp
|
Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM
|
2019-08-15 19:22:08 +00:00 |
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SIAnnotateControlFlow.cpp
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Sink all InitializePasses.h includes
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2019-11-13 16:34:37 -08:00 |
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SIDefines.h
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[AMDGPU] Added MI bit IsDOT
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2019-09-17 17:56:13 +00:00 |
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SIFixSGPRCopies.cpp
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Sink all InitializePasses.h includes
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2019-11-13 16:34:37 -08:00 |
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SIFixupVectorISel.cpp
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Finish moving TargetRegisterInfo::isVirtualRegister() and friends to llvm::Register as started by r367614. NFC
|
2019-08-01 23:27:28 +00:00 |
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SIFixVGPRCopies.cpp
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SIFoldOperands.cpp
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[amdgpu] Remove unused header. NFC.
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2020-01-08 11:32:09 -05:00 |
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SIFormMemoryClauses.cpp
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Sink all InitializePasses.h includes
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2019-11-13 16:34:37 -08:00 |
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SIFrameLowering.cpp
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[AMDGPU] Don't create MachinePointerInfos with an UndefValue pointer
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2019-12-23 15:58:19 +00:00 |
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SIFrameLowering.h
|
Use Align for TFL::TransientStackAlignment
|
2019-10-21 08:31:25 +00:00 |
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SIInsertSkips.cpp
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SIInsertWaitcnts.cpp
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[AMDGPU] need to insert wait between the scalar load and vector store to the same address to avoid WAR conflict.
|
2020-01-04 18:23:14 +03:00 |
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SIInstrFormats.td
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[AMDGPU] Added MI bit IsDOT
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2019-09-17 17:56:13 +00:00 |
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SIInstrInfo.cpp
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TII: Fix using Register for a subregister index argument
|
2019-12-27 16:53:29 -05:00 |
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SIInstrInfo.h
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AMDGPU: Use ImmLeaf for inline immediate predicates
|
2020-01-06 17:21:51 -05:00 |
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SIInstrInfo.td
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AMDGPU: Remove VOP3Mods0Clamp0OMod
|
2020-01-07 15:10:08 -05:00 |
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SIInstructions.td
|
AMDGPU/GlobalISel: Fix readfirstlane pattern import
|
2020-01-07 11:07:08 -05:00 |
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SIISelLowering.cpp
|
AMDGPU: Fix not using v_cvt_f16_[iu]16
|
2020-01-07 15:10:07 -05:00 |
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SIISelLowering.h
|
AMDGPU: Refactor treatment of denormal mode
|
2019-11-19 19:55:43 +05:30 |
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SILoadStoreOptimizer.cpp
|
AMDGPU/SILoadStoreOptimillzer: Refactor CombineInfo struct
|
2019-12-17 13:43:10 -08:00 |
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SILowerControlFlow.cpp
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[AMDGPU] Fix emitIfBreak CF lowering: use temp reg to make register coalescer life easier.
|
2019-11-26 18:59:37 +03:00 |
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SILowerI1Copies.cpp
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Sink all InitializePasses.h includes
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2019-11-13 16:34:37 -08:00 |
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SILowerSGPRSpills.cpp
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Sink all InitializePasses.h includes
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2019-11-13 16:34:37 -08:00 |
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SIMachineFunctionInfo.cpp
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AMDGPU: Refactor treatment of denormal mode
|
2019-11-19 19:55:43 +05:30 |
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SIMachineFunctionInfo.h
|
AMDGPU: Refactor treatment of denormal mode
|
2019-11-19 19:55:43 +05:30 |
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SIMachineScheduler.cpp
|
AMDGPU/SI: make ~SIScheduleBlockCreator trivial
|
2019-11-11 21:51:59 -08:00 |
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SIMachineScheduler.h
|
AMDGPU/SI: make ~SIScheduleBlockCreator trivial
|
2019-11-11 21:51:59 -08:00 |
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SIMemoryLegalizer.cpp
|
[llvm] Migrate llvm::make_unique to std::make_unique
|
2019-08-15 15:54:37 +00:00 |
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SIModeRegister.cpp
|
[llvm] Migrate llvm::make_unique to std::make_unique
|
2019-08-15 15:54:37 +00:00 |
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SIOptimizeExecMasking.cpp
|
AMDGPU: Use Register
|
2019-12-27 16:53:21 -05:00 |
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SIOptimizeExecMaskingPreRA.cpp
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Sink all InitializePasses.h includes
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2019-11-13 16:34:37 -08:00 |
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SIPeepholeSDWA.cpp
|
AMDGPU: Fixed indeterminate map iteration in SIPeepholeSDWA
|
2019-12-02 12:08:49 +00:00 |
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SIPreAllocateWWMRegs.cpp
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Sink all InitializePasses.h includes
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2019-11-13 16:34:37 -08:00 |
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SIProgramInfo.h
|
[AMDGPU] separate accounting for agprs
|
2019-10-02 00:26:58 +00:00 |
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SIRegisterInfo.cpp
|
AMDGPU/GlobalISel: Replace handling of boolean values
|
2020-01-06 18:26:42 -05:00 |
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SIRegisterInfo.h
|
AMDGPU/GlobalISel: Add AGPR bank and RegBankSelect mfma intrinsics
|
2019-12-01 22:15:48 -08:00 |
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SIRegisterInfo.td
|
AMDGPU: Make VReg_1 only include 1 artificial register
|
2019-10-28 20:51:51 -07:00 |
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SISchedule.td
|
[AMDGPU] gfx908 scheduling
|
2019-07-11 21:25:00 +00:00 |
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SIShrinkInstructions.cpp
|
AMDGPU: Don't fold S_NOPs with implicit operands
|
2019-10-30 14:40:56 -07:00 |
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SIWholeQuadMode.cpp
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Sink all InitializePasses.h includes
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2019-11-13 16:34:37 -08:00 |
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SMInstructions.td
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[AMDGPU] deduplicate tablegen predicates
|
2019-11-04 12:19:17 -08:00 |
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SOPInstructions.td
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AMDGPU/GlobalISel: Fix import of s_abs_i32 pattern
|
2020-01-07 10:32:07 -05:00 |
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VIInstrFormats.td
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VIInstructions.td
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VOP1Instructions.td
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AMDGPU/GlobalISel: Fix readfirstlane pattern import
|
2020-01-07 11:07:08 -05:00 |
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VOP2Instructions.td
|
AMDGPU: Apply i16 add->sub pattern with zext to i32
|
2020-01-07 16:36:31 -05:00 |
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VOP3Instructions.td
|
AMDGPU: Select llvm.amdgcn.interp.p2.f16 directly
|
2020-01-06 20:34:21 -05:00 |
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VOP3PInstructions.td
|
[AMDGPU] deduplicate tablegen predicates
|
2019-11-04 12:19:17 -08:00 |
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VOPCInstructions.td
|
AMDGPU: Remove VOP3Mods0Clamp0OMod
|
2020-01-07 15:10:08 -05:00 |
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VOPInstructions.td
|
[AMDGPU] copy OtherPredicates from pseudo to VOP3_Real
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2019-09-26 21:06:17 +00:00 |
