1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-22 20:43:44 +02:00
llvm-mirror/test/CodeGen/AMDGPU
Matt Arsenault a8560d8853 AMDGPU: Fix violating constant bus restriction
You can't use madmk/madmk if it already uses an SGPR input.

llvm-svn: 313298
2017-09-14 20:54:29 +00:00
..
GlobalISel AMDGPU: Remove -mcpu=SI 2017-08-07 18:30:35 +00:00
32-bit-local-address-space.ll
add_i64.ll [AMDGPU] Switch scalarize global loads ON by default 2017-07-04 17:32:00 +00:00
add_i128.ll [AMDGPU] Switch scalarize global loads ON by default 2017-07-04 17:32:00 +00:00
add-debug.ll
add.i16.ll Allow target to decide when to cluster loads/stores in misched 2017-09-13 22:20:47 +00:00
add.ll [AMDGPU] Switch scalarize global loads ON by default 2017-07-04 17:32:00 +00:00
add.v2i16.ll AMDGPU: Start selecting global instructions 2017-07-29 01:03:53 +00:00
addrspacecast-captured.ll
addrspacecast-constantexpr.ll
addrspacecast.ll AMDGPU: Cleanup subtarget features 2017-08-07 14:58:04 +00:00
alignbit-pat.ll [AMDGPU] Switch scalarize global loads ON by default 2017-07-04 17:32:00 +00:00
always-uniform.ll DivergencyAnalysis patch for review 2017-06-15 19:33:10 +00:00
amdgcn.bitcast.ll
amdgcn.private-memory.ll
amdgpu-alias-analysis.ll
amdgpu-codegenprepare-fdiv.ll [AMDGPU] Always use rcp + mul with fast math 2017-07-06 20:34:21 +00:00
amdgpu-codegenprepare-i16-to-i32.ll
amdgpu-shader-calling-convention.ll
amdgpu.private-memory.ll
amdgpu.work-item-intrinsics.deprecated.ll
and-gcn.ll [AMDGPU] Switch scalarize global loads ON by default 2017-07-04 17:32:00 +00:00
and.ll [AMDGPU] Switch scalarize global loads ON by default 2017-07-04 17:32:00 +00:00
annotate-kernel-features-hsa-call.ll AMDGPU: Annotate implicitarg.ptr usage 2017-07-28 15:52:08 +00:00
annotate-kernel-features-hsa.ll AMDGPU: Detect kernarg segment pointer 2017-07-14 00:11:13 +00:00
annotate-kernel-features.ll
anonymous-gv.ll
any_extend_vector_inreg.ll [AMDGPU] Switch scalarize global loads ON by default 2017-07-04 17:32:00 +00:00
anyext.ll
array-ptr-calc-i32.ll AMDGPU: Cleanup subtarget features 2017-08-07 14:58:04 +00:00
array-ptr-calc-i64.ll
ashr.v2i16.ll AMDGPU: Start selecting global instructions 2017-07-29 01:03:53 +00:00
atomic_cmp_swap_local.ll
atomic_load_add.ll
atomic_load_sub.ll
attr-amdgpu-flat-work-group-size.ll AMDGPU: Detect kernarg segment pointer 2017-07-14 00:11:13 +00:00
attr-amdgpu-num-sgpr.ll RegScavenging: Add scavengeRegisterBackwards() 2017-06-17 02:08:18 +00:00
attr-amdgpu-num-vgpr.ll
attr-amdgpu-waves-per-eu.ll AMDGPU: Fix amdgpu-flat-work-group-size/amdgpu-waves-per-eu check 2017-07-16 19:38:47 +00:00
attr-unparseable.ll
barrier-elimination.ll
basic-branch.ll
basic-call-return.ll AMDGPU: Remove error on calls for amdgcn 2017-08-03 23:24:05 +00:00
basic-loop.ll AMDGPU: Remove -mcpu=SI 2017-08-07 18:30:35 +00:00
bfe_uint.ll
bfe-combine.ll
bfe-patterns.ll
bfi_int.ll
bfm.ll
big_alu.ll
bitcast-vector-extract.ll AMDGPU: Cleanup subtarget features 2017-08-07 14:58:04 +00:00
bitreverse-inline-immediates.ll
bitreverse.ll [AMDGPU] Switch scalarize global loads ON by default 2017-07-04 17:32:00 +00:00
br_cc.f16.ll AMDGPU: Cleanup subtarget features 2017-08-07 14:58:04 +00:00
branch-condition-and.ll [AMDGPU] Eliminate no effect instructions before s_endpgm 2017-08-16 04:43:49 +00:00
branch-relax-spill.ll AMDGPU: Use correct register names in inline assembly 2017-06-08 19:03:20 +00:00
branch-relaxation.ll [Dominators] Include infinite loops in PostDominatorTree 2017-08-15 18:14:57 +00:00
branch-uniformity.ll
bswap.ll [AMDGPU] Switch scalarize global loads ON by default 2017-07-04 17:32:00 +00:00
bug-vopc-commute.ll AMDGPU: Remove SITypeRewriter 2017-06-28 21:38:50 +00:00
build_vector.ll
byval-frame-setup.ll AMDGPU: Stop modifying SP in call sequences 2017-09-14 17:37:40 +00:00
call_fs.ll
call-argument-types.ll AMDGPU: Stop modifying SP in call sequences 2017-09-14 17:37:40 +00:00
call-encoding.ll AMDGPU: Remove error on calls for amdgcn 2017-08-03 23:24:05 +00:00
call-graph-register-usage.ll AMDGPU: Remove error on calls for amdgcn 2017-08-03 23:24:05 +00:00
call-preserved-registers.ll AMDGPU: Make frame register caller preserved 2017-09-14 17:14:57 +00:00
call-return-types.ll AMDGPU: Remove error on calls for amdgcn 2017-08-03 23:24:05 +00:00
callee-frame-setup.ll AMDGPU: Remove error on calls for amdgcn 2017-08-03 23:24:05 +00:00
callee-special-input-sgprs.ll Revert "Re-enable "[MachineCopyPropagation] Extend pass to do COPY source forwarding"" 2017-09-04 15:47:00 +00:00
callee-special-input-vgprs.ll AMDGPU: Stop modifying SP in call sequences 2017-09-14 17:37:40 +00:00
calling-conventions.ll AMDGPU: Allow coldcc calls 2017-09-11 18:54:20 +00:00
captured-frame-index.ll AMDGPU: Cleanup subtarget features 2017-08-07 14:58:04 +00:00
cayman-loop-bug.ll
cf_end.ll
cf-loop-on-constant.ll
cf-stack-bug.ll
cgp-addressing-modes-flat.ll [AMDGPU] Switch scalarize global loads ON by default 2017-07-04 17:32:00 +00:00
cgp-addressing-modes.ll AMDGPU: Teach isLegalAddressingMode about global_* instructions 2017-07-29 01:12:31 +00:00
cgp-bitfield-extract.ll [AMDGPU] Add pattern for v_alignbit_b32 with immediate 2017-06-28 02:52:39 +00:00
clamp-modifier.ll AMDGPU: Fold clamp modifier for packed instructions 2017-08-31 23:53:50 +00:00
clamp-omod-special-case.mir AMDGPU: Remove unnecessary IR from MIR tests 2017-07-06 20:56:57 +00:00
clamp.ll AMDGPU: Select clamp pattern with v2f16 2017-08-30 01:20:17 +00:00
cluster-flat-loads.mir [AMDGPU] Fix shouldClusterMemOps to process flat loads 2017-09-06 15:31:30 +00:00
cndmask-no-def-vcc.ll
coalescer_distribute.ll
coalescer_remat.ll [AMDGPU] Switch scalarize global loads ON by default 2017-07-04 17:32:00 +00:00
coalescer-subrange-crash.ll
coalescer-subreg-join.mir
code-object-metadata-deduce-ro-arg.ll
code-object-metadata-from-llvm-ir-full.ll Fix ODR violations due to abuse of LLVM_YAML_IS_(FLOW_)?SEQUENCE_VECTOR 2017-06-30 20:56:57 +00:00
code-object-metadata-images.ll
code-object-metadata-invalid-ocl-version-1.ll
code-object-metadata-invalid-ocl-version-2.ll
code-object-metadata-invalid-ocl-version-3.ll
code-object-metadata-kernel-code-props.ll
code-object-metadata-kernel-debug-props.ll RegScavenging: Add scavengeRegisterBackwards() 2017-06-17 02:08:18 +00:00
codegen-prepare-addrmode-sext.ll
collapse-endcf.ll AMDGPU: Recompute scc liveness 2017-09-08 18:51:26 +00:00
combine_vloads.ll
combine-and-sext-bool.ll [AMDGPU] Combine and x, (sext cc from i1) => select cc, x, 0 2017-06-27 18:25:26 +00:00
combine-cond-add-sub.ll [AMDGPU] Combine and x, (sext cc from i1) => select cc, x, 0 2017-06-27 18:25:26 +00:00
commute_modifiers.ll
commute-compares.ll
commute-shifts.ll
complex-folding.ll
concat_vectors.ll
constant-fold-imm-immreg.mir AMDGPU: Remove unnecessary IR from MIR tests 2017-07-06 20:56:57 +00:00
constant-fold-mi-operands.ll AMDGPU: Allow SIShrinkInstructions to work in non-SSA 2017-07-10 19:53:57 +00:00
control-flow-fastregalloc.ll [AMDGPU] Optimize SI_IF lowering for simple if regions 2017-07-26 21:29:15 +00:00
convergent-inlineasm.ll
copy-illegal-type.ll [AMDGPU] Switch scalarize global loads ON by default 2017-07-04 17:32:00 +00:00
copy-to-reg.ll
ctlz_zero_undef.ll AMDGPU: Add macro fusion schedule DAG mutation 2017-07-06 20:57:05 +00:00
ctlz.ll AMDGPU: Allow SIShrinkInstructions to work in non-SSA 2017-07-10 19:53:57 +00:00
ctpop64.ll AMDGPU: Cleanup subtarget features 2017-08-07 14:58:04 +00:00
ctpop.ll Allow target to decide when to cluster loads/stores in misched 2017-09-13 22:20:47 +00:00
cttz_zero_undef.ll [AMDGPU] Switch scalarize global loads ON by default 2017-07-04 17:32:00 +00:00
cube.ll
cvt_f32_ubyte.ll AMDGPU: Cleanup subtarget features 2017-08-07 14:58:04 +00:00
cvt_flr_i32_f32.ll
cvt_rpi_i32_f32.ll
dagcombine-reassociate-bug.ll
dagcombiner-bug-illegal-vec4-int-to-fp.ll
debug.ll
debugger-emit-prologue.ll
debugger-insert-nops.ll
debugger-reserve-regs.ll
default-fp-mode.ll
detect-dead-lanes.mir AMDGPU: Remove unnecessary IR from MIR tests 2017-07-06 20:56:57 +00:00
disconnected-predset-break-bug.ll
drop-mem-operand-move-smrd.ll
ds_read2_offset_order.ll
ds_read2_superreg.ll AMDGPU: Allow SIShrinkInstructions to work in non-SSA 2017-07-10 19:53:57 +00:00
ds_read2.ll AMDGPU: Allow SIShrinkInstructions to work in non-SSA 2017-07-10 19:53:57 +00:00
ds_read2st64.ll AMDGPU: Allow SIShrinkInstructions to work in non-SSA 2017-07-10 19:53:57 +00:00
ds_write2.ll
ds_write2st64.ll
ds-combine-large-stride.ll
ds-negative-offset-addressing-mode-loop.ll
ds-sub-offset.ll
dynamic_stackalloc.ll
early-if-convert-cost.ll [AMDGPU] Switch scalarize global loads ON by default 2017-07-04 17:32:00 +00:00
early-if-convert.ll [AMDGPU] Switch scalarize global loads ON by default 2017-07-04 17:32:00 +00:00
early-inline-alias.ll
early-inline.ll
elf.ll
elf.r600.ll
else.ll
empty-function.ll AMDGPU: Remove -mcpu=SI 2017-08-07 18:30:35 +00:00
enable-no-signed-zeros-fp-math.ll AMDGPU: Allow SIShrinkInstructions to work in non-SSA 2017-07-10 19:53:57 +00:00
endcf-loop-header.ll
endpgm-dce.mir [AMDGPU] Eliminate no effect instructions before s_endpgm 2017-08-16 04:43:49 +00:00
env-amdgiz.ll
env-amdgizcl.ll
exceed-max-sgprs.ll AMDGPU: Use correct register names in inline assembly 2017-06-08 19:03:20 +00:00
extend-bit-ops-i16.ll
extload-align.ll
extload-private.ll
extload.ll
extract_vector_elt-f16.ll
extract_vector_elt-f64.ll
extract_vector_elt-i8.ll
extract_vector_elt-i16.ll AMDGPU: Start selecting global instructions 2017-07-29 01:03:53 +00:00
extract_vector_elt-i64.ll
extract-vector-elt-build-vector-combine.ll
extractelt-to-trunc.ll [AMDGPU] Switch scalarize global loads ON by default 2017-07-04 17:32:00 +00:00
fabs.f16.ll AMDGPU: Cleanup subtarget features 2017-08-07 14:58:04 +00:00
fabs.f64.ll
fabs.ll
fadd64.ll [AMDGPU] Switch scalarize global loads ON by default 2017-07-04 17:32:00 +00:00
fadd-fma-fmul-combine.ll AMDGPU: Allow SIShrinkInstructions to work in non-SSA 2017-07-10 19:53:57 +00:00
fadd.f16.ll Allow target to decide when to cluster loads/stores in misched 2017-09-13 22:20:47 +00:00
fadd.ll
fcanonicalize-elimination.ll [AMDGPU] Use v_max_f* for fcanonicalize 2017-08-30 03:03:38 +00:00
fcanonicalize.f16.ll [AMDGPU] Use v_pk_max_f16 for fcanonicalize 2017-09-06 22:27:29 +00:00
fcanonicalize.ll [AMDGPU] Use v_pk_max_f16 for fcanonicalize 2017-09-06 22:27:29 +00:00
fceil64.ll
fceil.ll
fcmp64.ll [AMDGPU] Switch scalarize global loads ON by default 2017-07-04 17:32:00 +00:00
fcmp-cnd.ll
fcmp-cnde-int-args.ll
fcmp.f16.ll AMDGPU: Add macro fusion schedule DAG mutation 2017-07-06 20:57:05 +00:00
fcmp.ll
fconst64.ll [AMDGPU] Switch scalarize global loads ON by default 2017-07-04 17:32:00 +00:00
fcopysign.f16.ll AMDGPU: Cleanup subtarget features 2017-08-07 14:58:04 +00:00
fcopysign.f32.ll
fcopysign.f64.ll
fdiv.f16.ll AMDGPU: Allow SIShrinkInstructions to work in non-SSA 2017-07-10 19:53:57 +00:00
fdiv.f64.ll
fdiv.ll AMDGPU: Allow SIShrinkInstructions to work in non-SSA 2017-07-10 19:53:57 +00:00
fence-amdgiz.ll AMDGPU: Cleanup subtarget features 2017-08-07 14:58:04 +00:00
fetch-limits.r600.ll
fetch-limits.r700+.ll
ffloor.f64.ll
ffloor.ll
fix-vgpr-copies.mir
fix-wwm-liveness.mir [AMDGPU] Add support for Whole Wavefront Mode 2017-08-04 18:36:52 +00:00
flat_atomics_i64.ll AMDGPU: Implement memory model 2017-07-21 21:19:23 +00:00
flat_atomics.ll AMDGPU: Implement memory model 2017-07-21 21:19:23 +00:00
flat-address-space.ll AMDGPU: Start selecting flat instruction offsets 2017-06-12 16:53:51 +00:00
flat-for-global-subtarget-feature.ll
flat-load-clustering.mir Allow target to decide when to cluster loads/stores in misched 2017-09-13 22:20:47 +00:00
flat-scratch-reg.ll AMDGPU: Use correct register names in inline assembly 2017-06-08 19:03:20 +00:00
floor.ll
fma-combine.ll AMDGPU: Allow SIShrinkInstructions to work in non-SSA 2017-07-10 19:53:57 +00:00
fma.f64.ll [AMDGPU] Switch scalarize global loads ON by default 2017-07-04 17:32:00 +00:00
fma.ll AMDGPU: Remove -mcpu=SI 2017-08-07 18:30:35 +00:00
fmad.ll
fmax3.f64.ll AMDGPU: Cleanup subtarget features 2017-08-07 14:58:04 +00:00
fmax3.ll
fmax_legacy.f64.ll
fmax_legacy.ll AMDGPU: Allow SIShrinkInstructions to work in non-SSA 2017-07-10 19:53:57 +00:00
fmax.ll
fmaxnum.f64.ll
fmaxnum.ll
fmed3.ll AMDGPU: Start selecting global instructions 2017-07-29 01:03:53 +00:00
fmin3.ll
fmin_fmax_legacy.amdgcn.ll
fmin_legacy.f64.ll
fmin_legacy.ll AMDGPU: Allow SIShrinkInstructions to work in non-SSA 2017-07-10 19:53:57 +00:00
fmin.ll
fminnum.f64.ll AMDGPU: Remove -mcpu=SI 2017-08-07 18:30:35 +00:00
fminnum.ll
fmul64.ll [AMDGPU] Switch scalarize global loads ON by default 2017-07-04 17:32:00 +00:00
fmul-2-combine-multi-use.ll
fmul.f16.ll AMDGPU: Cleanup subtarget features 2017-08-07 14:58:04 +00:00
fmul.ll
fmuladd.f16.ll AMDGPU: Allow SIShrinkInstructions to work in non-SSA 2017-07-10 19:53:57 +00:00
fmuladd.f32.ll AMDGPU: Allow SIShrinkInstructions to work in non-SSA 2017-07-10 19:53:57 +00:00
fmuladd.f64.ll [AMDGPU] Switch scalarize global loads ON by default 2017-07-04 17:32:00 +00:00
fmuladd.v2f16.ll AMDGPU: Start selecting global instructions 2017-07-29 01:03:53 +00:00
fnearbyint.ll
fneg-combines.ll AMDGPU: Allow SIShrinkInstructions to work in non-SSA 2017-07-10 19:53:57 +00:00
fneg-fabs.f16.ll [DAGCombine] (shl (or x, c1), c2) -> (or (shl x, c2), c1 << c2) 2017-09-14 10:38:30 +00:00
fneg-fabs.f64.ll
fneg-fabs.ll [AMDGPU] Switch scalarize global loads ON by default 2017-07-04 17:32:00 +00:00
fneg.f16.ll AMDGPU: Start selecting global instructions 2017-07-29 01:03:53 +00:00
fneg.f64.ll
fneg.ll
fold-cndmask.mir
fold-fmul-to-neg-abs.ll Fold fneg and fabs like multiplications 2017-06-28 20:25:50 +00:00
fold-immediate-output-mods.mir AMDGPU: Remove unnecessary IR from MIR tests 2017-07-06 20:56:57 +00:00
fold-operands-order.mir AMDGPU: Remove unnecessary IR from MIR tests 2017-07-06 20:56:57 +00:00
fp16_to_fp32.ll
fp16_to_fp64.ll
fp32_to_fp16.ll [AMDGPU] Switch scalarize global loads ON by default 2017-07-04 17:32:00 +00:00
fp_to_sint.f64.ll
fp_to_sint.ll
fp_to_uint.f64.ll
fp_to_uint.ll
fp-classify.ll
fpext.f16.ll AMDGPU: Cleanup subtarget features 2017-08-07 14:58:04 +00:00
fpext.ll
fptosi.f16.ll AMDGPU: Cleanup subtarget features 2017-08-07 14:58:04 +00:00
fptoui.f16.ll AMDGPU: Cleanup subtarget features 2017-08-07 14:58:04 +00:00
fptrunc.f16.ll AMDGPU: Allow SIShrinkInstructions to work in non-SSA 2017-07-10 19:53:57 +00:00
fptrunc.ll
fract.f64.ll [AMDGPU] Switch scalarize global loads ON by default 2017-07-04 17:32:00 +00:00
fract.ll AMDGPU: Allow SIShrinkInstructions to work in non-SSA 2017-07-10 19:53:57 +00:00
frame-index-amdgiz.ll AMDGPU: Cleanup subtarget features 2017-08-07 14:58:04 +00:00
frame-index-elimination.ll AMDGPU: Cleanup subtarget features 2017-08-07 14:58:04 +00:00
frem.ll AMDGPU: Allow SIShrinkInstructions to work in non-SSA 2017-07-10 19:53:57 +00:00
fsqrt.f64.ll [AMDGPU] Switch scalarize global loads ON by default 2017-07-04 17:32:00 +00:00
fsqrt.ll [AMDGPU] Switch scalarize global loads ON by default 2017-07-04 17:32:00 +00:00
fsub64.ll [AMDGPU] Switch scalarize global loads ON by default 2017-07-04 17:32:00 +00:00
fsub.f16.ll AMDGPU: Cleanup subtarget features 2017-08-07 14:58:04 +00:00
fsub.ll AMDGPU: Allow SIShrinkInstructions to work in non-SSA 2017-07-10 19:53:57 +00:00
ftrunc.f64.ll AMDGPU: Remove -mcpu=SI 2017-08-07 18:30:35 +00:00
ftrunc.ll
function-args.ll AMDGPU: Don't place arguments in emergency stack slot 2017-08-02 00:59:51 +00:00
function-returns.ll
gep-address-space.ll
global_atomics_i64.ll AMDGPU: Start selecting global instructions 2017-07-29 01:03:53 +00:00
global_atomics.ll AMDGPU: Start selecting global instructions 2017-07-29 01:03:53 +00:00
global_smrd_cfg.ll DivergencyAnalysis patch for review 2017-06-15 19:33:10 +00:00
global_smrd.ll
global-constant.ll
global-directive.ll
global-extload-i16.ll [AMDGPU] Switch scalarize global loads ON by default 2017-07-04 17:32:00 +00:00
global-smrd-unknown.ll AMDGPU: Fix converting unanalyzable global loads to SMRD 2017-07-12 23:06:18 +00:00
global-variable-relocs.ll
gv-const-addrspace.ll
gv-offset-folding.ll
half.ll AMDGPU: Cleanup subtarget features 2017-08-07 14:58:04 +00:00
hazard.mir AMDGPU: Make worst-case assumption about the wait states in inline assembly 2017-09-06 13:50:13 +00:00
hoist-cond.ll
hsa-default-device.ll
hsa-fp-mode.ll
hsa-func-align.ll
hsa-func.ll AMDGPU: Fix using SMRD instructions for argument loads in functions 2017-07-26 20:39:42 +00:00
hsa-globals.ll
hsa-group-segment.ll
hsa-note-no-func.ll AMDGPU : Fix ISA Version Definitions. 2017-06-10 03:53:19 +00:00
hsa.ll AMDGPU: Detect kernarg segment pointer 2017-07-14 00:11:13 +00:00
i1-copy-implicit-def.ll
i1-copy-phi.ll [AMDGPU] Optimize SI_IF lowering for simple if regions 2017-07-26 21:29:15 +00:00
i8-to-double-to-float.ll
icmp64.ll
icmp-select-sete-reverse-args.ll
icmp.i16.ll
illegal-sgpr-to-vgpr-copy.ll AMDGPU: Use correct register names in inline assembly 2017-06-08 19:03:20 +00:00
image-attributes.ll
image-resource-id.ll
imm16.ll
imm.ll [AMDGPU] Switch scalarize global loads ON by default 2017-07-04 17:32:00 +00:00
immv216.ll AMDGPU: Allow SIShrinkInstructions to work in non-SSA 2017-07-10 19:53:57 +00:00
indirect-addressing-si-noopt.ll AMDGPU: Cleanup subtarget features 2017-08-07 14:58:04 +00:00
indirect-addressing-si.ll AMDGPU: Cleanup subtarget features 2017-08-07 14:58:04 +00:00
indirect-private-64.ll
infer-addrpace-pipeline.ll [AMDGPU] Add infer address spaces pass before SROA 2017-06-19 23:17:36 +00:00
infinite-loop-evergreen.ll
infinite-loop.ll
inline-asm.ll AMDGPU: Fix assert on n inline asm constraint 2017-08-09 20:09:35 +00:00
inline-calls.ll AMDGPU: Remove -mcpu=SI 2017-08-07 18:30:35 +00:00
inline-constraints.ll
inlineasm-16.ll
inlineasm-illegal-type.ll
inlineasm-packed.ll
input-mods.ll
insert_subreg.ll AMDGPU: Remove -mcpu=SI 2017-08-07 18:30:35 +00:00
insert_vector_elt.ll AMDGPU: Cleanup subtarget features 2017-08-07 14:58:04 +00:00
insert_vector_elt.v2i16.ll AMDGPU: Start selecting global instructions 2017-07-29 01:03:53 +00:00
insert-skips-kill-uncond.mir
insert-waits-callee.mir
insert-waits-exp.mir
inserted-wait-states.mir [AMDGPU] Add pseudo "old" source to all DPP instructions 2017-08-07 19:10:56 +00:00
internalize.ll
invalid-addrspacecast.ll
invariant-load-no-alias-store.ll [AMDGPU] Switch scalarize global loads ON by default 2017-07-04 17:32:00 +00:00
invert-br-undef-vcc.mir
ipra.ll AMDGPU: Make frame register caller preserved 2017-09-14 17:14:57 +00:00
jump-address.ll
kcache-fold.ll
kernarg-stack-alignment.ll
kernel-args.ll
knownbits-recursion.ll [AMDGPU] Testcase for computeKnownBits recursion. NFC. 2017-09-01 22:25:22 +00:00
large-alloca-compute.ll
large-alloca-graphics.ll
large-constant-initializer.ll AMDGPU: Remove -mcpu=SI 2017-08-07 18:30:35 +00:00
large-work-group-promote-alloca.ll
lds-alignment.ll
lds-initializer.ll AMDGPU: Remove -mcpu=SI 2017-08-07 18:30:35 +00:00
lds-m0-init-in-loop.ll
lds-oqap-crash.ll
lds-output-queue.ll
lds-size.ll
lds-zero-initializer.ll AMDGPU: Remove -mcpu=SI 2017-08-07 18:30:35 +00:00
legalizedag-bug-expand-setcc.ll
limit-coalesce.mir AMDGPU: Start adding offset fields to flat instructions 2017-06-12 15:55:58 +00:00
lit.local.cfg
literals.ll
liveness.mir
llvm.amdgcn.alignb.ll [AMDGPU] Add intrinsics for alignbit and alignbyte instructions 2017-06-09 19:03:00 +00:00
llvm.amdgcn.atomic.dec.ll
llvm.amdgcn.atomic.inc.ll
llvm.amdgcn.buffer.atomic.ll
llvm.amdgcn.buffer.load.format.ll
llvm.amdgcn.buffer.load.ll
llvm.amdgcn.buffer.store.format.ll
llvm.amdgcn.buffer.store.ll
llvm.amdgcn.buffer.wbinvl1.ll
llvm.amdgcn.buffer.wbinvl1.sc.ll
llvm.amdgcn.buffer.wbinvl1.vol.ll
llvm.amdgcn.class.f16.ll [AMDGPU] Switch scalarize global loads ON by default 2017-07-04 17:32:00 +00:00
llvm.amdgcn.class.ll [AMDGPU] Switch scalarize global loads ON by default 2017-07-04 17:32:00 +00:00
llvm.amdgcn.cos.f16.ll
llvm.amdgcn.cos.ll
llvm.amdgcn.cubeid.ll
llvm.amdgcn.cubema.ll
llvm.amdgcn.cubesc.ll
llvm.amdgcn.cubetc.ll
llvm.amdgcn.cvt.pkrtz.ll AMDGPU: Start selecting global instructions 2017-07-29 01:03:53 +00:00
llvm.amdgcn.dispatch.id.ll
llvm.amdgcn.dispatch.ptr.ll
llvm.amdgcn.div.fixup.f16.ll
llvm.amdgcn.div.fixup.ll
llvm.amdgcn.div.fmas.ll [AMDGPU] Optimize SI_IF lowering for simple if regions 2017-07-26 21:29:15 +00:00
llvm.amdgcn.div.scale.ll AMDGPU: Fix handling of div_scale with undef inputs 2017-08-01 20:49:41 +00:00
llvm.amdgcn.ds.bpermute.ll [DAGCombine] (shl (or x, c1), c2) -> (or (shl x, c2), c1 << c2) 2017-09-14 10:38:30 +00:00
llvm.amdgcn.ds.permute.ll
llvm.amdgcn.ds.swizzle.ll
llvm.amdgcn.exp.compr.ll
llvm.amdgcn.exp.ll
llvm.amdgcn.fcmp.ll
llvm.amdgcn.fdiv.fast.ll
llvm.amdgcn.fmed3.f16.ll
llvm.amdgcn.fmed3.ll
llvm.amdgcn.fmul.legacy.ll
llvm.amdgcn.fract.f16.ll
llvm.amdgcn.fract.ll
llvm.amdgcn.frexp.exp.f16.ll
llvm.amdgcn.frexp.exp.ll
llvm.amdgcn.frexp.mant.f16.ll
llvm.amdgcn.frexp.mant.ll
llvm.amdgcn.groupstaticsize.ll
llvm.amdgcn.icmp.ll
llvm.amdgcn.image.atomic.ll
llvm.amdgcn.image.gather4.ll
llvm.amdgcn.image.getlod.ll
llvm.amdgcn.image.ll
llvm.amdgcn.image.sample.ll
llvm.amdgcn.image.sample.o.ll
llvm.amdgcn.implicit.buffer.ptr.hsa.ll AMDGPU: Partially fix implicit.buffer.ptr intrinsic handling 2017-06-26 03:01:31 +00:00
llvm.amdgcn.implicit.buffer.ptr.ll AMDGPU: Partially fix implicit.buffer.ptr intrinsic handling 2017-06-26 03:01:31 +00:00
llvm.amdgcn.implicitarg.ptr.ll AMDGPU: Remove error on calls for amdgcn 2017-08-03 23:24:05 +00:00
llvm.amdgcn.init.exec.ll
llvm.amdgcn.interp.ll
llvm.amdgcn.kernarg.segment.ptr.ll AMDGPU: Detect kernarg segment pointer 2017-07-14 00:11:13 +00:00
llvm.amdgcn.ldexp.f16.ll [AMDGPU] Switch scalarize global loads ON by default 2017-07-04 17:32:00 +00:00
llvm.amdgcn.ldexp.ll
llvm.amdgcn.lerp.ll
llvm.amdgcn.log.clamp.ll
llvm.amdgcn.mbcnt.ll
llvm.amdgcn.mov.dpp.ll [AMDGPU] Add pseudo "old" source to all DPP instructions 2017-08-07 19:10:56 +00:00
llvm.amdgcn.mqsad.pk.u16.u8.ll [AMDGPU] Eliminate SGPR to VGPR copy when possible 2017-06-20 18:32:42 +00:00
llvm.amdgcn.mqsad.u32.u8.ll AMDGPU: Use correct register names in inline assembly 2017-06-08 19:03:20 +00:00
llvm.amdgcn.msad.u8.ll
llvm.amdgcn.ps.live.ll [llvm] Remove redundant check-prefix=CHECK from tests. NFC. 2017-07-17 17:32:45 +00:00
llvm.amdgcn.qsad.pk.u16.u8.ll [AMDGPU] Eliminate SGPR to VGPR copy when possible 2017-06-20 18:32:42 +00:00
llvm.amdgcn.queue.ptr.ll
llvm.amdgcn.rcp.f16.ll
llvm.amdgcn.rcp.legacy.ll
llvm.amdgcn.rcp.ll
llvm.amdgcn.readfirstlane.ll
llvm.amdgcn.readlane.ll
llvm.amdgcn.rsq.clamp.ll
llvm.amdgcn.rsq.f16.ll
llvm.amdgcn.rsq.legacy.ll
llvm.amdgcn.rsq.ll
llvm.amdgcn.s.barrier.ll AMDGPU: Start selecting global instructions 2017-07-29 01:03:53 +00:00
llvm.amdgcn.s.dcache.inv.ll
llvm.amdgcn.s.dcache.inv.vol.ll
llvm.amdgcn.s.dcache.wb.ll
llvm.amdgcn.s.dcache.wb.vol.ll
llvm.amdgcn.s.decperflevel.ll
llvm.amdgcn.s.getpc.ll
llvm.amdgcn.s.getreg.ll
llvm.amdgcn.s.incperflevel.ll
llvm.amdgcn.s.memrealtime.ll
llvm.amdgcn.s.memtime.ll
llvm.amdgcn.s.sleep.ll
llvm.amdgcn.s.waitcnt.ll [llvm] Remove redundant check-prefix=CHECK from tests. NFC. 2017-07-17 17:32:45 +00:00
llvm.amdgcn.sad.hi.u8.ll
llvm.amdgcn.sad.u8.ll
llvm.amdgcn.sad.u16.ll
llvm.amdgcn.sbfe.ll [AMDGPU] Switch scalarize global loads ON by default 2017-07-04 17:32:00 +00:00
llvm.amdgcn.sendmsg.ll
llvm.amdgcn.set.inactive.ll [AMDGPU] Implement llvm.amdgcn.set.inactive intrinsic 2017-08-04 18:36:54 +00:00
llvm.amdgcn.sffbh.ll [AMDGPU] Switch scalarize global loads ON by default 2017-07-04 17:32:00 +00:00
llvm.amdgcn.sin.f16.ll
llvm.amdgcn.sin.ll
llvm.amdgcn.tbuffer.load.ll [AMDGPU] Add intrinsics for tbuffer load and store 2017-06-22 16:29:22 +00:00
llvm.amdgcn.tbuffer.store.ll [AMDGPU] Add intrinsics for tbuffer load and store 2017-06-22 16:29:22 +00:00
llvm.amdgcn.trig.preop.ll [AMDGPU] Switch scalarize global loads ON by default 2017-07-04 17:32:00 +00:00
llvm.amdgcn.ubfe.ll [AMDGPU] Switch scalarize global loads ON by default 2017-07-04 17:32:00 +00:00
llvm.amdgcn.unreachable.ll
llvm.amdgcn.update.dpp.ll [AMDGPU] Add llvm.amdgpu.update.dpp intrinsic 2017-08-08 18:52:22 +00:00
llvm.amdgcn.wave.barrier.ll
llvm.amdgcn.workgroup.id.ll
llvm.amdgcn.workitem.id.ll
llvm.AMDGPU.kill.ll
llvm.amdgpu.kilp.ll
llvm.ceil.f16.ll AMDGPU: Cleanup subtarget features 2017-08-07 14:58:04 +00:00
llvm.cos.f16.ll AMDGPU: Cleanup subtarget features 2017-08-07 14:58:04 +00:00
llvm.cos.ll
llvm.dbg.value.ll
llvm.exp2.f16.ll AMDGPU: Cleanup subtarget features 2017-08-07 14:58:04 +00:00
llvm.exp2.ll
llvm.floor.f16.ll AMDGPU: Cleanup subtarget features 2017-08-07 14:58:04 +00:00
llvm.fma.f16.ll AMDGPU: Cleanup subtarget features 2017-08-07 14:58:04 +00:00
llvm.fmuladd.f16.ll AMDGPU: Cleanup subtarget features 2017-08-07 14:58:04 +00:00
llvm.log2.f16.ll AMDGPU: Cleanup subtarget features 2017-08-07 14:58:04 +00:00
llvm.log2.ll AMDGPU: Remove -mcpu=SI 2017-08-07 18:30:35 +00:00
llvm.maxnum.f16.ll AMDGPU: Cleanup subtarget features 2017-08-07 14:58:04 +00:00
llvm.memcpy.ll AMDGPU: Cleanup subtarget features 2017-08-07 14:58:04 +00:00
llvm.minnum.f16.ll AMDGPU: Cleanup subtarget features 2017-08-07 14:58:04 +00:00
llvm.pow.ll
llvm.r600.cube.ll
llvm.r600.dot4.ll
llvm.r600.group.barrier.ll
llvm.r600.read.local.size.ll
llvm.r600.recipsqrt.clamped.ll
llvm.r600.recipsqrt.ieee.ll
llvm.r600.tex.ll
llvm.rint.f16.ll AMDGPU: Cleanup subtarget features 2017-08-07 14:58:04 +00:00
llvm.rint.f64.ll AMDGPU: Remove -mcpu=SI 2017-08-07 18:30:35 +00:00
llvm.rint.ll
llvm.round.f64.ll
llvm.round.ll AMDGPU: Cleanup subtarget features 2017-08-07 14:58:04 +00:00
llvm.SI.load.dword.ll AMDGPU: Remove SITypeRewriter 2017-06-28 21:38:50 +00:00
llvm.SI.tbuffer.store.ll AMDGPU: Remove SITypeRewriter 2017-06-28 21:38:50 +00:00
llvm.sin.f16.ll AMDGPU: Cleanup subtarget features 2017-08-07 14:58:04 +00:00
llvm.sin.ll
llvm.sqrt.f16.ll AMDGPU: Cleanup subtarget features 2017-08-07 14:58:04 +00:00
llvm.trunc.f16.ll AMDGPU: Cleanup subtarget features 2017-08-07 14:58:04 +00:00
load-constant-f64.ll
load-constant-i1.ll
load-constant-i8.ll
load-constant-i16.ll
load-constant-i32.ll
load-constant-i64.ll
load-global-f32.ll [AMDGPU] Switch scalarize global loads ON by default 2017-07-04 17:32:00 +00:00
load-global-f64.ll [AMDGPU] Switch scalarize global loads ON by default 2017-07-04 17:32:00 +00:00
load-global-i1.ll
load-global-i8.ll Re-land MachineInstr: Reason locally about some memory objects before going to AA. 2017-08-30 14:57:12 +00:00
load-global-i16.ll Re-land MachineInstr: Reason locally about some memory objects before going to AA. 2017-08-30 14:57:12 +00:00
load-global-i32.ll [AMDGPU] Switch scalarize global loads ON by default 2017-07-04 17:32:00 +00:00
load-global-i64.ll [AMDGPU] Switch scalarize global loads ON by default 2017-07-04 17:32:00 +00:00
load-input-fold.ll
load-local-f32.ll
load-local-f64.ll
load-local-i1.ll
load-local-i8.ll
load-local-i16.ll Re-land MachineInstr: Reason locally about some memory objects before going to AA. 2017-08-30 14:57:12 +00:00
load-local-i32.ll
load-local-i64.ll
load-weird-sizes.ll [AMDGPU] Switch scalarize global loads ON by default 2017-07-04 17:32:00 +00:00
local-64.ll
local-atomics64.ll
local-atomics.ll
local-memory.amdgcn.ll
local-memory.ll
local-memory.r600.ll
local-stack-slot-offset.ll
loop_break.ll [AMDGPU] Eliminate no effect instructions before s_endpgm 2017-08-16 04:43:49 +00:00
loop-address.ll
loop-idiom.ll AMDGPU: Remove -mcpu=SI 2017-08-07 18:30:35 +00:00
lower-mem-intrinsics.ll Extend memcpy expansion in Transform/Utils to handle wider operand types. 2017-07-07 02:00:06 +00:00
lower-range-metadata-intrinsic-call.ll
lshl64-to-32.ll [AMDGPU] computeKnownBitsForTargetNode for 24 bit mul 2017-08-28 16:35:37 +00:00
lshr.v2i16.ll AMDGPU: Start selecting global instructions 2017-07-29 01:03:53 +00:00
macro-fusion-cluster-vcc-uses.mir AMDGPU: Cleanup subtarget features 2017-08-07 14:58:04 +00:00
mad24-get-global-id.ll
mad_int24.ll
mad_uint24.ll
mad-combine.ll AMDGPU: Allow SIShrinkInstructions to work in non-SSA 2017-07-10 19:53:57 +00:00
mad-mix.ll AMDGPU: Start selecting v_mad_mix_f32 2017-09-07 18:05:07 +00:00
madak.ll [AMDGPU] Produce madak and madmk from the two-address pass 2017-09-11 17:13:57 +00:00
madmk.ll AMDGPU: Allow SIShrinkInstructions to work in non-SSA 2017-07-10 19:53:57 +00:00
max3.ll
max-literals.ll
max.i16.ll
max.ll [AMDGPU] Switch scalarize global loads ON by default 2017-07-04 17:32:00 +00:00
mem-builtins.ll AMDGPU: Remove error on calls for amdgcn 2017-08-03 23:24:05 +00:00
memory-legalizer-atomic-cmpxchg.ll AMDGPU: Implement memory model 2017-07-21 21:19:23 +00:00
memory-legalizer-atomic-fence.ll AMDGPU: Implement memory model 2017-07-21 21:19:23 +00:00
memory-legalizer-atomic-load.ll AMDGPU: Implement memory model 2017-07-21 21:19:23 +00:00
memory-legalizer-atomic-rmw.ll AMDGPU: Implement memory model 2017-07-21 21:19:23 +00:00
memory-legalizer-atomic-store.ll AMDGPU: Implement memory model 2017-07-21 21:19:23 +00:00
memory-legalizer-invalid-syncscope.ll AMDGPU: Implement memory model 2017-07-21 21:19:23 +00:00
memory-legalizer-nontemporal-load.ll AMDGPU: Handle non-temporal loads and stores 2017-09-07 17:14:54 +00:00
memory-legalizer-nontemporal-store.ll AMDGPU: Handle non-temporal loads and stores 2017-09-07 17:14:54 +00:00
merge-m0.mir
merge-store-crash.ll [AMDGPU] Add intrinsics for tbuffer load and store 2017-06-22 16:29:22 +00:00
merge-store-usedef.ll [AMDGPU] Add intrinsics for tbuffer load and store 2017-06-22 16:29:22 +00:00
merge-stores.ll AMDGPU: Cleanup subtarget features 2017-08-07 14:58:04 +00:00
mesa_regression.ll
min3.ll
min.ll AMDGPU: Start selecting global instructions 2017-07-29 01:03:53 +00:00
misched-killflags.mir ScheduleDAGInstrs: Fix fixupKills() adding too many kill flags. 2017-06-27 00:58:48 +00:00
missing-store.ll AMDGPU: Remove -mcpu=SI 2017-08-07 18:30:35 +00:00
move-addr64-rsrc-dead-subreg-writes.ll
move-to-valu-atomicrmw.ll
move-to-valu-worklist.ll [AMDGPU] Do not insert an instruction into worklist twice in movetovalu 2017-07-14 17:56:55 +00:00
movreld-bug.ll
movrels-bug.mir
mubuf-offset-private.ll Revert "[MachineCopyPropagation] Extend pass to do COPY source forwarding" 2017-08-17 04:04:11 +00:00
mubuf-shader-vgpr.ll
mubuf.ll [AMDGPU] Switch scalarize global loads ON by default 2017-07-04 17:32:00 +00:00
mul_int24.ll
mul_uint24-amdgcn.ll
mul_uint24-r600.ll
mul.ll [AMDGPU] Switch scalarize global loads ON by default 2017-07-04 17:32:00 +00:00
multi-divergent-exit-region.ll [AMDGPU] Eliminate no effect instructions before s_endpgm 2017-08-16 04:43:49 +00:00
multilevel-break.ll Revert "[MachineCopyPropagation] Extend pass to do COPY source forwarding" 2017-08-17 04:04:11 +00:00
nested-calls.ll AMDGPU: Remove error on calls for amdgcn 2017-08-03 23:24:05 +00:00
nested-loop-conditions.ll
no-hsa-graphics-shaders.ll
no-initializer-constant-addrspace.ll AMDGPU: Remove -mcpu=SI 2017-08-07 18:30:35 +00:00
no-shrink-extloads.ll [AMDGPU] Switch scalarize global loads ON by default 2017-07-04 17:32:00 +00:00
nop-data.ll
not-scalarize-volatile-load.ll
nullptr.ll
omod.ll
opencl-image-metadata.ll
operand-folding.ll
operand-spacing.ll
opt-sgpr-to-vgpr-copy.mir [AMDGPU] Eliminate SGPR to VGPR copy when possible 2017-06-20 18:32:42 +00:00
optimize-if-exec-masking.mir
or.ll [AMDGPU] Switch scalarize global loads ON by default 2017-07-04 17:32:00 +00:00
over-max-lds-size.ll
pack.v2f16.ll AMDGPU: Start selecting global instructions 2017-07-29 01:03:53 +00:00
pack.v2i16.ll AMDGPU: Start selecting global instructions 2017-07-29 01:03:53 +00:00
packed-op-sel.ll
packetizer.ll
parallelandifcollapse.ll fix typos in comments; NFC 2017-07-16 08:11:56 +00:00
parallelorifcollapse.ll fix typos in comments; NFC 2017-07-16 08:11:56 +00:00
partial-sgpr-to-vgpr-spills.ll AMDGPU: Use correct register names in inline assembly 2017-06-08 19:03:20 +00:00
partially-dead-super-register-immediate.ll
predicate-dp4.ll
predicates.ll
private-access-no-objects.ll Revert "[MachineCopyPropagation] Extend pass to do COPY source forwarding" 2017-08-17 04:04:11 +00:00
private-element-size.ll
private-memory-atomics.ll AMDGPU: Remove -mcpu=SI 2017-08-07 18:30:35 +00:00
private-memory-r600.ll
promote-alloca-addrspacecast.ll
promote-alloca-array-aggregate.ll AMDGPU: Fix assert on alloca of array of struct 2017-09-14 18:02:29 +00:00
promote-alloca-array-allocation.ll
promote-alloca-bitcast-function.ll AMDGPU: Don't use report_fatal_error for unsupported call types 2017-08-03 23:32:41 +00:00
promote-alloca-calling-conv.ll AMDGPU: Remove error on calls for amdgcn 2017-08-03 23:24:05 +00:00
promote-alloca-globals.ll
promote-alloca-invariant-markers.ll [AMDGPU] Switch scalarize global loads ON by default 2017-07-04 17:32:00 +00:00
promote-alloca-lifetime.ll
promote-alloca-mem-intrinsics.ll AMDGPU: Cleanup subtarget features 2017-08-07 14:58:04 +00:00
promote-alloca-no-opts.ll AMDGPU: Cleanup subtarget features 2017-08-07 14:58:04 +00:00
promote-alloca-padding-size-estimate.ll AMDGPU: Cleanup subtarget features 2017-08-07 14:58:04 +00:00
promote-alloca-stored-pointer-value.ll
promote-alloca-to-lds-icmp.ll
promote-alloca-to-lds-phi.ll
promote-alloca-to-lds-select.ll
promote-alloca-unhandled-intrinsic.ll
promote-alloca-volatile.ll
pv-packing.ll
pv.ll
r600-constant-array-fixup.ll
r600-encoding.ll
r600-export-fix.ll
r600-infinite-loop-bug-while-reorganizing-vector.ll
r600-legalize-umax-bug.ll
r600.alu-limits.ll
r600.amdgpu-alias-analysis.ll
r600.bitcast.ll
r600.global_atomics.ll
r600.private-memory.ll
r600.work-item-intrinsics.ll
r600cfg.ll
rcp-pattern.ll
read_register.ll
read-register-invalid-subtarget.ll
read-register-invalid-type-i32.ll
read-register-invalid-type-i64.ll
readcyclecounter.ll
README
reduce-load-width-alignment.ll [AMDGPU] Switch scalarize global loads ON by default 2017-07-04 17:32:00 +00:00
reduce-saveexec.mir [AMDGPU] Turn s_and_saveexec_b64 into s_and_b64 if result is unused 2017-08-01 23:44:35 +00:00
reduce-store-width-alignment.ll
reg-coalescer-sched-crash.ll
regcoal-subrange-join.mir [RegisterCoalescer] Fix for SubRange join unreachable 2017-07-06 10:07:57 +00:00
regcoalesce-dbg.mir
regcoalesce-prune.mir
register-count-comments.ll
rename-disconnected-bug.ll
rename-independent-subregs-mac-operands.mir [AMDGPU] resubmit r308179: CodeGen: check dst operand type to determine if omod is supported for VOP3 instructions 2017-07-18 14:23:26 +00:00
rename-independent-subregs.mir
reorder-stores.ll [AMDGPU] Switch scalarize global loads ON by default 2017-07-04 17:32:00 +00:00
ret_jump.ll [AMDGPU] Optimize SI_IF lowering for simple if regions 2017-07-26 21:29:15 +00:00
ret.ll Revert "Re-enable "[MachineCopyPropagation] Extend pass to do COPY source forwarding"" 2017-09-04 15:47:00 +00:00
rewrite-out-arguments-address-space.ll AMDGPU: Look through a bitcast user of an out argument 2017-07-28 19:06:16 +00:00
rewrite-out-arguments.ll AMDGPU: Look through a bitcast user of an out argument 2017-07-28 19:06:16 +00:00
rotl.i64.ll [AMDGPU] Switch scalarize global loads ON by default 2017-07-04 17:32:00 +00:00
rotl.ll
rotr.i64.ll [AMDGPU] Switch scalarize global loads ON by default 2017-07-04 17:32:00 +00:00
rotr.ll
rsq.ll AMDGPU: Allow SIShrinkInstructions to work in non-SSA 2017-07-10 19:53:57 +00:00
rv7x0_count3.ll
s_addk_i32.ll AMDGPU: Cleanup subtarget features 2017-08-07 14:58:04 +00:00
s_movk_i32.ll [AMDGPU] Switch scalarize global loads ON by default 2017-07-04 17:32:00 +00:00
s_mulk_i32.ll AMDGPU: Cleanup subtarget features 2017-08-07 14:58:04 +00:00
sad.ll AMDGPU: Cleanup subtarget features 2017-08-07 14:58:04 +00:00
saddo.ll AMDGPU: Remove -mcpu=SI 2017-08-07 18:30:35 +00:00
salu-to-valu.ll [AMDGPU] Switch scalarize global loads ON by default 2017-07-04 17:32:00 +00:00
sampler-resource-id.ll
scalar_to_vector.ll AMDGPU: Allow SIShrinkInstructions to work in non-SSA 2017-07-10 19:53:57 +00:00
scalar-store-cache-flush.mir
schedule-fs-loop-nested-if.ll
schedule-fs-loop-nested.ll
schedule-fs-loop.ll
schedule-global-loads.ll [AMDGPU] Switch scalarize global loads ON by default 2017-07-04 17:32:00 +00:00
schedule-if-2.ll
schedule-if.ll
schedule-kernel-arg-loads.ll AMDGPU: Cleanup subtarget features 2017-08-07 14:58:04 +00:00
schedule-regpressure-limit2.ll AMDGPU: Cleanup subtarget features 2017-08-07 14:58:04 +00:00
schedule-regpressure-limit.ll
schedule-regpressure.mir
schedule-vs-if-nested-loop-failure.ll
schedule-vs-if-nested-loop.ll
scheduler-subrange-crash.ll AMDGPU: Remove SITypeRewriter 2017-06-28 21:38:50 +00:00
scratch-buffer.ll [AMDGPU] Switch scalarize global loads ON by default 2017-07-04 17:32:00 +00:00
scratch-simple.ll AMDGPU: Figure out private memory regs after lowering 2017-07-18 16:44:56 +00:00
sdiv.ll [AMDGPU] Switch scalarize global loads ON by default 2017-07-04 17:32:00 +00:00
sdivrem24.ll
sdivrem64.ll
sdwa-gfx9.mir [AMDGPU] SDWA: add support for GFX9 in peephole pass 2017-06-22 06:26:41 +00:00
sdwa-peephole-instr.mir [AMDGPU] resubmit r308179: CodeGen: check dst operand type to determine if omod is supported for VOP3 instructions 2017-07-18 14:23:26 +00:00
sdwa-peephole.ll AMDGPU: Allow SIShrinkInstructions to work in non-SSA 2017-07-10 19:53:57 +00:00
sdwa-scalar-ops.mir [AMDGPU] SDWA: add support for GFX9 in peephole pass 2017-06-22 06:26:41 +00:00
sdwa-vop2-64bit.mir [AMDGPU] resubmit r308179: CodeGen: check dst operand type to determine if omod is supported for VOP3 instructions 2017-07-18 14:23:26 +00:00
select64.ll AMDGPU: Remove -mcpu=SI 2017-08-07 18:30:35 +00:00
select-fabs-fneg-extract-legacy.ll
select-fabs-fneg-extract.ll AMDGPU: Allow SIShrinkInstructions to work in non-SSA 2017-07-10 19:53:57 +00:00
select-i1.ll
select-opt.ll
select-vectors.ll AMDGPU: Cleanup subtarget features 2017-08-07 14:58:04 +00:00
select.f16.ll AMDGPU: Cleanup subtarget features 2017-08-07 14:58:04 +00:00
select.ll
selectcc-cnd.ll
selectcc-cnde-int.ll
selectcc-icmp-select-float.ll
selectcc-opt.ll
selectcc.ll AMDGPU: Remove -mcpu=SI 2017-08-07 18:30:35 +00:00
selected-stack-object.ll
set-dx10.ll
setcc64.ll
setcc-equivalent.ll
setcc-fneg-constant.ll AMDGPU: Cleanup subtarget features 2017-08-07 14:58:04 +00:00
setcc-opt.ll
setcc-sext.ll [AMDGPU] Simplify setcc (sext from i1 b), -1|0, cc 2017-06-27 18:53:03 +00:00
setcc.ll AMDGPU: Add macro fusion schedule DAG mutation 2017-07-06 20:57:05 +00:00
seto.ll
setuo.ll
sext-eliminate.ll
sext-in-reg-failure-r600.ll
sext-in-reg.ll AMDGPU: Start selecting global instructions 2017-07-29 01:03:53 +00:00
sgpr-control-flow.ll
sgpr-copy-duplicate-operand.ll [AMDGPU] Switch scalarize global loads ON by default 2017-07-04 17:32:00 +00:00
sgpr-copy.ll [AMDGPU] Switch scalarize global loads ON by default 2017-07-04 17:32:00 +00:00
sgprcopies.ll
shared-op-cycle.ll
shift-and-i64-ubfe.ll AMDGPU: Cleanup subtarget features 2017-08-07 14:58:04 +00:00
shift-and-i128-ubfe.ll AMDGPU: Cleanup subtarget features 2017-08-07 14:58:04 +00:00
shift-i64-opts.ll [AMDGPU] Switch scalarize global loads ON by default 2017-07-04 17:32:00 +00:00
shl_add_constant.ll AMDGPU: Cleanup subtarget features 2017-08-07 14:58:04 +00:00
shl_add_ptr.ll
shl-add-to-add-shl.ll
shl.ll [DAGCombine] (shl (or x, c1), c2) -> (or (shl x, c2), c1 << c2) 2017-09-14 10:38:30 +00:00
shl.v2i16.ll AMDGPU: Start selecting global instructions 2017-07-29 01:03:53 +00:00
shrink-add-sub-constant.ll
shrink-carry.mir [AMDGPU] Eliminate no effect instructions before s_endpgm 2017-08-16 04:43:49 +00:00
shrink-vop3-carry-out.mir AMDGPU: Allow SIShrinkInstructions to work in non-SSA 2017-07-10 19:53:57 +00:00
si-annotate-cf-noloop.ll [AMDGPU] Eliminate no effect instructions before s_endpgm 2017-08-16 04:43:49 +00:00
si-annotate-cf-unreachable.ll
si-annotate-cf.ll
si-annotate-cfg-loop-assert.ll
si-fix-sgpr-copies.mir
si-instr-info-correct-implicit-operands.ll
si-lod-bias.ll AMDGPU: Remove SITypeRewriter 2017-06-28 21:38:50 +00:00
si-lower-control-flow-kill.ll [AMDGPU] Preserve inverted bit in SI_IF in presence of SI_KILL 2017-08-04 06:58:42 +00:00
si-lower-control-flow-unreachable-block.ll [AMDGPU] Eliminate no effect instructions before s_endpgm 2017-08-16 04:43:49 +00:00
si-scheduler.ll
si-sgpr-spill.ll AMDGPU: Remove SITypeRewriter 2017-06-28 21:38:50 +00:00
si-spill-cf.ll AMDGPU: Remove SITypeRewriter 2017-06-28 21:38:50 +00:00
si-spill-sgpr-stack.ll AMDGPU: Use correct register names in inline assembly 2017-06-08 19:03:20 +00:00
si-triv-disjoint-mem-access.ll Allow target to decide when to cluster loads/stores in misched 2017-09-13 22:20:47 +00:00
si-vector-hang.ll
sibling-call.ll AMDGPU: Make frame register caller preserved 2017-09-14 17:14:57 +00:00
sign_extend.ll [AMDGPU] Switch scalarize global loads ON by default 2017-07-04 17:32:00 +00:00
simplify-libcalls.ll [AMDGPU] Transform __read_pipe_* and __write_pipe_* 2017-09-06 00:30:27 +00:00
sint_to_fp.f64.ll
sint_to_fp.i64.ll [AMDGPU] Eliminate SGPR to VGPR copy when possible 2017-06-20 18:32:42 +00:00
sint_to_fp.ll
sitofp.f16.ll AMDGPU: Cleanup subtarget features 2017-08-07 14:58:04 +00:00
skip-if-dead.ll [AMDGPU] Eliminate no effect instructions before s_endpgm 2017-08-16 04:43:49 +00:00
smed3.ll
sminmax.ll AMDGPU: Allow SIShrinkInstructions to work in non-SSA 2017-07-10 19:53:57 +00:00
sminmax.v2i16.ll AMDGPU: Don't legalize i16 extloads to i32 with legal i16 2017-09-07 05:37:34 +00:00
smrd-vccz-bug.ll
smrd.ll AMDGPU: Remove SITypeRewriter 2017-06-28 21:38:50 +00:00
sopk-compares.ll
spill-alloc-sgpr-init-bug.ll
spill-cfg-position.ll [AMDGPU] Switch scalarize global loads ON by default 2017-07-04 17:32:00 +00:00
spill-empty-live-interval.mir [AMDGPU] Eliminate no effect instructions before s_endpgm 2017-08-16 04:43:49 +00:00
spill-m0.ll [AMDGPU] exp should not be in WQM mode 2017-09-11 13:55:39 +00:00
spill-scavenge-offset.ll AMDGPU: Use correct register names in inline assembly 2017-06-08 19:03:20 +00:00
spill-to-smem-m0.ll AMDGPU: M0 operands to spill/restore opcodes are dead 2017-06-27 08:04:13 +00:00
spill-wide-sgpr.ll
split-scalar-i64-add.ll
split-smrd.ll AMDGPU: Remove SITypeRewriter 2017-06-28 21:38:50 +00:00
split-vector-memoperand-offsets.ll
splitkit.mir
sra.ll [AMDGPU] Switch scalarize global loads ON by default 2017-07-04 17:32:00 +00:00
srem.ll AMDGPU: Remove -mcpu=SI 2017-08-07 18:30:35 +00:00
srl.ll [AMDGPU] Switch scalarize global loads ON by default 2017-07-04 17:32:00 +00:00
ssubo.ll AMDGPU: Remove -mcpu=SI 2017-08-07 18:30:35 +00:00
stack-slot-color-sgpr-vgpr-spills.mir Add an ID field to StackObjects 2017-07-20 21:03:45 +00:00
store_typed.ll
store-barrier.ll
store-global.ll AMDGPU: Start selecting global instructions 2017-07-29 01:03:53 +00:00
store-local.ll
store-private.ll
store-v3i64.ll
store-vector-ptrs.ll AMDGPU: Remove -mcpu=SI 2017-08-07 18:30:35 +00:00
structurize1.ll
structurize.ll
sub.i16.ll Allow target to decide when to cluster loads/stores in misched 2017-09-13 22:20:47 +00:00
sub.ll [AMDGPU] Switch scalarize global loads ON by default 2017-07-04 17:32:00 +00:00
sub.v2i16.ll AMDGPU: Start selecting global instructions 2017-07-29 01:03:53 +00:00
subreg_interference.mir
subreg-coalescer-crash.ll
subreg-coalescer-undef-use.ll AMDGPU: Remove -mcpu=SI 2017-08-07 18:30:35 +00:00
subreg-eliminate-dead.ll
subreg-intervals.mir
swizzle-export.ll
syncscopes.ll AMDGPU: Implement memory model 2017-07-21 21:19:23 +00:00
tail-call-cgp.ll AMDGPU: Start adding tail call support 2017-08-11 20:42:08 +00:00
target-cpu.ll
tex-clause-antidep.ll
texture-input-merge.ll
trap.ll AMDGPU: Detect kernarg segment pointer 2017-07-14 00:11:13 +00:00
trunc-bitcast-vector.ll [AMDGPU] Switch scalarize global loads ON by default 2017-07-04 17:32:00 +00:00
trunc-cmp-constant.ll
trunc-store-f64-to-f16.ll
trunc-store-i1.ll
trunc-store.ll
trunc-vector-store-assertion-failure.ll
trunc.ll AMDGPU: Cleanup subtarget features 2017-08-07 14:58:04 +00:00
tti-unroll-prefs.ll AMDGPU: Remove -mcpu=SI 2017-08-07 18:30:35 +00:00
twoaddr-mad.mir AMDGPU: Fix violating constant bus restriction 2017-09-14 20:54:29 +00:00
uaddo.ll AMDGPU: Add macro fusion schedule DAG mutation 2017-07-06 20:57:05 +00:00
udiv.ll [AMDGPU] Switch scalarize global loads ON by default 2017-07-04 17:32:00 +00:00
udivrem24.ll
udivrem64.ll
udivrem.ll AMDGPU: Cleanup subtarget features 2017-08-07 14:58:04 +00:00
uint_to_fp.f64.ll
uint_to_fp.i64.ll [AMDGPU] Eliminate SGPR to VGPR copy when possible 2017-06-20 18:32:42 +00:00
uint_to_fp.ll
uitofp.f16.ll AMDGPU: Cleanup subtarget features 2017-08-07 14:58:04 +00:00
umed3.ll
unaligned-load-store.ll AMDGPU : Widen extending scalar loads to 32-bits. 2017-07-26 21:07:28 +00:00
undefined-subreg-liverange.ll AMDGPU: Use correct register names in inline assembly 2017-06-08 19:03:20 +00:00
unhandled-loop-condition-assertion.ll
uniform-branch-intrinsic-cond.ll
uniform-cfg.ll [AMDGPU] Eliminate no effect instructions before s_endpgm 2017-08-16 04:43:49 +00:00
uniform-crash.ll
uniform-loop-inside-nonuniform.ll [AMDGPU] Optimize SI_IF lowering for simple if regions 2017-07-26 21:29:15 +00:00
unify-metadata.ll
unigine-liveness-crash.ll
unknown-processor.ll
unroll.ll
unsupported-calls.ll AMDGPU: Don't use report_fatal_error for unsupported call types 2017-08-03 23:32:41 +00:00
unsupported-cc.ll
urem.ll [AMDGPU] Switch scalarize global loads ON by default 2017-07-04 17:32:00 +00:00
use-sgpr-multiple-times.ll
usubo.ll AMDGPU: Allow SIShrinkInstructions to work in non-SSA 2017-07-10 19:53:57 +00:00
v1i64-kernel-arg.ll
v_cndmask.ll AMDGPU: Add macro fusion schedule DAG mutation 2017-07-06 20:57:05 +00:00
v_cvt_pk_u8_f32.ll
v_mac_f16.ll AMDGPU: Cleanup subtarget features 2017-08-07 14:58:04 +00:00
v_mac.ll AMDGPU: Allow SIShrinkInstructions to work in non-SSA 2017-07-10 19:53:57 +00:00
v_madak_f16.ll [AMDGPU] Produce madak and madmk from the two-address pass 2017-09-11 17:13:57 +00:00
valu-i1.ll [AMDGPU] Eliminate no effect instructions before s_endpgm 2017-08-16 04:43:49 +00:00
vccz-corrupt-bug-workaround.mir [AMDGPU] resubmit r308179: CodeGen: check dst operand type to determine if omod is supported for VOP3 instructions 2017-07-18 14:23:26 +00:00
vector-alloca.ll
vector-extract-insert.ll AMDGPU: Cleanup subtarget features 2017-08-07 14:58:04 +00:00
vectorize-global-local.ll [AMDGPU] Switch scalarize global loads ON by default 2017-07-04 17:32:00 +00:00
vertex-fetch-encoding.ll
vgpr-spill-emergency-stack-slot-compute.ll AMDGPU: Figure out private memory regs after lowering 2017-07-18 16:44:56 +00:00
vgpr-spill-emergency-stack-slot.ll AMDGPU: Figure out private memory regs after lowering 2017-07-18 16:44:56 +00:00
vi-removed-intrinsics.ll
vop-shrink-frame-index.mir AMDGPU: Allow SIShrinkInstructions to fold FrameIndexes 2017-07-10 20:04:35 +00:00
vop-shrink-non-ssa.mir AMDGPU: Allow SIShrinkInstructions to work in non-SSA 2017-07-10 19:53:57 +00:00
vop-shrink.ll
vselect64.ll
vselect.ll AMDGPU: Add macro fusion schedule DAG mutation 2017-07-06 20:57:05 +00:00
vtx-fetch-branch.ll
vtx-schedule.ll
wait.ll
waitcnt-flat.ll AMDGPU: Start selecting global instructions 2017-07-29 01:03:53 +00:00
waitcnt-looptest.ll
waitcnt-permute.mir AMDGPU: Remove unnecessary IR from MIR tests 2017-07-06 20:56:57 +00:00
waitcnt.mir AMDGPU: Start adding offset fields to flat instructions 2017-06-12 15:55:58 +00:00
widen_extending_scalar_loads.ll AMDGPU : Widen extending scalar loads to 32-bits. 2017-07-26 21:07:28 +00:00
wqm.ll [AMDGPU] exp should not be in WQM mode 2017-09-11 13:55:39 +00:00
wqm.mir [AMDGPU] Add support for Whole Wavefront Mode 2017-08-04 18:36:52 +00:00
write_register.ll [AMDGPU] Eliminate no effect instructions before s_endpgm 2017-08-16 04:43:49 +00:00
write-register-vgpr-into-sgpr.ll [AMDGPU] Eliminate no effect instructions before s_endpgm 2017-08-16 04:43:49 +00:00
wrong-transalu-pos-fix.ll
xfail.r600.bitcast.ll
xor.ll AMDGPU: Allow SIShrinkInstructions to work in non-SSA 2017-07-10 19:53:57 +00:00
zero_extend.ll
zext-i64-bit-operand.ll AMDGPU: Allow SIShrinkInstructions to work in non-SSA 2017-07-10 19:53:57 +00:00
zext-lid.ll

+==============================================================================+
| How to organize the lit tests                                                |
+==============================================================================+

- If you write a test for matching a single DAG opcode or intrinsic, it should
  go in a file called {opcode_name,intrinsic_name}.ll (e.g. fadd.ll)

- If you write a test that matches several DAG opcodes and checks for a single
  ISA instruction, then that test should go in a file called {ISA_name}.ll (e.g.
  bfi_int.ll

- For all other tests, use your best judgement for organizing tests and naming
  the files.

+==============================================================================+
| Naming conventions                                                           |
+==============================================================================+

- Use dash '-' and not underscore '_' to separate words in file names, unless
  the file is named after a DAG opcode or ISA instruction that has an
  underscore '_' in its name.