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llvm-mirror/lib/Target/AArch64
Sander de Smalen 63fb4fcb81 [AArch64][SVE] Asm: Add SVE System registers
This patch adds system registers for controlling aspects of SVE:
- ZCR_EL1  (r/w)   visible at EL1 and EL0.
- ZCR_EL2  (r/w)   visible at EL2 and Non-secure EL1 and EL0.
- ZCR_EL3  (r/w)   visible at all exception levels.

and a system register identifying SVE:
- ID_AA64ZFR0_EL1  (r)  SVE Feature identifier.

Reviewers: SjoerdMeijer, samparker, pbarrio, fhahn, javed.absar

Reviewed By: SjoerdMeijer

Differential Revision: https://reviews.llvm.org/D50885

llvm-svn: 340158
2018-08-20 09:16:59 +00:00
..
AsmParser [AArch64] Disallow the MachO specific .loh directive for windows 2018-08-01 06:50:18 +00:00
Disassembler [AArch64] Armv8.4-A: LDAPR & STLR with immediate offset instructions (cont'd) 2018-07-13 15:25:42 +00:00
InstPrinter [AArch64][ARM] Armv8.4-A: Trace synchronization barrier instruction 2018-07-06 08:03:12 +00:00
MCTargetDesc [AArch64] Add support for got relocated LDR's 2018-08-02 06:24:40 +00:00
TargetInfo
Utils [AArch64] Armv8.4-A: TLB support 2018-07-06 13:00:16 +00:00
AArch64.h Revert r331816 and r331820 - [globalisel] Add a combiner helpers for extending loads and use them in a pre-legalize combiner for AArch64 2018-05-09 05:00:17 +00:00
AArch64.td [ARM/AArch64] Support FP16 +fp16fml instructions 2018-08-17 11:29:49 +00:00
AArch64A53Fix835769.cpp Rename DEBUG macro to LLVM_DEBUG. 2018-05-14 12:53:11 +00:00
AArch64A57FPLoadBalancing.cpp Rename DEBUG macro to LLVM_DEBUG. 2018-05-14 12:53:11 +00:00
AArch64AdvSIMDScalarPass.cpp Rename DEBUG macro to LLVM_DEBUG. 2018-05-14 12:53:11 +00:00
AArch64AsmPrinter.cpp [COFF] Hoist constant pool handling from X86AsmPrinter into AsmPrinter 2018-07-25 18:35:31 +00:00
AArch64CallingConvention.h
AArch64CallingConvention.td
AArch64CallLowering.cpp [GlobalISel] Rewrite CallLowering::lowerReturn to accept multiple VRegs per Value 2018-08-02 08:33:31 +00:00
AArch64CallLowering.h [GlobalISel] Rewrite CallLowering::lowerReturn to accept multiple VRegs per Value 2018-08-02 08:33:31 +00:00
AArch64CleanupLocalDynamicTLSPass.cpp
AArch64CollectLOH.cpp Rename DEBUG macro to LLVM_DEBUG. 2018-05-14 12:53:11 +00:00
AArch64CondBrTuning.cpp Rename DEBUG macro to LLVM_DEBUG. 2018-05-14 12:53:11 +00:00
AArch64ConditionalCompares.cpp Rename DEBUG macro to LLVM_DEBUG. 2018-05-14 12:53:11 +00:00
AArch64ConditionOptimizer.cpp Rename DEBUG macro to LLVM_DEBUG. 2018-05-14 12:53:11 +00:00
AArch64DeadRegisterDefinitionsPass.cpp Rename DEBUG macro to LLVM_DEBUG. 2018-05-14 12:53:11 +00:00
AArch64ExpandPseudoInsts.cpp [AArch64] Improve orr+movk sequences for MOVi64imm. 2018-05-24 19:38:23 +00:00
AArch64FalkorHWPFFix.cpp Rename DEBUG macro to LLVM_DEBUG. 2018-05-14 12:53:11 +00:00
AArch64FastISel.cpp DAG: Add calling convention argument to calling convention funcs 2018-07-28 13:25:19 +00:00
AArch64FrameLowering.cpp [AArch64] - Generate pointer authentication instructions 2018-08-17 12:53:22 +00:00
AArch64FrameLowering.h Remove \brief commands from doxygen comments. 2018-05-01 15:54:18 +00:00
AArch64GenRegisterBankInfo.def
AArch64InstrAtomics.td
AArch64InstrFormats.td [ARM/AArch64] Support FP16 +fp16fml instructions 2018-08-17 11:29:49 +00:00
AArch64InstrInfo.cpp Remove trailing space 2018-07-30 19:41:25 +00:00
AArch64InstrInfo.h [MachineOutliner][AArch64] Add support for saving LR to a register 2018-07-30 17:45:28 +00:00
AArch64InstrInfo.td [ARM/AArch64] Support FP16 +fp16fml instructions 2018-08-17 11:29:49 +00:00
AArch64InstructionSelector.cpp [AArch64][GlobalISel] Add isel support for G_BLOCK_ADDR. 2018-07-31 00:09:02 +00:00
AArch64ISelDAGToDAG.cpp [SDAG] Remove the reliance on MI's allocation strategy for 2018-08-14 23:30:32 +00:00
AArch64ISelLowering.cpp [SDAG] Remove the reliance on MI's allocation strategy for 2018-08-14 23:30:32 +00:00
AArch64ISelLowering.h [ARM] Make PerformSHLSimplify add nodes to the DAG worklist correctly. 2018-08-14 22:10:25 +00:00
AArch64LegalizerInfo.cpp [AArch64][GlobalISel] Make G_BLOCK_ADDR legal. 2018-07-31 00:08:56 +00:00
AArch64LegalizerInfo.h
AArch64LoadStoreOptimizer.cpp [MI] Change the array of MachineMemOperand pointers to be 2018-08-16 21:30:05 +00:00
AArch64MachineFunctionInfo.h Remove trailing space 2018-07-30 19:41:25 +00:00
AArch64MacroFusion.cpp Remove \brief commands from doxygen comments. 2018-05-01 15:54:18 +00:00
AArch64MacroFusion.h
AArch64MCInstLower.cpp
AArch64MCInstLower.h
AArch64PBQPRegAlloc.cpp Rename DEBUG macro to LLVM_DEBUG. 2018-05-14 12:53:11 +00:00
AArch64PBQPRegAlloc.h
AArch64PerfectShuffle.h
AArch64PromoteConstant.cpp Rename DEBUG macro to LLVM_DEBUG. 2018-05-14 12:53:11 +00:00
AArch64RedundantCopyElimination.cpp [CodeGen][AArch64] Use RegUnits to track register aliases. (NFC) 2018-05-23 17:49:38 +00:00
AArch64RegisterBankInfo.cpp
AArch64RegisterBankInfo.h
AArch64RegisterBanks.td
AArch64RegisterInfo.cpp [AArch64] Remove Duplicate FP16 Patterns with same encoding, match on existing patterns 2018-06-27 09:20:13 +00:00
AArch64RegisterInfo.h [AArch64] Remove Duplicate FP16 Patterns with same encoding, match on existing patterns 2018-06-27 09:20:13 +00:00
AArch64RegisterInfo.td [AArch64][SVE] Asm: Add MOVPRFX instructions. 2018-07-30 15:42:46 +00:00
AArch64SchedA53.td
AArch64SchedA57.td
AArch64SchedA57WriteRes.td
AArch64SchedCyclone.td
AArch64SchedExynosM1.td [ExynosM1][Sched] Fix resource usage in scheduling model. 2018-06-11 07:33:08 +00:00
AArch64SchedExynosM3.td [ExynosM3] Fix scheduling info. 2018-05-18 13:10:41 +00:00
AArch64SchedFalkor.td
AArch64SchedFalkorDetails.td
AArch64SchedKryo.td
AArch64SchedKryoDetails.td
AArch64SchedThunderX2T99.td [TableGen] Emit a fatal error on inconsistencies in resource units vs cycles. 2018-06-13 09:41:49 +00:00
AArch64SchedThunderX.td
AArch64Schedule.td
AArch64SelectionDAGInfo.cpp
AArch64SelectionDAGInfo.h
AArch64SIMDInstrOpt.cpp
AArch64StorePairSuppress.cpp Rename DEBUG macro to LLVM_DEBUG. 2018-05-14 12:53:11 +00:00
AArch64Subtarget.cpp
AArch64Subtarget.h [ARM/AArch64] Support FP16 +fp16fml instructions 2018-08-17 11:29:49 +00:00
AArch64SVEInstrInfo.td [AArch64][SVE] Asm: Enable instructions to be prefixed. 2018-07-30 16:05:45 +00:00
AArch64SystemOperands.td [AArch64][SVE] Asm: Add SVE System registers 2018-08-20 09:16:59 +00:00
AArch64TargetMachine.cpp Recommit "Enable MachineOutliner by default under -Oz for AArch64" 2018-07-27 20:18:27 +00:00
AArch64TargetMachine.h
AArch64TargetObjectFile.cpp [AArch64] DWARF: do not generate AT_location for thread local 2018-08-01 23:46:49 +00:00
AArch64TargetObjectFile.h
AArch64TargetTransformInfo.cpp Remove trailing space 2018-07-30 19:41:25 +00:00
AArch64TargetTransformInfo.h [TTI, AArch64] Add transpose shuffle kind 2018-04-26 13:48:33 +00:00
CMakeLists.txt Revert r331816 and r331820 - [globalisel] Add a combiner helpers for extending loads and use them in a pre-legalize combiner for AArch64 2018-05-09 05:00:17 +00:00
LLVMBuild.txt
SVEInstrFormats.td [AArch64][SVE] Asm: Enable instructions to be prefixed. 2018-07-30 16:05:45 +00:00