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llvm-mirror/lib/Target/Hexagon
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Duncan P. N. Exon Smith 13c519204e CodeGen: Take MachineInstr& in SlotIndexes and LiveIntervals, NFC 
Take MachineInstr by reference instead of by pointer in SlotIndexes and
the SlotIndex wrappers in LiveIntervals.  The MachineInstrs here are
never null, so this cleans up the API a bit.  It also incidentally
removes a few implicit conversions from MachineInstrBundleIterator to
MachineInstr* (see PR26753).

At a couple of call sites it was convenient to convert to a range-based
for loop over MachineBasicBlock::instr_begin/instr_end, so I added
MachineBasicBlock::instrs.

llvm-svn: 262115
2016-02-27 06:40:41 +00:00
..
AsmParser [Hexagon] Loop instructions don't need special processing. Extension and fitting is performed by generic code and the comment is incorrect, loops don't have a separate extended opcode. 2016-02-17 18:14:05 +00:00
Disassembler [NFC] Referencing manual for reason why subregbit is checked 2016-02-01 18:15:39 +00:00
MCTargetDesc [Hexagon] Remove redundant check. 2016-02-18 17:49:57 +00:00
TargetInfo Remove autoconf support 2016-01-26 21:29:08 +00:00
BitTracker.cpp [Hexagon] Fix compilation error with GCC 6 2016-02-18 16:10:27 +00:00
BitTracker.h -Wdeprecated-clean: Fix cases of violating the rule of 5 in ways that are deprecated in C++11 2015-08-01 05:31:27 +00:00
CMakeLists.txt [Hexagon] Optimize stack slot spills 2016-02-12 22:53:35 +00:00
Hexagon.h [Hexagon] Improve lowering of instructions to the MC layer 2015-12-02 23:08:29 +00:00
Hexagon.td [TableGen] Modify the AsmMatcherEmitter to only apply the table growth from r252440 to the Hexagon target. 2015-12-31 08:18:23 +00:00
HexagonAsmPrinter.cpp Revert "CodeGen: MachineInstr::getIterator() => getInstrIterator(), NFC" 2016-02-22 20:49:58 +00:00
HexagonAsmPrinter.h [Hexagon] Preprocess mapped instructions before lowering to MC 2015-12-15 17:05:45 +00:00
HexagonBitSimplify.cpp [Hexagon] Use S2_lsr_i_r instead of S2_extractu to obtain upper halfword 2016-01-14 21:59:22 +00:00
HexagonBitTracker.cpp CodeGen: TII: Take MachineInstr& in predicate API, NFC 2016-02-23 02:46:52 +00:00
HexagonBitTracker.h
HexagonBlockRanges.cpp Fix Windows buildbot breakage. 2016-02-12 23:51:06 +00:00
HexagonBlockRanges.h [Hexagon] Optimize stack slot spills 2016-02-12 22:53:35 +00:00
HexagonCallingConv.td
HexagonCFGOptimizer.cpp Replace all weight-based interfaces in MBB with probability-based interfaces, and update all uses of old interfaces. 2015-12-01 05:29:22 +00:00
HexagonCommonGEP.cpp Introduce analysis pass to compute PostDominators in the new pass manager. NFC 2016-02-25 17:54:07 +00:00
HexagonCopyToCombine.cpp PR26172: unnecessary indirection in HexagonCopyToCombine.cpp 2016-01-21 12:45:17 +00:00
HexagonEarlyIfConv.cpp CodeGen: TII: Take MachineInstr& in predicate API, NFC 2016-02-23 02:46:52 +00:00
HexagonExpandCondsets.cpp CodeGen: Take MachineInstr& in SlotIndexes and LiveIntervals, NFC 2016-02-27 06:40:41 +00:00
HexagonFixupHwLoops.cpp
HexagonFrameLowering.cpp CodeGen: TII: Take MachineInstr& in predicate API, NFC 2016-02-23 02:46:52 +00:00
HexagonFrameLowering.h [Hexagon] Optimize stack slot spills 2016-02-12 22:53:35 +00:00
HexagonGenExtract.cpp Hexagon: Remove implicit ilist iterator conversions, NFC 2015-10-20 00:46:39 +00:00
HexagonGenInsert.cpp [Hexagon] Fix the return value from HexagonGenInsert::runOnMachineFunction 2015-11-20 20:46:23 +00:00
HexagonGenMux.cpp Replace uint16_t with the MCPhysReg typedef in many places. A lot of physical register arrays already use this typedef. 2015-12-05 07:13:35 +00:00
HexagonGenPredicate.cpp Fix some comment typos. 2015-08-08 18:27:36 +00:00
HexagonHardwareLoops.cpp Revert "CodeGen: MachineInstr::getIterator() => getInstrIterator(), NFC" 2016-02-22 20:49:58 +00:00
HexagonInstrAlias.td [Hexagon] Adding instruction aliases and tests. 2015-11-10 01:58:26 +00:00
HexagonInstrEnc.td [Hexagon] Adding skeleton of HVX extension instructions. 2015-10-17 01:33:04 +00:00
HexagonInstrFormats.td [Hexagon] Remove the remnants of isConstExtProfitable 2015-10-20 19:04:53 +00:00
HexagonInstrFormatsV4.td [Hexagon] Update instruction formats 2015-11-23 14:09:26 +00:00
HexagonInstrFormatsV60.td [Hexagon] Update instruction formats 2015-11-23 14:09:26 +00:00
HexagonInstrInfo.cpp CodeGen: TII: Take MachineInstr& in predicate API, NFC 2016-02-23 02:46:52 +00:00
HexagonInstrInfo.h CodeGen: TII: Take MachineInstr& in predicate API, NFC 2016-02-23 02:46:52 +00:00
HexagonInstrInfo.td [Hexagon] Adding relocation for code size, cold path optimization allowing a 23-bit 4-byte aligned relocation to be a valid instruction encoding. 2016-02-16 20:38:17 +00:00
HexagonInstrInfoV3.td
HexagonInstrInfoV4.td [Hexagon] Add support for __builtin_prefetch 2016-02-18 13:58:38 +00:00
HexagonInstrInfoV5.td [Hexagon] Treat transfers of FP immediates are pseudo instructions 2015-11-25 21:40:03 +00:00
HexagonInstrInfoV60.td [Hexagon] Implement CONCAT_VECTORS for HVX using V6_vcombine 2015-12-03 16:47:20 +00:00
HexagonInstrInfoVector.td [Hexagon] Hexagon V60 HVX intrinsic defintions 2015-11-26 16:54:33 +00:00
HexagonIntrinsics.td [Hexagon] Eliminate pseudo instructions for circ/brev loads and stores 2016-02-12 17:01:51 +00:00
HexagonIntrinsicsDerived.td
HexagonIntrinsicsV3.td
HexagonIntrinsicsV4.td
HexagonIntrinsicsV5.td
HexagonIntrinsicsV60.td [Hexagon] Hexagon V60 HVX intrinsic defintions 2015-11-26 16:54:33 +00:00
HexagonISelDAGToDAG.cpp [Hexagon] Eliminate pseudo instructions for circ/brev loads and stores 2016-02-12 17:01:51 +00:00
HexagonISelLowering.cpp [Hexagon] Implement TLS support 2016-02-18 15:42:57 +00:00
HexagonISelLowering.h [Hexagon] Implement TLS support 2016-02-18 15:42:57 +00:00
HexagonIsetDx.td
HexagonMachineFunctionInfo.cpp
HexagonMachineFunctionInfo.h
HexagonMachineScheduler.cpp Make MachineScheduler debug output less confusing. 2015-09-18 18:52:20 +00:00
HexagonMachineScheduler.h
HexagonMCInstLower.cpp [Hexagon] Implement TLS support 2016-02-18 15:42:57 +00:00
HexagonNewValueJump.cpp CodeGen: TII: Take MachineInstr& in predicate API, NFC 2016-02-23 02:46:52 +00:00
HexagonOperands.td [Hexagon] Adding relocation for code size, cold path optimization allowing a 23-bit 4-byte aligned relocation to be a valid instruction encoding. 2016-02-16 20:38:17 +00:00
HexagonOptimizeSZextends.cpp Hexagon: Remove implicit ilist iterator conversions, NFC 2015-10-20 00:46:39 +00:00
HexagonPeephole.cpp CodeGen: TII: Take MachineInstr& in predicate API, NFC 2016-02-23 02:46:52 +00:00
HexagonRDF.cpp [Hexagon] Implement RDF-based post-RA optimizations 2016-01-12 19:09:01 +00:00
HexagonRDF.h [Hexagon] Implement RDF-based post-RA optimizations 2016-01-12 19:09:01 +00:00
HexagonRDFOpt.cpp Move classes defined in a cpp file into an anonymous namespace. 2016-02-05 13:50:53 +00:00
HexagonRegisterInfo.cpp [Hexagon] Implement TLS support 2016-02-18 15:42:57 +00:00
HexagonRegisterInfo.h Targets: commonize some stack realignment code 2015-07-20 22:51:32 +00:00
HexagonRegisterInfo.td [Hexagon] Mark HVX registers as volatile 2016-02-12 22:26:44 +00:00
HexagonSchedule.td [Hexagon] Update instruction formats 2015-11-23 14:09:26 +00:00
HexagonScheduleV4.td [Hexagon] Bring HexagonInstrInfo up to date 2015-11-24 14:55:26 +00:00
HexagonScheduleV55.td [Hexagon] Adding skeleton of HVX extension instructions. 2015-10-17 01:33:04 +00:00
HexagonScheduleV60.td Hexagon V60/HVX DFA scheduler support 2015-11-21 20:00:45 +00:00
HexagonSelectCCInfo.td
HexagonSelectionDAGInfo.cpp [Hexagon] Make memcpy lowering thread-safe 2015-12-16 17:29:37 +00:00
HexagonSelectionDAGInfo.h Rename TargetSelectionDAGInfo into SelectionDAGTargetInfo and move it to CodeGen/ 2016-01-27 16:32:26 +00:00
HexagonSplitConst32AndConst64.cpp Hexagon: Remove implicit ilist iterator conversions, NFC 2015-10-20 00:46:39 +00:00
HexagonSplitDouble.cpp [Hexagon] Split double registers 2015-10-16 20:38:54 +00:00
HexagonStoreWidening.cpp [Hexagon] Merge adjacent stores 2015-10-16 19:43:56 +00:00
HexagonSubtarget.cpp [Hexagon] Subtarget features/default CPU corrections 2015-12-14 15:03:54 +00:00
HexagonSubtarget.h [Hexagon] Subtarget features/default CPU corrections 2015-12-14 15:03:54 +00:00
HexagonSystemInst.td [Hexagon] Add system instructions for cache manipulation 2016-01-06 14:22:22 +00:00
HexagonTargetMachine.cpp [Hexagon] Remove HexagonExpandPredSpillCode pass 2016-02-12 17:09:58 +00:00
HexagonTargetMachine.h [Hexagon] Add PIC support 2015-12-18 20:19:30 +00:00
HexagonTargetObjectFile.cpp GlobalValue: use getValueType() instead of getType()->getPointerElementType(). 2016-01-16 20:30:46 +00:00
HexagonTargetObjectFile.h
HexagonTargetStreamer.h
HexagonTargetTransformInfo.cpp [Hexagon] Edit a comment. NFC 2015-08-05 21:08:26 +00:00
HexagonTargetTransformInfo.h constify the Function parameter to the TTI creation callback and 2015-09-16 23:38:13 +00:00
HexagonVLIWPacketizer.cpp CodeGen: TII: Take MachineInstr& in predicate API, NFC 2016-02-23 02:46:52 +00:00
HexagonVLIWPacketizer.h CodeGen: TII: Take MachineInstr& in predicate API, NFC 2016-02-23 02:46:52 +00:00
LLVMBuild.txt [Hexagon] Adding LLVMBuild.txt reference to HexagonAsmParser. 2015-11-09 04:31:02 +00:00
RDFCopy.cpp [RDF] Improvements to copy propagation 2016-01-18 20:43:57 +00:00
RDFCopy.h [RDF] Improvements to copy propagation 2016-01-18 20:43:57 +00:00
RDFDeadCode.cpp [RDF] Improve compile-time performance of dead code elimination 2016-01-18 20:42:47 +00:00
RDFDeadCode.h [RDF] Improve compile-time performance of dead code elimination 2016-01-18 20:42:47 +00:00
RDFGraph.cpp CodeGen: TII: Take MachineInstr& in predicate API, NFC 2016-02-23 02:46:52 +00:00
RDFGraph.h [RDF] Allow unlinking ref nodes from data-flow chains only 2016-01-18 20:41:34 +00:00
RDFLiveness.cpp RDF: Implement register liveness analysis 2016-01-12 15:56:33 +00:00
RDFLiveness.h RDF: Implement register liveness analysis 2016-01-12 15:56:33 +00:00