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llvm-mirror/test/CodeGen/AMDGPU
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Tom Stellard 060bccc1f3 AMDGPU/SI: Use v_readfirstlane to legalize SMRD with VGPR base pointer 
Summary:
Instead of trying to replace SMRD instructions with a VGPR base pointer
with an equivalent MUBUF instruction, we now copy the base pointer to
SGPRs using v_readfirstlane.

This is safe to do, because any load selected as an SMRD instruction
has been proven to have a uniform base pointer, so each thread in the
wave will have the same pointer value in VGPRs.

This will fix some errors on VI from trying to replace SMRD instructions
with addr64-enabled MUBUF instructions that don't exist.

Reviewers: arsenm, cfang, nhaehnle

Subscribers: arsenm, llvm-commits

Differential Revision: http://reviews.llvm.org/D17305

llvm-svn: 261385
2016-02-20 00:37:25 +00:00
..
32-bit-local-address-space.ll
add_i64.ll AMDGPU: Remove some old intrinsic uses from tests 2016-02-11 06:02:01 +00:00
add-debug.ll
add.ll
address-space.ll
addrspacecast.ll AMDGPU: Remove some old intrinsic uses from tests 2016-02-11 06:02:01 +00:00
and-gcn.ll AMDGPU/SI: Detect uniform branches and emit s_cbranch instructions 2016-02-12 23:45:29 +00:00
and.ll AMDGPU/SI: Detect uniform branches and emit s_cbranch instructions 2016-02-12 23:45:29 +00:00
annotate-kernel-features-hsa.ll AMDGPU: Stop checking intrinsics not used by HSA for dispatch-ptr 2016-01-30 05:10:59 +00:00
annotate-kernel-features.ll AMDGPU: Stop checking intrinsics not used by HSA for dispatch-ptr 2016-01-30 05:10:59 +00:00
anyext.ll
array-ptr-calc-i32.ll AMDGPU: Remove some old intrinsic uses from tests 2016-02-11 06:02:01 +00:00
array-ptr-calc-i64.ll
atomic_cmp_swap_local.ll
atomic_load_add.ll
atomic_load_sub.ll
basic-branch.ll
basic-loop.ll
bfe_uint.ll
bfi_int.ll
bfm.ll AMDGPU: Remove bfi and bfm intrinsics 2016-02-08 19:06:01 +00:00
big_alu.ll AMDGPU: Replace some deprecated intrinsic uses in tests 2016-01-23 05:42:49 +00:00
bitcast.ll
bitreverse.ll AMDGPU: Use generic bitreverse intrinsic 2015-12-14 17:25:38 +00:00
bswap.ll
build_vector.ll
call_fs.ll
call.ll Refactor backend diagnostics for unsupported features 2016-02-02 13:52:43 +00:00
calling-conventions.ll
cayman-loop-bug.ll
cf_end.ll
cf-stack-bug.ll
cgp-addressing-modes-flat.ll AMDGPU: Implement isNoopAddrSpaceCast 2015-12-01 23:04:00 +00:00
cgp-addressing-modes.ll AMDGPU/SI: Detect uniform branches and emit s_cbranch instructions 2016-02-12 23:45:29 +00:00
ci-use-flat-for-global.ll AMDGPU: Set flat_scratch from flat_scratch_init reg 2016-02-12 06:31:30 +00:00
coalescer_remat.ll
codegen-prepare-addrmode-sext.ll
combine_vloads.ll
commute_modifiers.ll AMDGPU: Remove some old intrinsic uses from tests 2016-02-11 06:02:01 +00:00
commute-compares.ll AMDGPU: Remove some old intrinsic uses from tests 2016-02-11 06:02:01 +00:00
commute-shifts.ll AMDGPU: Remove old sample intrinsics 2016-01-26 04:38:08 +00:00
complex-folding.ll
concat_vectors.ll
copy-illegal-type.ll
copy-to-reg.ll
ctlz_zero_undef.ll [AMDGPU] Assembler: Swap operands of flat_store instructions to match AMD assembler 2016-02-12 17:57:54 +00:00
ctlz.ll [AMDGPU] Assembler: Swap operands of flat_store instructions to match AMD assembler 2016-02-12 17:57:54 +00:00
ctpop64.ll AMDGPU: fix overlapping copies in copyPhysReg 2015-12-19 01:16:06 +00:00
ctpop.ll
cttz_zero_undef.ll
cube.ll AMDGPU: Add new amdgcn intrinsics for cube instructions 2016-01-26 04:29:56 +00:00
cvt_f32_ubyte.ll
cvt_flr_i32_f32.ll
cvt_rpi_i32_f32.ll
dagcombiner-bug-illegal-vec4-int-to-fp.ll
debug.ll
default-fp-mode.ll
disconnected-predset-break-bug.ll
dot4-folding.ll
drop-mem-operand-move-smrd.ll AMDGPU: Remove some old intrinsic uses from tests 2016-02-11 06:02:01 +00:00
ds_read2_offset_order.ll
ds_read2_superreg.ll AMDGPU: Remove some old intrinsic uses from tests 2016-02-11 06:02:01 +00:00
ds_read2.ll AMDGPU: Remove some old intrinsic uses from tests 2016-02-11 06:02:01 +00:00
ds_read2st64.ll AMDGPU: Remove some old intrinsic uses from tests 2016-02-11 06:02:01 +00:00
ds_write2.ll AMDGPU: Remove some old intrinsic uses from tests 2016-02-11 06:02:01 +00:00
ds_write2st64.ll AMDGPU: Remove some old intrinsic uses from tests 2016-02-11 06:02:01 +00:00
ds-negative-offset-addressing-mode-loop.ll AMDGPU: Remove some old intrinsic uses from tests 2016-02-11 06:02:01 +00:00
ds-sub-offset.ll AMDGPU: Remove some old intrinsic uses from tests 2016-02-11 06:02:01 +00:00
dynamic_stackalloc.ll Refactor backend diagnostics for unsupported features 2016-02-02 13:52:43 +00:00
elf.ll [MC] Use .p2align instead of .align 2016-01-26 00:03:25 +00:00
elf.r600.ll
empty-function.ll
endcf-loop-header.ll AMDGPU/SI: Detect uniform branches and emit s_cbranch instructions 2016-02-12 23:45:29 +00:00
extload-private.ll
extload.ll
extract_vector_elt_i16.ll
extract-vector-elt-i8.ll AMDGPU: Make v32i8/v64i8 illegal types 2016-01-26 04:43:48 +00:00
extract-vector-elt-i64.ll AMDGPU: Make v2i64/v2f64 legal types. 2015-11-25 19:58:34 +00:00
fabs.f64.ll AMDGPU: Remove some old intrinsic uses from tests 2016-02-11 06:02:01 +00:00
fabs.ll
fadd64.ll AMDGPU: Make v2i64/v2f64 legal types. 2015-11-25 19:58:34 +00:00
fadd.ll
fceil64.ll
fceil.ll
fcmp64.ll
fcmp-cnd.ll
fcmp-cnde-int-args.ll
fcmp.ll
fconst64.ll
fcopysign.f32.ll
fcopysign.f64.ll
fdiv.f64.ll
fdiv.ll
fetch-limits.r600.ll
fetch-limits.r700+.ll
ffloor.f64.ll
ffloor.ll
flat-address-space.ll [AMDGPU] Assembler: Swap operands of flat_store instructions to match AMD assembler 2016-02-12 17:57:54 +00:00
flat-scratch-reg.ll AMDGPU/SI: xnack_mask is always reserved on VI 2016-01-07 17:10:20 +00:00
floor.ll
fma-combine.ll AMDGPU: Remove some old intrinsic uses from tests 2016-02-11 06:02:01 +00:00
fma.f64.ll
fma.ll
fmad.ll
fmax3.f64.ll
fmax3.ll
fmax_legacy.f64.ll AMDGPU: Remove some old intrinsic uses from tests 2016-02-11 06:02:01 +00:00
fmax_legacy.ll AMDGPU: Fix constant bus use check with subregisters 2016-02-11 06:15:39 +00:00
fmax.ll
fmaxnum.f64.ll
fmaxnum.ll
fmed3.ll AMDGPU: Match fmed3 patterns with legacy fmin/fmax 2016-01-28 20:53:48 +00:00
fmin3.ll
fmin_legacy.f64.ll AMDGPU: Remove some old intrinsic uses from tests 2016-02-11 06:02:01 +00:00
fmin_legacy.ll AMDGPU: Fix constant bus use check with subregisters 2016-02-11 06:15:39 +00:00
fmin.ll
fminnum.f64.ll
fminnum.ll
fmul64.ll
fmul-2-combine-multi-use.ll
fmul.ll
fmuladd.ll AMDGPU: Remove some old intrinsic uses from tests 2016-02-11 06:02:01 +00:00
fnearbyint.ll
fneg-fabs.f64.ll
fneg-fabs.ll
fneg.f64.ll
fneg.ll
fp16_to_fp.ll
fp32_to_fp16.ll
fp_to_sint.f64.ll AMDGPU: Remove some old intrinsic uses from tests 2016-02-11 06:02:01 +00:00
fp_to_sint.ll
fp_to_uint.f64.ll AMDGPU: Remove some old intrinsic uses from tests 2016-02-11 06:02:01 +00:00
fp_to_uint.ll
fp-classify.ll AMDGPU: Remove some old intrinsic uses from tests 2016-02-11 06:02:01 +00:00
fpext.ll
fptrunc.ll
fract.f64.ll AMDGPU: Remove AMDGPU.fract intrinsic 2016-01-22 18:42:38 +00:00
fract.ll AMDGPU: Remove AMDGPU.fract intrinsic 2016-01-22 18:42:38 +00:00
frem.ll
fsqrt.ll
fsub64.ll
fsub.ll AMDGPU/SI: Fold operands with sub-registers 2016-01-07 17:10:29 +00:00
ftrunc.f64.ll
ftrunc.ll
gep-address-space.ll
global_atomics.ll AMDGPU: Set flat_scratch from flat_scratch_init reg 2016-02-12 06:31:30 +00:00
global-constant.ll AMDGPU/SI: Emit constant variables in the .hsatext section when targeting HSA 2015-12-15 22:39:36 +00:00
global-directive.ll
global-extload-i1.ll
global-extload-i8.ll
global-extload-i16.ll
global-extload-i32.ll AMDGPU: Make v2i64/v2f64 legal types. 2015-11-25 19:58:34 +00:00
global-zero-initializer.ll Refactor backend diagnostics for unsupported features 2016-02-02 13:52:43 +00:00
gv-const-addrspace-fail.ll
gv-const-addrspace.ll
half.ll AMDGPU: Reduce 64-bit lshr by constant to 32-bit 2016-01-18 21:43:36 +00:00
hsa-default-device.ll AMDGPU: Fix default device handling 2016-01-27 02:17:49 +00:00
hsa-fp-mode.ll AMDGPU: Set DX10Clamp bit 2016-01-28 20:53:35 +00:00
hsa-globals.ll AMDGPU/SI: Emit global variable sizes when targeting HSA 2016-01-08 14:50:28 +00:00
hsa-group-segment.ll AMDGPU/SI: Don't emit group segment global variables 2015-12-02 17:00:42 +00:00
hsa-note-no-func.ll AMDGPU/SI: Update ISA version for FIJI 2016-01-13 20:39:25 +00:00
hsa.ll [AMDGPU] Assembler: Swap operands of flat_store instructions to match AMD assembler 2016-02-12 17:57:54 +00:00
i1-copy-implicit-def.ll AMDGPU/SI: Detect uniform branches and emit s_cbranch instructions 2016-02-12 23:45:29 +00:00
i1-copy-phi.ll AMDGPU/SI: Detect uniform branches and emit s_cbranch instructions 2016-02-12 23:45:29 +00:00
i8-to-double-to-float.ll
icmp64.ll
icmp-select-sete-reverse-args.ll
image-attributes.ll ScheduleDAGInstrs: Rework schedule graph builder. 2015-12-04 01:51:19 +00:00
image-resource-id.ll
imm.ll
indirect-addressing-si.ll AMDGPU: Remove some old intrinsic uses from tests 2016-02-11 06:02:01 +00:00
indirect-private-64.ll AMDGPU: Remove some old intrinsic uses from tests 2016-02-11 06:02:01 +00:00
infinite-loop-evergreen.ll
infinite-loop.ll
inline-asm.ll AMDGPU/SI: Detect uniform branches and emit s_cbranch instructions 2016-02-12 23:45:29 +00:00
inline-calls.ll
inline-constraints.ll AMDGPU/SI: Add support for sgpr and vgpr inline assembly constraints 2015-12-10 02:12:53 +00:00
input-mods.ll
insert_subreg.ll
insert_vector_elt.ll AMDGPU: Make v2i64/v2f64 legal types. 2015-11-25 19:58:34 +00:00
invariant-load-no-alias-store.ll
jump-address.ll
kcache-fold.ll AMDGPU: Replace some deprecated intrinsic uses in tests 2016-01-23 05:42:49 +00:00
kernel-args.ll AMDGPU: Remove SIPrepareScratchRegs 2015-11-30 21:15:53 +00:00
large-alloca-compute.ll AMDGPU: Set flat_scratch from flat_scratch_init reg 2016-02-12 06:31:30 +00:00
large-alloca-graphics.ll AMDGPU: Set element_size in private resource descriptor 2016-02-12 02:40:47 +00:00
large-constant-initializer.ll
lds-alignment.ll AMDGPU: Account for LDS alignment 2016-02-05 19:47:29 +00:00
lds-initializer.ll Refactor backend diagnostics for unsupported features 2016-02-02 13:52:43 +00:00
lds-oqap-crash.ll
lds-output-queue.ll
lds-size.ll
lds-zero-initializer.ll Refactor backend diagnostics for unsupported features 2016-02-02 13:52:43 +00:00
legalizedag-bug-expand-setcc.ll
lit.local.cfg
literals.ll ScheduleDAGInstrs: Rework schedule graph builder. 2015-12-04 01:51:19 +00:00
llvm.amdgcn.buffer.wbinvl1.ll
llvm.amdgcn.buffer.wbinvl1.sc.ll
llvm.amdgcn.buffer.wbinvl1.vol.ll
llvm.amdgcn.class.ll AMDGPU: Remove some old intrinsic uses from tests 2016-02-11 06:02:01 +00:00
llvm.amdgcn.cos.ll AMDGPU: Add intrinsics for sin/cos 2016-02-13 01:19:56 +00:00
llvm.amdgcn.cubeid.ll AMDGPU: Add new amdgcn intrinsics for cube instructions 2016-01-26 04:29:56 +00:00
llvm.amdgcn.cubema.ll AMDGPU: Add new amdgcn intrinsics for cube instructions 2016-01-26 04:29:56 +00:00
llvm.amdgcn.cubesc.ll AMDGPU: Add new amdgcn intrinsics for cube instructions 2016-01-26 04:29:56 +00:00
llvm.amdgcn.cubetc.ll AMDGPU: Add new amdgcn intrinsics for cube instructions 2016-01-26 04:29:56 +00:00
llvm.amdgcn.dispatch.ptr.ll Refactor backend diagnostics for unsupported features 2016-02-02 13:52:43 +00:00
llvm.amdgcn.div.fixup.ll AMDGPU: Rename intrinsics to use amdgcn prefix 2016-01-22 21:30:34 +00:00
llvm.amdgcn.div.fmas.ll AMDGPU: Remove some old intrinsic uses from tests 2016-02-11 06:02:01 +00:00
llvm.amdgcn.div.scale.ll AMDGPU: Remove some old intrinsic uses from tests 2016-02-11 06:02:01 +00:00
llvm.amdgcn.image.ll AMDGPU/SI: add llvm.amdgcn.image.load/store[.mip] intrinsics 2016-02-18 16:44:18 +00:00
llvm.amdgcn.interp.ll AMDGPU/SI: Add llvm.amdgcn.v.interp.p[12] intrinsics 2015-12-15 17:02:49 +00:00
llvm.amdgcn.ldexp.ll AMDGPU: Rename intrinsics to use amdgcn prefix 2016-01-22 21:30:34 +00:00
llvm.amdgcn.log.clamp.ll AMDGPU: Add intrinsics for sin/cos 2016-02-13 01:19:56 +00:00
llvm.amdgcn.mbcnt.ll AMDGPU/SI: Add llvm.amdgcn.mbcnt.* intrinsics 2015-12-15 17:02:52 +00:00
llvm.amdgcn.mov.dpp.ll AMDGPU/SI: Add llvm.amdgcn.mov.dpp intrinsic 2016-02-13 02:09:49 +00:00
llvm.amdgcn.rcp.ll AMDGPU: Rename intrinsics to use amdgcn prefix 2016-01-22 21:30:34 +00:00
llvm.amdgcn.read.workdim.ll AMDGPU: Rename intrinsics to use amdgcn prefix 2016-01-22 21:30:34 +00:00
llvm.amdgcn.rsq.clamp.ll AMDGPU: Rename intrinsic to better match instruction name 2016-02-13 01:03:00 +00:00
llvm.amdgcn.rsq.ll AMDGPU: Rename intrinsics to use amdgcn prefix 2016-01-22 21:30:34 +00:00
llvm.amdgcn.s.barrier.ll AMDGPU: Remove some old intrinsic uses from tests 2016-02-11 06:02:01 +00:00
llvm.amdgcn.s.dcache.inv.ll
llvm.amdgcn.s.dcache.inv.vol.ll
llvm.amdgcn.s.dcache.wb.ll
llvm.amdgcn.s.dcache.wb.vol.ll
llvm.amdgcn.sin.ll AMDGPU: Add intrinsics for sin/cos 2016-02-13 01:19:56 +00:00
llvm.amdgcn.trig.preop.ll AMDGPU: Rename intrinsics to use amdgcn prefix 2016-01-22 21:30:34 +00:00
llvm.amdgcn.workgroup.id.ll [AMDGPU] Assembler: Swap operands of flat_store instructions to match AMD assembler 2016-02-12 17:57:54 +00:00
llvm.amdgcn.workitem.id.ll [AMDGPU] Assembler: Swap operands of flat_store instructions to match AMD assembler 2016-02-12 17:57:54 +00:00
llvm.AMDGPU.barrier.global.ll
llvm.AMDGPU.barrier.local.ll
llvm.AMDGPU.bfe.i32.ll
llvm.AMDGPU.bfe.u32.ll
llvm.AMDGPU.clamp.ll
llvm.AMDGPU.cube.ll AMDGPU: Add new amdgcn intrinsics for cube instructions 2016-01-26 04:29:56 +00:00
llvm.AMDGPU.cvt_f32_ubyte.ll
llvm.amdgpu.dp4.ll
llvm.AMDGPU.flbit.i32.ll
llvm.AMDGPU.kill.ll
llvm.amdgpu.kilp.ll
llvm.AMDGPU.rsq.clamped.f64.ll AMDGPU: Restore AMDGPU prefixed rsq intrinsic for now 2016-01-26 04:14:16 +00:00
llvm.AMDGPU.rsq.clamped.ll AMDGPU: Rename intrinsics to use amdgcn prefix 2016-01-22 21:30:34 +00:00
llvm.AMDGPU.rsq.ll AMDGPU: Restore AMDGPU prefixed rsq intrinsic for now 2016-01-26 04:14:16 +00:00
llvm.AMDGPU.tex.ll
llvm.cos.ll
llvm.dbg.value.ll AMDGPU/SI: Use flat for global load/store when targeting HSA 2015-12-22 20:55:23 +00:00
llvm.exp2.ll
llvm.log2.ll
llvm.memcpy.ll AMDGPU: Split LDS vector loads 2015-11-24 12:18:54 +00:00
llvm.pow.ll
llvm.r600.read.local.size.ll ScheduleDAGInstrs: Rework schedule graph builder. 2015-12-04 01:51:19 +00:00
llvm.r600.read.workdim.ll AMDGPU: Rename intrinsics to use amdgcn prefix 2016-01-22 21:30:34 +00:00
llvm.rint.f64.ll
llvm.rint.ll AMDGPU: Remove AMDIL.round.nearest intrinsic 2016-01-20 21:05:40 +00:00
llvm.round.f64.ll AMDGPU: Remove some old intrinsic uses from tests 2016-02-11 06:02:01 +00:00
llvm.round.ll
llvm.SI.fs.interp.ll AMDGPU/SI: Stoney has only 16 LDS banks 2016-01-27 11:19:45 +00:00
llvm.SI.gather4.ll AMDGPU: Make v32i8/v64i8 illegal types 2016-01-26 04:43:48 +00:00
llvm.SI.getlod.ll AMDGPU: Make v32i8/v64i8 illegal types 2016-01-26 04:43:48 +00:00
llvm.SI.image.ll
llvm.SI.image.sample-masked.ll AMDGPU: Remove old sample intrinsics 2016-01-26 04:38:08 +00:00
llvm.SI.image.sample.ll
llvm.SI.image.sample.o.ll
llvm.SI.load.dword.ll
llvm.SI.packf16.ll
llvm.SI.sendmsg-m0.ll
llvm.SI.sendmsg.ll
llvm.SI.tbuffer.store.ll
llvm.SI.tid.ll
llvm.sin.ll
llvm.sqrt.ll
load64.ll
load-i1.ll
load-input-fold.ll AMDGPU: Replace some deprecated intrinsic uses in tests 2016-01-23 05:42:49 +00:00
load.ll AMDGPU/SI: Select non-uniform constant addrspace loads to flat instructions for HSA 2016-01-05 03:40:16 +00:00
load.vec.ll
local-64.ll
local-atomics64.ll
local-atomics.ll
local-memory-two-objects.ll AMDGPU: Rework how private buffer passed for HSA 2015-11-30 21:16:03 +00:00
local-memory.ll AMDGPU: Rework how private buffer passed for HSA 2015-11-30 21:16:03 +00:00
loop-address.ll
loop-idiom.ll
lower-range-metadata-intrinsic-call.ll [AMDGPU] Assembler: Swap operands of flat_store instructions to match AMD assembler 2016-02-12 17:57:54 +00:00
lshl.ll
lshr.ll
m0-spill.ll
mad_int24.ll AMDGPU: Remove 24-bit intrinsics 2016-01-29 10:05:16 +00:00
mad_uint24.ll
mad-combine.ll AMDGPU: Remove some old intrinsic uses from tests 2016-02-11 06:02:01 +00:00
mad-sub.ll AMDGPU: Remove some old intrinsic uses from tests 2016-02-11 06:02:01 +00:00
madak.ll AMDGPU: Remove some old intrinsic uses from tests 2016-02-11 06:02:01 +00:00
madmk.ll AMDGPU/SI: Detect uniform branches and emit s_cbranch instructions 2016-02-12 23:45:29 +00:00
max3.ll AMDGPU: Remove some old intrinsic uses from tests 2016-02-11 06:02:01 +00:00
max-literals.ll
max.ll AMDGPU: Remove some old intrinsic uses from tests 2016-02-11 06:02:01 +00:00
merge-stores.ll AMDGPU: Remove some old intrinsic uses from tests 2016-02-11 06:02:01 +00:00
min3.ll AMDGPU: Remove some old intrinsic uses from tests 2016-02-11 06:02:01 +00:00
min.ll AMDGPU: Remove some old intrinsic uses from tests 2016-02-11 06:02:01 +00:00
missing-store.ll AMDGPU/SI: Use v_readfirstlane to legalize SMRD with VGPR base pointer 2016-02-20 00:37:25 +00:00
move-addr64-rsrc-dead-subreg-writes.ll AMDGPU/SI: Detect uniform branches and emit s_cbranch instructions 2016-02-12 23:45:29 +00:00
move-to-valu-atomicrmw.ll AMDGPU: Remove some old intrinsic uses from tests 2016-02-11 06:02:01 +00:00
mubuf.ll AMDGPU: Remove some old intrinsic uses from tests 2016-02-11 06:02:01 +00:00
mul_int24.ll
mul_uint24.ll
mul.ll
mulhu.ll
no-hsa-graphics-shaders.ll Refactor backend diagnostics for unsupported features 2016-02-02 13:52:43 +00:00
no-initializer-constant-addrspace.ll
no-shrink-extloads.ll AMDGPU: Remove some old intrinsic uses from tests 2016-02-11 06:02:01 +00:00
opencl-image-metadata.ll
operand-folding.ll AMDGPU: Remove some old intrinsic uses from tests 2016-02-11 06:02:01 +00:00
operand-spacing.ll
or.ll ScheduleDAGInstrs: Rework schedule graph builder. 2015-12-04 01:51:19 +00:00
packetizer.ll
parallelandifcollapse.ll
parallelorifcollapse.ll
partially-dead-super-register-immediate.ll AMDGPU: Remove some old intrinsic uses from tests 2016-02-11 06:02:01 +00:00
predicate-dp4.ll
predicates.ll
private-element-size.ll AMDGPU: Prepare for reducing private element size. 2016-02-13 04:18:53 +00:00
private-memory-atomics.ll AMDGPU: Do not promote allocas with non-inbounds GEPs 2016-02-02 21:16:12 +00:00
private-memory-broken.ll
private-memory-r600.ll AMDGPU: Do not promote allocas with non-inbounds GEPs 2016-02-02 21:16:12 +00:00
private-memory.ll AMDGPU: Set flat_scratch from flat_scratch_init reg 2016-02-12 06:31:30 +00:00
promote-alloca-bitcast-function.ll Refactor backend diagnostics for unsupported features 2016-02-02 13:52:43 +00:00
promote-alloca-invariant-markers.ll AMDGPU: Fix crash with invariant markers 2016-01-22 19:47:54 +00:00
promote-alloca-mem-intrinsics.ll AMDGPU: Preserve alignments on new created globals 2016-02-05 19:47:23 +00:00
promote-alloca-no-opts.ll AMDGPU: Skip promote alloca with no optimizations 2016-02-02 19:32:42 +00:00
promote-alloca-stored-pointer-value.ll
promote-alloca-unhandled-intrinsic.ll AMDGPU: Whitelist handled intrinsics 2016-02-02 19:18:53 +00:00
pv-packing.ll
pv.ll AMDGPU: Rename intrinsics to use amdgcn prefix 2016-01-22 21:30:34 +00:00
r600-encoding.ll
r600-export-fix.ll
r600-infinite-loop-bug-while-reorganizing-vector.ll
r600cfg.ll
rcp-pattern.ll AMDGPU: Rename intrinsics to use amdgcn prefix 2016-01-22 21:30:34 +00:00
read_register.ll AMDGPU: Implement read_register and write_register intrinsics 2016-01-26 04:29:24 +00:00
read-register-invalid-subtarget.ll AMDGPU: Implement read_register and write_register intrinsics 2016-01-26 04:29:24 +00:00
read-register-invalid-type-i32.ll AMDGPU: Implement read_register and write_register intrinsics 2016-01-26 04:29:24 +00:00
read-register-invalid-type-i64.ll AMDGPU: Implement read_register and write_register intrinsics 2016-01-26 04:29:24 +00:00
README
reciprocal.ll
register-count-comments.ll AMDGPU/SI: Use flat for global load/store when targeting HSA 2015-12-22 20:55:23 +00:00
reorder-stores.ll AMDGPU: Make v2i64/v2f64 legal types. 2015-11-25 19:58:34 +00:00
ret.ll AMDGPU/SI: Fix a GPU hang with POS_W_FLOAT enabled 2016-01-13 17:23:20 +00:00
rotl.i64.ll
rotl.ll
rotr.i64.ll
rotr.ll
rsq.ll AMDGPU: Remove some old intrinsic uses from tests 2016-02-11 06:02:01 +00:00
rv7x0_count3.ll
s_movk_i32.ll
saddo.ll
salu-to-valu.ll AMDGPU/SI: Use v_readfirstlane to legalize SMRD with VGPR base pointer 2016-02-20 00:37:25 +00:00
sampler-resource-id.ll
scalar_to_vector.ll
schedule-fs-loop-nested-if.ll AMDGPU: Replace some deprecated intrinsic uses in tests 2016-01-23 05:42:49 +00:00
schedule-fs-loop-nested.ll AMDGPU: Replace some deprecated intrinsic uses in tests 2016-01-23 05:42:49 +00:00
schedule-fs-loop.ll AMDGPU: Replace some deprecated intrinsic uses in tests 2016-01-23 05:42:49 +00:00
schedule-global-loads.ll AMDGPU: Remove some old intrinsic uses from tests 2016-02-11 06:02:01 +00:00
schedule-if-2.ll
schedule-if.ll
schedule-kernel-arg-loads.ll
schedule-vs-if-nested-loop-failure.ll AMDGPU: Switch barrier intrinsics to using convergent 2015-12-19 01:46:41 +00:00
schedule-vs-if-nested-loop.ll
scratch-buffer.ll
sdiv.ll
sdivrem24.ll
sdivrem64.ll
select64.ll
select-i1.ll
select-vectors.ll
select.ll
selectcc-cnd.ll
selectcc-cnde-int.ll
selectcc-icmp-select-float.ll
selectcc-opt.ll
selectcc.ll
set-dx10.ll ScheduleDAGInstrs: Rework schedule graph builder. 2015-12-04 01:51:19 +00:00
setcc64.ll
setcc-equivalent.ll
setcc-opt.ll AMDGPU/SI: Prevent the DAGCombiner from creating setcc with i1 inputs 2016-01-20 00:13:22 +00:00
setcc.ll AMDGPU/SI: Detect uniform branches and emit s_cbranch instructions 2016-02-12 23:45:29 +00:00
seto.ll
setuo.ll
sext-eliminate.ll
sext-in-reg.ll AMDGPU: Remove min/max intrinsics 2016-01-20 20:50:19 +00:00
sgpr-control-flow.ll AMDGPU: Remove some old intrinsic uses from tests 2016-02-11 06:02:01 +00:00
sgpr-copy-duplicate-operand.ll
sgpr-copy.ll AMDGPU/SI: Make sure MIMG descriptors and samplers stay in SGPRs 2016-02-11 21:45:07 +00:00
shared-op-cycle.ll
shift-i64-opts.ll AMDGPU: Reduce 64-bit SRAs 2016-01-18 22:09:04 +00:00
shl_add_constant.ll AMDGPU: Remove some old intrinsic uses from tests 2016-02-11 06:02:01 +00:00
shl_add_ptr.ll AMDGPU: Remove some old intrinsic uses from tests 2016-02-11 06:02:01 +00:00
shl.ll AMDGPU: Split 64-bit and of constant up 2016-01-18 22:01:13 +00:00
si-annotate-cf-assertion.ll
si-annotate-cf.ll AMDGPU/SI: Detect uniform branches and emit s_cbranch instructions 2016-02-12 23:45:29 +00:00
si-annotate-cfg-loop-assert.ll AMDGPU/SI: Annotate Loops with Constant Condition in SIAnnotateControlFlow pass. 2016-02-12 17:11:04 +00:00
si-instr-info-correct-implicit-operands.ll AMDGPU: Don't reserve SCRATCH_PTR input register 2015-11-30 15:46:47 +00:00
si-literal-folding.ll
si-lod-bias.ll AMDGPU: Remove old sample intrinsics 2016-01-26 04:38:08 +00:00
si-scheduler.ll AMDGPU: Remove old sample intrinsics 2016-01-26 04:38:08 +00:00
si-sgpr-spill.ll AMDGPU: Remove old sample intrinsics 2016-01-26 04:38:08 +00:00
si-spill-cf.ll AMDGPU/SI: Detect uniform branches and emit s_cbranch instructions 2016-02-12 23:45:29 +00:00
si-triv-disjoint-mem-access.ll AMDGPU/SI: Use v_readfirstlane to legalize SMRD with VGPR base pointer 2016-02-20 00:37:25 +00:00
si-vector-hang.ll
sign_extend.ll
simplify-demanded-bits-build-pair.ll
sint_to_fp.f64.ll AMDGPU: Remove some old intrinsic uses from tests 2016-02-11 06:02:01 +00:00
sint_to_fp.i64.ll [AMDGPU] Assembler: Swap operands of flat_store instructions to match AMD assembler 2016-02-12 17:57:54 +00:00
sint_to_fp.ll [AMDGPU] Assembler: Swap operands of flat_store instructions to match AMD assembler 2016-02-12 17:57:54 +00:00
smed3.ll AMDGPU: Match some med3 patterns 2016-01-28 20:53:42 +00:00
sminmax.ll SelectionDAG: Match min/max if the scalar operation is legal 2015-12-11 23:16:47 +00:00
smrd-vccz-bug.ll AMDGPU/SI: Detect uniform branches and emit s_cbranch instructions 2016-02-12 23:45:29 +00:00
smrd.ll
spill-alloc-sgpr-init-bug.ll AMDGPU/SI: Do not move scratch resource register on Tonga & Iceland 2016-01-05 20:42:49 +00:00
spill-scavenge-offset.ll AMDGPU: Quick fix for extreme slowness in spill-scavenge-offset.ll test 2016-02-12 00:05:34 +00:00
split-scalar-i64-add.ll AMDGPU: Remove some old intrinsic uses from tests 2016-02-11 06:02:01 +00:00
split-smrd.ll AMDGPU/SI: Make sure MIMG descriptors and samplers stay in SGPRs 2016-02-11 21:45:07 +00:00
split-vector-memoperand-offsets.ll AMDGPU: Remove some old intrinsic uses from tests 2016-02-11 06:02:01 +00:00
sra.ll [AMDGPU] Assembler: Swap operands of flat_store instructions to match AMD assembler 2016-02-12 17:57:54 +00:00
srem.ll
srl.ll ScheduleDAGInstrs: Rework schedule graph builder. 2015-12-04 01:51:19 +00:00
ssubo.ll
store_typed.ll
store-barrier.ll AMDGPU: Remove some old intrinsic uses from tests 2016-02-11 06:02:01 +00:00
store-v3i32.ll
store-v3i64.ll
store-vector-ptrs.ll
store.ll AMDGPU: Split LDS vector loads 2015-11-24 12:18:54 +00:00
store.r600.ll
structurize1.ll
structurize.ll
sub.ll
subreg-coalescer-crash.ll AMDGPU: Remove old sample intrinsics 2016-01-26 04:38:08 +00:00
subreg-coalescer-undef-use.ll AMDGPU/SI: Detect uniform branches and emit s_cbranch instructions 2016-02-12 23:45:29 +00:00
subreg-eliminate-dead.ll
swizzle-export.ll
tex-clause-antidep.ll AMDGPU: Rename some r600 intrinsics to use correct TargetPrefix 2016-01-22 19:00:09 +00:00
texture-input-merge.ll AMDGPU: Rename some r600 intrinsics to use correct TargetPrefix 2016-01-22 19:00:09 +00:00
trunc-cmp-constant.ll AMDGPU/SI: Prevent the DAGCombiner from creating setcc with i1 inputs 2016-01-20 00:13:22 +00:00
trunc-store-f64-to-f16.ll
trunc-store-i1.ll
trunc-store.ll
trunc-vector-store-assertion-failure.ll
trunc.ll
tti-unroll-prefs.ll
uaddo.ll
udiv.ll AMDGPU: Cleanup udiv test 2016-01-11 21:18:40 +00:00
udivrem24.ll
udivrem64.ll
udivrem.ll
uint_to_fp.f64.ll AMDGPU: Remove some old intrinsic uses from tests 2016-02-11 06:02:01 +00:00
uint_to_fp.i64.ll [AMDGPU] Assembler: Swap operands of flat_store instructions to match AMD assembler 2016-02-12 17:57:54 +00:00
uint_to_fp.ll [AMDGPU] Assembler: Swap operands of flat_store instructions to match AMD assembler 2016-02-12 17:57:54 +00:00
umed3.ll AMDGPU: Match some med3 patterns 2016-01-28 20:53:42 +00:00
unaligned-load-store.ll
unhandled-loop-condition-assertion.ll
uniform-cfg.ll AMDGPU/SI: Detect uniform branches and emit s_cbranch instructions 2016-02-12 23:45:29 +00:00
uniform-crash.ll AMDGPU/SI: Detect uniform branches and emit s_cbranch instructions 2016-02-12 23:45:29 +00:00
unroll.ll
unsupported-cc.ll ScheduleDAGInstrs: Rework schedule graph builder. 2015-12-04 01:51:19 +00:00
urecip.ll
urem.ll
use-sgpr-multiple-times.ll AMDGPU: Remove 24-bit intrinsics 2016-01-29 10:05:16 +00:00
usubo.ll
v1i64-kernel-arg.ll
v_cndmask.ll AMDGPU: Remove some old intrinsic uses from tests 2016-02-11 06:02:01 +00:00
v_mac.ll
valu-i1.ll AMDGPU/SI: Detect uniform branches and emit s_cbranch instructions 2016-02-12 23:45:29 +00:00
vector-alloca.ll
vertex-fetch-encoding.ll
vgpr-spill-emergency-stack-slot-compute.ll AMDGPU: Prepare for reducing private element size. 2016-02-13 04:18:53 +00:00
vgpr-spill-emergency-stack-slot.ll AMDGPU: Prepare for reducing private element size. 2016-02-13 04:18:53 +00:00
vop-shrink.ll AMDGPU: Remove some old intrinsic uses from tests 2016-02-11 06:02:01 +00:00
vselect64.ll
vselect.ll
vtx-fetch-branch.ll
vtx-schedule.ll
wait.ll AMDGPU: Remove some old intrinsic uses from tests 2016-02-11 06:02:01 +00:00
waitcnt-flat.ll AMDGPU/SI: Fix s_waitcnt insertion for flat instructions 2016-02-19 15:33:13 +00:00
work-item-intrinsics.ll AMDGPU: Add new amdgcn workitem intrinsics 2016-01-30 04:25:19 +00:00
write_register.ll AMDGPU: Implement read_register and write_register intrinsics 2016-01-26 04:29:24 +00:00
write-register-vgpr-into-sgpr.ll AMDGPU: Remove some old intrinsic uses from tests 2016-02-11 06:02:01 +00:00
wrong-transalu-pos-fix.ll
xor.ll ScheduleDAGInstrs: Rework schedule graph builder. 2015-12-04 01:51:19 +00:00
zero_extend.ll

README 

+==============================================================================+
| How to organize the lit tests                                                |
+==============================================================================+

- If you write a test for matching a single DAG opcode or intrinsic, it should
  go in a file called {opcode_name,intrinsic_name}.ll (e.g. fadd.ll)

- If you write a test that matches several DAG opcodes and checks for a single
  ISA instruction, then that test should go in a file called {ISA_name}.ll (e.g.
  bfi_int.ll

- For all other tests, use your best judgement for organizing tests and naming
  the files.

+==============================================================================+
| Naming conventions                                                           |
+==============================================================================+

- Use dash '-' and not underscore '_' to separate words in file names, unless
  the file is named after a DAG opcode or ISA instruction that has an
  underscore '_' in its name.