.. |
intrinsics
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[Hexagon] New HVX target features.
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2017-10-18 18:07:07 +00:00 |
loop-idiom
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[Hexagon] New HVX target features.
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2017-10-18 18:07:07 +00:00 |
vect
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[Hexagon] Reorganize and update instruction patterns
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2017-10-20 19:33:12 +00:00 |
absaddr-store.ll
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absimm.ll
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adde.ll
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[Hexagon] Propagate zext of i1 into arithmetic code in selection DAG
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2017-03-09 16:29:30 +00:00 |
addh-sext-trunc.ll
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[Hexagon] Replace instruction definitions with auto-generated ones
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2017-02-10 15:33:13 +00:00 |
addh-shifted.ll
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[Hexagon] Replace instruction definitions with auto-generated ones
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2017-02-10 15:33:13 +00:00 |
addh.ll
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[Hexagon] Replace instruction definitions with auto-generated ones
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2017-02-10 15:33:13 +00:00 |
addr-calc-opt.ll
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addrmode-globoff.mir
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[Hexagon] Generate proper offset in opt-addr-mode
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2017-04-19 15:15:51 +00:00 |
addrmode-indoff.ll
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[Hexagon] Reorganize and update instruction patterns
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2017-10-20 19:33:12 +00:00 |
addrmode-keepdeadphis.mir
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[Hexagon] Keep all phi nodes when building DFG in addr-mode-opt
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2017-06-29 15:55:59 +00:00 |
addrmode-rr-to-io.mir
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[Hexagon] Fix store conversion from rr to io in optimize addressing modes
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2017-10-19 16:59:22 +00:00 |
adjust-latency-stackST.ll
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[Hexagon] Adjust latency between allocframe and the first store on stack
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2017-05-03 15:33:09 +00:00 |
alu64.ll
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[Hexagon] Replace instruction definitions with auto-generated ones
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2017-02-10 15:33:13 +00:00 |
always-ext.ll
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anti-dep-partial.mir
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args.ll
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[Hexagon] Replace instruction definitions with auto-generated ones
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2017-02-10 15:33:13 +00:00 |
ashift-left-right.ll
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Atomics.ll
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avoid-predspill-calleesaved.ll
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[Hexagon] Start using regmasks on calls
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2017-02-17 22:14:51 +00:00 |
avoid-predspill.ll
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bank-conflict-load.mir
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[Hexagon] Check for potential bank conflicts in post-RA scheduling
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2017-08-28 18:36:21 +00:00 |
barrier-flag.ll
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base-offset-addr.ll
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base-offset-post.ll
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bit-bitsplit-at.ll
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[Hexagon] New HVX target features.
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2017-10-18 18:07:07 +00:00 |
bit-bitsplit-src.ll
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[Hexagon] New HVX target features.
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2017-10-18 18:07:07 +00:00 |
bit-bitsplit.ll
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[Hexagon] New HVX target features.
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2017-10-18 18:07:07 +00:00 |
bit-eval.ll
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[Hexagon] Replace instruction definitions with auto-generated ones
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2017-02-10 15:33:13 +00:00 |
bit-ext-sat.ll
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[Hexagon] New HVX target features.
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2017-10-18 18:07:07 +00:00 |
bit-extract-off.ll
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[Hexagon] New HVX target features.
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2017-10-18 18:07:07 +00:00 |
bit-extract.ll
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[Hexagon] New HVX target features.
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2017-10-18 18:07:07 +00:00 |
bit-extractu-half.ll
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bit-gen-rseq.ll
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bit-has.ll
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[Hexagon] New HVX target features.
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2017-10-18 18:07:07 +00:00 |
bit-loop-rc-mismatch.ll
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[Hexagon] New HVX target features.
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2017-10-18 18:07:07 +00:00 |
bit-loop.ll
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bit-phi.ll
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[Hexagon] Do not insert instructions before PHI nodes
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2017-03-07 14:20:19 +00:00 |
bit-rie.ll
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[Hexagon] New HVX target features.
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2017-10-18 18:07:07 +00:00 |
bit-skip-byval.ll
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[Hexagon] Replace instruction definitions with auto-generated ones
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2017-02-10 15:33:13 +00:00 |
bit-validate-reg.ll
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[Hexagon] Generate extract instructions more aggressively
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2017-02-28 23:27:33 +00:00 |
bit-visit-flowq.ll
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bitconvert-vector.ll
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[Hexagon] New HVX target features.
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2017-10-18 18:07:07 +00:00 |
bitmanip.ll
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[Hexagon] Patterns for CTPOP, BSWAP and BITREVERSE
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2017-02-23 15:02:09 +00:00 |
block-addr.ll
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[Hexagon] Reorganize and update instruction patterns
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2017-10-20 19:33:12 +00:00 |
block-ranges-nodef.ll
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branch-folder-hoist-kills.mir
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[IfConversion] More simple, correct dead/kill liveness handling
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2017-09-14 15:53:11 +00:00 |
branch-non-mbb.ll
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branchfolder-insert-impdef.mir
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Insert IMPLICIT_DEFS for undef uses in tail merging
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2017-09-06 20:45:24 +00:00 |
branchfolder-keep-impdef.ll
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[Hexagon] Replace instruction definitions with auto-generated ones
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2017-02-10 15:33:13 +00:00 |
BranchPredict.ll
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[Hexagon] Replace instruction definitions with auto-generated ones
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2017-02-10 15:33:13 +00:00 |
brev_ld.ll
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[Hexagon] Replace instruction definitions with auto-generated ones
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2017-02-10 15:33:13 +00:00 |
brev_st.ll
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[Hexagon] Replace instruction definitions with auto-generated ones
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2017-02-10 15:33:13 +00:00 |
bugAsmHWloop.ll
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build-vector-shuffle.ll
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[Hexagon] New HVX target features.
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2017-10-18 18:07:07 +00:00 |
builtin-expect.ll
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[Hexagon] New HVX target features.
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2017-10-18 18:07:07 +00:00 |
builtin-prefetch-offset.ll
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builtin-prefetch.ll
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calling-conv-2.ll
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callr-dep-edge.ll
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cext-check.ll
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cext-opt-basic.mir
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[Hexagon] Minimize number of repeated constant extenders
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2017-10-13 19:02:59 +00:00 |
cext-valid-packet1.ll
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[Hexagon] Replace instruction definitions with auto-generated ones
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2017-02-10 15:33:13 +00:00 |
cext-valid-packet2.ll
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cext.ll
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cexti16.ll
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cfgopt-fall-through.ll
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[Hexagon] New HVX target features.
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2017-10-18 18:07:07 +00:00 |
cfi-late.ll
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cfi-offset.ll
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[Hexagon] New HVX target features.
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2017-10-18 18:07:07 +00:00 |
checktabs.ll
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circ_ld.ll
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[Hexagon] Replace instruction definitions with auto-generated ones
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2017-02-10 15:33:13 +00:00 |
circ_ldd_bug.ll
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circ_ldw.ll
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[Hexagon] Replace instruction definitions with auto-generated ones
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2017-02-10 15:33:13 +00:00 |
circ_st.ll
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[Hexagon] Replace instruction definitions with auto-generated ones
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2017-02-10 15:33:13 +00:00 |
circ-load-isel.ll
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clr_set_toggle.ll
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[Hexagon] Replace instruction definitions with auto-generated ones
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2017-02-10 15:33:13 +00:00 |
cmp_pred2.ll
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cmp_pred_reg.ll
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cmp_pred.ll
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cmp-extend.ll
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cmp-promote.ll
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cmp-to-genreg.ll
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cmp-to-predreg.ll
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cmp.ll
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[Hexagon] Replace instruction definitions with auto-generated ones
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2017-02-10 15:33:13 +00:00 |
cmpb_pred.ll
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cmpb-dec-imm.ll
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[Hexagon] Add patterns for cmpb/cmph with immediate arguments
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2017-10-13 15:43:12 +00:00 |
cmpb-eq.ll
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cmph-gtu.ll
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[Hexagon] Add patterns for cmpb/cmph with immediate arguments
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2017-10-13 15:43:12 +00:00 |
combine_ir.ll
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combine.ll
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[Hexagon] Replace instruction definitions with auto-generated ones
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2017-02-10 15:33:13 +00:00 |
common-gep-basic.ll
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common-gep-icm.ll
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common-gep-inbounds.ll
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[Hexagon] New HVX target features.
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2017-10-18 18:07:07 +00:00 |
compound.ll
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[Hexagon] Start using regmasks on calls
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2017-02-17 22:14:51 +00:00 |
const64.ll
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const-pool-tf.ll
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[Hexagon] New HVX target features.
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2017-10-18 18:07:07 +00:00 |
constp-clb.ll
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constp-combine-neg.ll
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[Hexagon] Replace instruction definitions with auto-generated ones
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2017-02-10 15:33:13 +00:00 |
constp-ctb.ll
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constp-extract.ll
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constp-physreg.ll
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constp-rewrite-branches.ll
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constp-rseq.ll
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constp-vsplat.ll
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convert_const_i1_to_i8.ll
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[Hexagon] New HVX target features.
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2017-10-18 18:07:07 +00:00 |
convert-to-dot-old.ll
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[Hexagon] New HVX target features.
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2017-10-18 18:07:07 +00:00 |
convertdptoint.ll
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[Hexagon] Preclude non-memory test from being optimized away. NFC.
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2017-07-05 13:08:03 +00:00 |
convertdptoll.ll
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[Hexagon] Preclude non-memory test from being optimized away. NFC.
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2017-07-05 13:08:03 +00:00 |
convertsptoint.ll
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[Hexagon] Preclude non-memory test from being optimized away. NFC.
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2017-07-05 13:08:03 +00:00 |
convertsptoll.ll
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[Hexagon] Preclude non-memory test from being optimized away. NFC.
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2017-07-05 13:08:03 +00:00 |
copy-to-combine-dbg.ll
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csr-func-usedef.ll
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ctor.ll
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dadd.ll
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[Hexagon] Preclude non-memory test from being optimized away. NFC.
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2017-07-05 13:08:03 +00:00 |
dead-store-stack.ll
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[Hexagon] New HVX target features.
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2017-10-18 18:07:07 +00:00 |
dmul.ll
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[Hexagon] Preclude non-memory test from being optimized away. NFC.
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2017-07-05 13:08:03 +00:00 |
double.ll
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doubleconvert-ieee-rnd-near.ll
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[Hexagon] Preclude non-memory test from being optimized away. NFC.
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2017-07-05 13:08:03 +00:00 |
dsub.ll
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[Hexagon] Preclude non-memory test from being optimized away. NFC.
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2017-07-05 13:08:03 +00:00 |
dualstore.ll
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duplex-addi-global-imm.mir
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[Hexagon] Fix typo in a testcase
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2017-06-22 16:25:46 +00:00 |
duplex.ll
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early-if-conversion-bug1.ll
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early-if-debug.mir
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[Hexagon] Ignore DBG_VALUEs when counting instructions in hexagon-early-if
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2017-08-09 21:22:05 +00:00 |
early-if-merge-loop.ll
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[Hexagon] New HVX target features.
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2017-10-18 18:07:07 +00:00 |
early-if-phi-i1.ll
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[Hexagon] Add -march=hexagon to a testcase
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2017-03-21 16:59:40 +00:00 |
early-if-spare.ll
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early-if-vecpi.ll
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[Hexagon] New HVX target features.
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2017-10-18 18:07:07 +00:00 |
early-if-vecpred.ll
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[Hexagon] New HVX target features.
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2017-10-18 18:07:07 +00:00 |
early-if.ll
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eh_return.ll
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[Hexagon] Replace instruction definitions with auto-generated ones
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2017-02-10 15:33:13 +00:00 |
eliminate-pred-spill.ll
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[Hexagon] New HVX target features.
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2017-10-18 18:07:07 +00:00 |
expand-condsets-basic.ll
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expand-condsets-dead-bad.ll
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[Hexagon] New HVX target features.
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2017-10-18 18:07:07 +00:00 |
expand-condsets-dead-pred.ll
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[Hexagon] New HVX target features.
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2017-10-18 18:07:07 +00:00 |
expand-condsets-def-undef.mir
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expand-condsets-extend.ll
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expand-condsets-imm.mir
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[Hexagon] Handle more types of immediate operands in expand-condsets
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2017-06-21 19:21:30 +00:00 |
expand-condsets-impuse.mir
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expand-condsets-pred-undef.ll
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expand-condsets-rm-reg.mir
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Bring back 2>&1 redirection for this test
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2017-02-22 19:16:33 +00:00 |
expand-condsets-rm-segment.ll
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expand-condsets-same-inputs.mir
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expand-condsets-undef2.ll
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expand-condsets-undef.ll
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expand-condsets-undefvni.ll
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Missed a check for UndefVI in r306466
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2017-06-28 15:46:16 +00:00 |
expand-vselect-kill.ll
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[Hexagon] New HVX target features.
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2017-10-18 18:07:07 +00:00 |
expand-vstorerw-undef2.ll
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[Hexagon] New HVX target features.
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2017-10-18 18:07:07 +00:00 |
expand-vstorerw-undef.ll
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[Hexagon] New HVX target features.
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2017-10-18 18:07:07 +00:00 |
extload-combine.ll
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[Hexagon] Replace instruction definitions with auto-generated ones
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2017-02-10 15:33:13 +00:00 |
extract-basic.ll
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[Hexagon] Replace instruction definitions with auto-generated ones
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2017-02-10 15:33:13 +00:00 |
fadd.ll
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[Hexagon] Preclude non-memory test from being optimized away. NFC.
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2017-07-05 13:08:03 +00:00 |
fcmp.ll
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find-loop-instr.ll
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[Hexagon] New HVX target features.
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2017-10-18 18:07:07 +00:00 |
fixed-spill-mutable.ll
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float-amode.ll
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[Hexagon] Replace instruction definitions with auto-generated ones
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2017-02-10 15:33:13 +00:00 |
float.ll
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floatconvert-ieee-rnd-near.ll
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fminmax.ll
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[Hexagon] New HVX target features.
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2017-10-18 18:07:07 +00:00 |
fmul.ll
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[Hexagon] Preclude non-memory test from being optimized away. NFC.
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2017-07-05 13:08:03 +00:00 |
fpelim-basic.ll
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[Hexagon] Implement frame pointer elimination with -fomit-frame-pointer
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2017-06-30 21:21:40 +00:00 |
frame-offset-overflow.ll
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[Hexagon] New HVX target features.
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2017-10-18 18:07:07 +00:00 |
fsel.ll
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[Hexagon] Replace instruction definitions with auto-generated ones
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2017-02-10 15:33:13 +00:00 |
fsub.ll
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[Hexagon] Preclude non-memory test from being optimized away. NFC.
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2017-07-05 13:08:03 +00:00 |
fusedandshift.ll
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[Hexagon] Generate extract instructions more aggressively
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2017-02-28 23:27:33 +00:00 |
gp-plus-offset-load.ll
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gp-plus-offset-store.ll
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gp-rel.ll
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[Hexagon] Adding gp+ to the syntax of gp-relative instructions
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2017-02-06 23:18:57 +00:00 |
hasfp-crash1.ll
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[Hexagon] New HVX target features.
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2017-10-18 18:07:07 +00:00 |
hasfp-crash2.ll
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[Hexagon] New HVX target features.
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2017-10-18 18:07:07 +00:00 |
hexagon_vector_loop_carried_reuse_constant.ll
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[Hexagon] New HVX target features.
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2017-10-18 18:07:07 +00:00 |
hexagon_vector_loop_carried_reuse.ll
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[Hexagon] New HVX target features.
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2017-10-18 18:07:07 +00:00 |
hvx-nontemporal.ll
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[Hexagon] New HVX target features.
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2017-10-18 18:07:07 +00:00 |
hwloop1.ll
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[Hexagon] Replace instruction definitions with auto-generated ones
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2017-02-10 15:33:13 +00:00 |
hwloop2.ll
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[Hexagon] Replace instruction definitions with auto-generated ones
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2017-02-10 15:33:13 +00:00 |
hwloop3.ll
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hwloop4.ll
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[Hexagon] Replace instruction definitions with auto-generated ones
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2017-02-10 15:33:13 +00:00 |
hwloop5.ll
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[Hexagon] Replace instruction definitions with auto-generated ones
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2017-02-10 15:33:13 +00:00 |
hwloop-cleanup.ll
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[Hexagon] Replace instruction definitions with auto-generated ones
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2017-02-10 15:33:13 +00:00 |
hwloop-const.ll
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hwloop-crit-edge.ll
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hwloop-dbg.ll
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hwloop-le.ll
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hwloop-loop1.ll
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[Hexagon] Reorganize and update instruction patterns
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2017-10-20 19:33:12 +00:00 |
hwloop-lt1.ll
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hwloop-lt.ll
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hwloop-missed.ll
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hwloop-ne.ll
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hwloop-noreturn-call.ll
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[Hexagon] New HVX target features.
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2017-10-18 18:07:07 +00:00 |
hwloop-ph-deadcode.ll
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hwloop-pos-ivbump1.ll
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hwloop-preh.ll
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[Hexagon] New HVX target features.
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2017-10-18 18:07:07 +00:00 |
hwloop-preheader.ll
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hwloop-range.ll
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hwloop-recursion.ll
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hwloop-redef-imm.mir
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[Hexagon] Allow redefinition with immediates for hw loop conversion
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2017-10-20 16:56:33 +00:00 |
hwloop-wrap2.ll
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hwloop-wrap.ll
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i1_VarArg.ll
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i8_VarArg.ll
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i16_VarArg.ll
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idxload-with-zero-offset.ll
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ifcvt-common-kill.mir
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[IfConversion] Remove kill flags from common instructions as well
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2017-09-06 17:57:13 +00:00 |
ifcvt-diamond-bad.ll
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ifcvt-diamond-bug-2016-08-26.ll
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[Hexagon] Reorganize and update instruction patterns
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2017-10-20 19:33:12 +00:00 |
ifcvt-edge-weight.ll
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ifcvt-impuse-livein.mir
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[IfConversion] More simple, correct dead/kill liveness handling
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2017-09-14 15:53:11 +00:00 |
ifcvt-live-subreg.mir
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[IfConversion] More simple, correct dead/kill liveness handling
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2017-09-14 15:53:11 +00:00 |
ifcvt-simple-bprob.ll
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[IfConversion] Only renormalize probabilities if branches are analyzable
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2017-03-06 19:12:42 +00:00 |
indirect-br.ll
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inline-asm-a.ll
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[Hexagon] Add inline-asm constraint 'a' for modifier register class
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2017-07-21 17:51:27 +00:00 |
inline-asm-hexagon.ll
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inline-asm-i1.ll
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inline-asm-qv.ll
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[Hexagon] New HVX target features.
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2017-10-18 18:07:07 +00:00 |
inline-asm-vecpred128.ll
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[Hexagon] New HVX target features.
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2017-10-18 18:07:07 +00:00 |
insert4.ll
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[Hexagon] Replace instruction definitions with auto-generated ones
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2017-02-10 15:33:13 +00:00 |
insert-basic.ll
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[Hexagon] Replace instruction definitions with auto-generated ones
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2017-02-10 15:33:13 +00:00 |
invalid-dotnew-attempt.mir
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[Hexagon] Fix dependence check in the packetizer
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2017-06-01 18:02:40 +00:00 |
is-legal-void.ll
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isel-exti1.ll
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[Hexagon] Fix instruction selection for sign-extending i1 to i64
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2017-02-28 22:37:01 +00:00 |
isel-i1arg-crash.ll
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[Hexagon] Fix lowering of formal arguments of type i1
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2017-03-01 17:30:10 +00:00 |
isel-op-zext-i1.ll
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[Hexagon] Propagate zext of i1 into arithmetic code in selection DAG
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2017-03-09 16:29:30 +00:00 |
jt-in-text.ll
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[Hexagon] New HVX target features.
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2017-10-18 18:07:07 +00:00 |
lit.local.cfg
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livephysregs-add-pristines.mir
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[IfConversion] More simple, correct dead/kill liveness handling
|
2017-09-14 15:53:11 +00:00 |
livephysregs-lane-masks2.mir
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Insert IMPLICIT_DEFS for undef uses in tail merging
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2017-09-06 20:45:24 +00:00 |
livephysregs-lane-masks.mir
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loadi1-G0.ll
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loadi1-v4-G0.ll
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loadi1-v4.ll
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loadi1.ll
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long-calls.ll
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loop-prefetch.ll
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[Hexagon] New HVX target features.
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2017-10-18 18:07:07 +00:00 |
lower-extract-subvector.ll
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[Hexagon] New HVX target features.
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2017-10-18 18:07:07 +00:00 |
macint.ll
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maxd.ll
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maxh.ll
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maxud.ll
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maxuw.ll
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maxw.ll
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mem-fi-add.ll
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memcpy-likely-aligned.ll
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memops1.ll
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memops2.ll
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memops3.ll
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memops-stack.ll
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[Hexagon] New HVX target features.
|
2017-10-18 18:07:07 +00:00 |
memops.ll
|
|
|
mind.ll
|
|
|
minu-zext-8.ll
|
|
|
minu-zext-16.ll
|
|
|
minud.ll
|
|
|
minuw.ll
|
|
|
minw.ll
|
|
|
misaligned_double_vector_store_not_fast.ll
|
[Hexagon] New HVX target features.
|
2017-10-18 18:07:07 +00:00 |
misaligned-access.ll
|
|
|
misched-top-rptracker-sync.ll
|
|
|
mpy.ll
|
|
|
mul64-sext.ll
|
[Hexagon] Improve code generation for 32x32-bit multiplication
|
2017-05-30 17:47:51 +00:00 |
mulh.ll
|
[Hexagon] Generate multiply-high instruction in isel
|
2017-06-13 16:21:57 +00:00 |
mulhs.ll
|
|
|
multi-cycle.ll
|
[Hexagon] New HVX target features.
|
2017-10-18 18:07:07 +00:00 |
mux-basic.ll
|
|
|
mux-kill1.mir
|
[Hexagon] Use LivePhysRegs to fix up kills in HexagonGenMux
|
2017-06-22 20:43:02 +00:00 |
mux-kill2.mir
|
[Hexagon] Use LivePhysRegs to fix up kills in HexagonGenMux
|
2017-06-22 20:43:02 +00:00 |
mux-kill3.mir
|
[Hexagon] Use LivePhysRegs to fix up kills in HexagonGenMux
|
2017-06-22 20:43:02 +00:00 |
mux-undef.ll
|
[Hexagon] Skip mux generation when predicate register is undefined
|
2017-06-08 20:56:36 +00:00 |
newify-crash.ll
|
[Hexagon] New HVX target features.
|
2017-10-18 18:07:07 +00:00 |
newvaluejump2.ll
|
[Hexagon] Implement frame pointer elimination with -fomit-frame-pointer
|
2017-06-30 21:21:40 +00:00 |
newvaluejump3.ll
|
[Hexagon] New HVX target features.
|
2017-10-18 18:07:07 +00:00 |
newvaluejump-c4.mir
|
[Hexagon] Recognize C4_cmpneqi, C4_cmpltei and C4_cmplteui in NewValueJump
|
2017-07-24 19:35:48 +00:00 |
newvaluejump-kill2.mir
|
[Hexagon] Update kills in hexagon-nvj even more properly than before
|
2017-06-27 18:37:16 +00:00 |
newvaluejump-kill.ll
|
[Hexagon] Properly update kill flags in HexagonNewValueJump
|
2017-06-22 21:11:44 +00:00 |
newvaluejump.ll
|
[Hexagon] Replace instruction definitions with auto-generated ones
|
2017-02-10 15:33:13 +00:00 |
newvalueSameReg.ll
|
[Hexagon] Replace instruction definitions with auto-generated ones
|
2017-02-10 15:33:13 +00:00 |
newvaluestore.ll
|
|
|
NVJumpCmp.ll
|
|
|
opt-addr-mode.ll
|
[Hexagon] Replace instruction definitions with auto-generated ones
|
2017-02-10 15:33:13 +00:00 |
opt-fabs.ll
|
[Hexagon] Replace instruction definitions with auto-generated ones
|
2017-02-10 15:33:13 +00:00 |
opt-fneg.ll
|
[Hexagon] Replace instruction definitions with auto-generated ones
|
2017-02-10 15:33:13 +00:00 |
opt-spill-volatile.ll
|
Add address space mangling to lifetime intrinsics
|
2017-04-10 20:18:21 +00:00 |
packetize_cond_inst.ll
|
|
|
packetize-cfi-location.ll
|
|
|
packetize-nvj-no-prune.mir
|
[Hexagon] Make sure that new-value jump is packetized with producer
|
2017-10-11 21:20:43 +00:00 |
packetize-return-arg.ll
|
|
|
packetize-tailcall-arg.ll
|
|
|
peephole-kill-flags.ll
|
[Hexagon] New HVX target features.
|
2017-10-18 18:07:07 +00:00 |
peephole-op-swap.ll
|
|
|
pic-jumptables.ll
|
|
|
pic-local.ll
|
[Hexagon] Replace instruction definitions with auto-generated ones
|
2017-02-10 15:33:13 +00:00 |
pic-regusage.ll
|
|
|
pic-simple.ll
|
[Hexagon] Replace instruction definitions with auto-generated ones
|
2017-02-10 15:33:13 +00:00 |
pic-static.ll
|
[Hexagon] Replace instruction definitions with auto-generated ones
|
2017-02-10 15:33:13 +00:00 |
plt-rel.ll
|
[Hexagon] New HVX target features.
|
2017-10-18 18:07:07 +00:00 |
post-inc-aa-metadata.ll
|
[Hexagon] New HVX target features.
|
2017-10-18 18:07:07 +00:00 |
post-ra-kill-update.mir
|
ScheduleDAGInstrs: Fix fixupKills()
|
2017-05-27 02:50:50 +00:00 |
postinc-baseoffset.mir
|
[Hexagon] Fix a bug in r308502: post-inc offset is always 0
|
2017-07-19 19:17:32 +00:00 |
postinc-load.ll
|
|
|
postinc-offset.ll
|
|
|
postinc-store.ll
|
|
|
PR33749.ll
|
[Hexagon] Reorganize and update instruction patterns
|
2017-10-20 19:33:12 +00:00 |
pred-absolute-store.ll
|
[RDF] Remove the map of reaching defs from copy propagation
|
2017-03-10 22:44:24 +00:00 |
pred-gp.ll
|
|
|
pred-instrs.ll
|
|
|
predicate-copy.ll
|
|
|
predicate-logical.ll
|
[Hexagon] Replace instruction definitions with auto-generated ones
|
2017-02-10 15:33:13 +00:00 |
predicate-rcmp.ll
|
[Hexagon] Replace instruction definitions with auto-generated ones
|
2017-02-10 15:33:13 +00:00 |
propagate-vcombine.ll
|
[Hexagon] New HVX target features.
|
2017-10-18 18:07:07 +00:00 |
rdf-copy-undef2.ll
|
Add address space mangling to lifetime intrinsics
|
2017-04-10 20:18:21 +00:00 |
rdf-copy.ll
|
|
|
rdf-cover-use.ll
|
[RDF] Remove covered parts of reached uses for phi and use in same block
|
2017-05-05 22:10:32 +00:00 |
rdf-dead-loop.ll
|
|
|
rdf-def-mask.ll
|
[Hexagon] New HVX target features.
|
2017-10-18 18:07:07 +00:00 |
rdf-extra-livein.ll
|
|
|
rdf-filter-defs.ll
|
|
|
rdf-ignore-undef.ll
|
|
|
rdf-inline-asm-fixed.ll
|
[Hexagon] New HVX target features.
|
2017-10-18 18:07:07 +00:00 |
rdf-inline-asm.ll
|
[Hexagon] New HVX target features.
|
2017-10-18 18:07:07 +00:00 |
rdf-multiple-phis-up.ll
|
|
|
rdf-phi-shadows.ll
|
|
|
rdf-phi-up.ll
|
Add address space mangling to lifetime intrinsics
|
2017-04-10 20:18:21 +00:00 |
rdf-reset-kills.ll
|
|
|
readcyclecounter.ll
|
[Hexagon] Implement @llvm.readcyclecounter()
|
2017-02-22 22:28:47 +00:00 |
reg-scavengebug-3.ll
|
[Hexagon] New HVX target features.
|
2017-10-18 18:07:07 +00:00 |
reg-scavenger-valid-slot.ll
|
[Hexagon] New HVX target features.
|
2017-10-18 18:07:07 +00:00 |
regalloc-bad-undef.mir
|
[Hexagon] New HVX target features.
|
2017-10-18 18:07:07 +00:00 |
regalloc-block-overlap.ll
|
[Hexagon] New HVX target features.
|
2017-10-18 18:07:07 +00:00 |
regalloc-liveout-undef.mir
|
Create a PHI value when merging with a known undef live-in
|
2017-06-27 21:30:46 +00:00 |
relax.ll
|
|
|
remove_lsr.ll
|
|
|
remove-endloop.ll
|
|
|
restore-single-reg.ll
|
|
|
ret-struct-by-val.ll
|
[Hexagon] Replace instruction definitions with auto-generated ones
|
2017-02-10 15:33:13 +00:00 |
runtime-stkchk.ll
|
Add address space mangling to lifetime intrinsics
|
2017-04-10 20:18:21 +00:00 |
sdata-array.ll
|
[Hexagon] Reorganize and update instruction patterns
|
2017-10-20 19:33:12 +00:00 |
sdata-basic.ll
|
|
|
sdr-basic.ll
|
|
|
sdr-shr32.ll
|
|
|
section_7275.ll
|
[Hexagon] Adding gp+ to the syntax of gp-relative instructions
|
2017-02-06 23:18:57 +00:00 |
select-instr-align.ll
|
[Hexagon] New HVX target features.
|
2017-10-18 18:07:07 +00:00 |
sf-min-max.ll
|
|
|
sffms.ll
|
|
|
shrink-frame-basic.ll
|
|
|
signed_immediates.ll
|
[Hexagon] Replace instruction definitions with auto-generated ones
|
2017-02-10 15:33:13 +00:00 |
simple_addend.ll
|
|
|
simpletailcall.ll
|
|
|
split-const32-const64.ll
|
|
|
stack-align1.ll
|
[Hexagon] Replace instruction definitions with auto-generated ones
|
2017-02-10 15:33:13 +00:00 |
stack-align2.ll
|
[Hexagon] Replace instruction definitions with auto-generated ones
|
2017-02-10 15:33:13 +00:00 |
stack-align-reset.ll
|
[Hexagon] New HVX target features.
|
2017-10-18 18:07:07 +00:00 |
stack-alloca1.ll
|
[Hexagon] Replace instruction definitions with auto-generated ones
|
2017-02-10 15:33:13 +00:00 |
stack-alloca2.ll
|
[Hexagon] Replace instruction definitions with auto-generated ones
|
2017-02-10 15:33:13 +00:00 |
static.ll
|
[Hexagon] Adding gp+ to the syntax of gp-relative instructions
|
2017-02-06 23:18:57 +00:00 |
store-imm-amode.ll
|
[Hexagon] Reorganize and update instruction patterns
|
2017-10-20 19:33:12 +00:00 |
store-imm-large-stack.ll
|
[Hexagon] Recognize potential offset overflow for store-imm to stack
|
2017-06-22 14:11:23 +00:00 |
store-imm-stack-object.ll
|
[Hexagon] Reorganize and update instruction patterns
|
2017-10-20 19:33:12 +00:00 |
store-shift.ll
|
[Hexagon] Reorganize and update instruction patterns
|
2017-10-20 19:33:12 +00:00 |
store-widen-aliased-load.ll
|
|
|
store-widen-negv2.ll
|
|
|
store-widen-negv.ll
|
|
|
store-widen.ll
|
|
|
storerd-io-over-rr.ll
|
|
|
storerinewabs.ll
|
|
|
struct_args_large.ll
|
|
|
struct_args.ll
|
|
|
sube.ll
|
[Hexagon] Propagate zext of i1 into arithmetic code in selection DAG
|
2017-03-09 16:29:30 +00:00 |
subi-asl.ll
|
[Hexagon] Replace instruction definitions with auto-generated ones
|
2017-02-10 15:33:13 +00:00 |
SUnit-boundary-prob.ll
|
[Hexagon] New HVX target features.
|
2017-10-18 18:07:07 +00:00 |
switch-lut-explicit-section.ll
|
[Hexagon] New HVX target features.
|
2017-10-18 18:07:07 +00:00 |
switch-lut-function-section.ll
|
[Hexagon] New HVX target features.
|
2017-10-18 18:07:07 +00:00 |
switch-lut-multiple-functions.ll
|
[Hexagon] New HVX target features.
|
2017-10-18 18:07:07 +00:00 |
switch-lut-text-section.ll
|
[Hexagon] New HVX target features.
|
2017-10-18 18:07:07 +00:00 |
swp-const-tc.ll
|
[LSR / TTI / SystemZ] Eliminate TargetTransformInfo::isFoldableMemAccess()
|
2017-08-09 11:28:01 +00:00 |
swp-dag-phi.ll
|
|
|
swp-epilog-phi10.ll
|
|
|
swp-epilog-reuse-1.ll
|
|
|
swp-epilog-reuse.ll
|
|
|
swp-matmul-bitext.ll
|
[Hexagon] Use automatically-generated scheduling information for HVX
|
2017-05-03 20:10:36 +00:00 |
swp-max.ll
|
[Hexagon] Replace instruction definitions with auto-generated ones
|
2017-02-10 15:33:13 +00:00 |
swp-multi-loops.ll
|
[Hexagon] Replace instruction definitions with auto-generated ones
|
2017-02-10 15:33:13 +00:00 |
swp-order-copies.ll
|
[Pipeliner] Improve serialization order for post-increments
|
2017-10-11 15:51:44 +00:00 |
swp-prolog-phi4.ll
|
|
|
swp-stages4.ll
|
[Hexagon] Replace instruction definitions with auto-generated ones
|
2017-02-10 15:33:13 +00:00 |
swp-stages5.ll
|
[Hexagon] Replace instruction definitions with auto-generated ones
|
2017-02-10 15:33:13 +00:00 |
swp-vect-dotprod.ll
|
|
|
swp-vmult.ll
|
[Hexagon] Replace instruction definitions with auto-generated ones
|
2017-02-10 15:33:13 +00:00 |
swp-vsum.ll
|
[Hexagon] Replace instruction definitions with auto-generated ones
|
2017-02-10 15:33:13 +00:00 |
tail-call-mem-intrinsics.ll
|
|
|
tail-call-trunc.ll
|
|
|
tail-dup-subreg-abort.ll
|
|
|
tail-dup-subreg-map.ll
|
[Hexagon] Replace instruction definitions with auto-generated ones
|
2017-02-10 15:33:13 +00:00 |
tailcall_fastcc_ccc.ll
|
|
|
target-flag-ext.mir
|
[Hexagon] Fix check for HMOTF_ConstExtend operand flag
|
2017-07-10 18:38:52 +00:00 |
tfr-to-combine.ll
|
[Hexagon] Reorganize and update instruction patterns
|
2017-10-20 19:33:12 +00:00 |
tls_pic.ll
|
[Hexagon] Reorganize and update instruction patterns
|
2017-10-20 19:33:12 +00:00 |
tls_static.ll
|
[Hexagon] Reorganize and update instruction patterns
|
2017-10-20 19:33:12 +00:00 |
trap-unreachable.ll
|
[Hexagon] Add option to generate calls to "abort" for "unreachable"
|
2017-09-06 16:22:55 +00:00 |
two-crash.ll
|
[Hexagon] Replace instruction definitions with auto-generated ones
|
2017-02-10 15:33:13 +00:00 |
undo-dag-shift.ll
|
[Hexagon] New HVX target features.
|
2017-10-18 18:07:07 +00:00 |
union-1.ll
|
|
|
unreachable-mbb-phi-subreg.mir
|
Properly handle PHIs with subregisters in UnreachableBlockElim
|
2017-04-28 21:56:33 +00:00 |
usr-ovf-dep.ll
|
|
|
v6vec-vprint.ll
|
[Hexagon] New HVX target features.
|
2017-10-18 18:07:07 +00:00 |
v60-cur.ll
|
[Hexagon] New HVX target features.
|
2017-10-18 18:07:07 +00:00 |
v60-vsel1.ll
|
[Hexagon] New HVX target features.
|
2017-10-18 18:07:07 +00:00 |
v60Intrins.ll
|
[Hexagon] New HVX target features.
|
2017-10-18 18:07:07 +00:00 |
v60small.ll
|
[Hexagon] New HVX target features.
|
2017-10-18 18:07:07 +00:00 |
v60Vasr.ll
|
[Hexagon] New HVX target features.
|
2017-10-18 18:07:07 +00:00 |
vaddh.ll
|
[Hexagon] Replace instruction definitions with auto-generated ones
|
2017-02-10 15:33:13 +00:00 |
validate-offset.ll
|
|
|
vassign-to-combine.ll
|
[Hexagon] New HVX target features.
|
2017-10-18 18:07:07 +00:00 |
vdmpy-halide-test.ll
|
[Hexagon] New HVX target features.
|
2017-10-18 18:07:07 +00:00 |
vec-pred-spill1.ll
|
[Hexagon] New HVX target features.
|
2017-10-18 18:07:07 +00:00 |
vec-vararg-align.ll
|
[Hexagon] New HVX target features.
|
2017-10-18 18:07:07 +00:00 |
vector-align.ll
|
[Hexagon] New HVX target features.
|
2017-10-18 18:07:07 +00:00 |
vector-ext-load.ll
|
|
|
vload-postinc-sel.ll
|
[Hexagon] New HVX target features.
|
2017-10-18 18:07:07 +00:00 |
vmpa-halide-test.ll
|
[Hexagon] New HVX target features.
|
2017-10-18 18:07:07 +00:00 |
vpack_eo.ll
|
[Hexagon] New HVX target features.
|
2017-10-18 18:07:07 +00:00 |
vselect-pseudo.ll
|
[Hexagon] New HVX target features.
|
2017-10-18 18:07:07 +00:00 |
vsplat-isel.ll
|
|
|
zextloadi1.ll
|
[Hexagon] Minimize number of repeated constant extenders
|
2017-10-13 19:02:59 +00:00 |