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llvm-mirror/test/MC/Disassembler/RISCV/invalid-instruction.txt
Alex Bradbury 02c51ed077 [RISCV] Fix test/MC/Disassembler/RISCV/invalid-instruction.txt after rL347988
The test for [0x00 0x00] failed due to the introduction of c.unimp.

This particular test is unnecessary now that c.unimp was defined (and is 
tested in test/MC/RISCV/rv32c-valid.s).

llvm-svn: 348117
2018-12-03 10:35:46 +00:00

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# RUN: not llvm-mc -disassemble -triple=riscv32 -mattr=+c < %s 2>&1 | FileCheck %s
# RUN: not llvm-mc -disassemble -triple=riscv64 -mattr=+c < %s 2>&1 | FileCheck %s
#
# Test generated by a LLVM MC Disassembler Protocol Buffer Fuzzer
# for the RISC-V assembly language.
# This should not decode as c.addi16sp with 0 imm when compression is enabled.
[0x01 0x61]
# CHECK: warning: invalid instruction encoding