| .. |
|
2004-11-29-ShrCrash.ll
|
|
|
|
2004-11-30-shift-crash.ll
|
|
|
|
2004-11-30-shr-var-crash.ll
|
|
|
|
2004-12-12-ZeroSizeCommon.ll
|
|
|
|
2005-01-14-SetSelectCrash.ll
|
|
|
|
2005-01-14-UndefLong.ll
|
|
|
|
2005-08-12-rlwimi-crash.ll
|
|
|
|
2005-09-02-LegalizeDuplicatesCalls.ll
|
|
|
|
2005-10-08-ArithmeticRotate.ll
|
|
|
|
2005-11-30-vastart-crash.ll
|
|
|
|
2006-01-11-darwin-fp-argument.ll
|
|
|
|
2006-01-20-ShiftPartsCrash.ll
|
Make the default triple optional by allowing an empty string
|
2015-09-16 05:34:32 +00:00 |
|
2006-04-01-FloatDoubleExtend.ll
|
|
|
|
2006-04-05-splat-ish.ll
|
|
|
|
2006-04-19-vmaddfp-crash.ll
|
|
|
|
2006-05-12-rlwimi-crash.ll
|
|
|
|
2006-07-07-ComputeMaskedBits.ll
|
|
|
|
2006-07-19-stwbrx-crash.ll
|
|
|
|
2006-08-11-RetVector.ll
|
|
|
|
2006-08-15-SelectionCrash.ll
|
Make the default triple optional by allowing an empty string
|
2015-09-16 05:34:32 +00:00 |
|
2006-09-28-shift_64.ll
|
|
|
|
2006-10-13-Miscompile.ll
|
|
|
|
2006-10-17-brcc-miscompile.ll
|
|
|
|
2006-10-17-ppc64-alloca.ll
|
|
|
|
2006-11-10-DAGCombineMiscompile.ll
|
|
|
|
2006-11-29-AltivecFPSplat.ll
|
|
|
|
2006-12-07-LargeAlloca.ll
|
Make the default triple optional by allowing an empty string
|
2015-09-16 05:34:32 +00:00 |
|
2006-12-07-SelectCrash.ll
|
Make the default triple optional by allowing an empty string
|
2015-09-16 05:34:32 +00:00 |
|
2007-01-04-ArgExtension.ll
|
|
|
|
2007-01-15-AsmDialect.ll
|
|
|
|
2007-01-29-lbrx-asm.ll
|
|
|
|
2007-01-31-InlineAsmAddrMode.ll
|
|
|
|
2007-02-16-AlignPacked.ll
|
|
|
|
2007-02-16-InlineAsmNConstraint.ll
|
|
|
|
2007-02-23-lr-saved-twice.ll
|
|
|
|
2007-03-24-cntlzd.ll
|
|
|
|
2007-03-30-SpillerCrash.ll
|
|
|
|
2007-04-24-InlineAsm-I-Modifier.ll
|
|
|
|
2007-04-30-InlineAsmEarlyClobber.ll
|
|
|
|
2007-05-03-InlineAsm-S-Constraint.ll
|
|
|
|
2007-05-14-InlineAsmSelectCrash.ll
|
|
|
|
2007-05-22-tailmerge-3.ll
|
|
|
|
2007-05-30-dagcombine-miscomp.ll
|
|
|
|
2007-06-28-BCCISelBug.ll
|
|
|
|
2007-08-04-CoalescerAssert.ll
|
|
|
|
2007-09-04-AltivecDST.ll
|
|
|
|
2007-09-07-LoadStoreIdxForms.ll
|
[PPC] Enable transformations in PPCPassConfig::addIRPasses at O2
|
2016-04-07 15:30:55 +00:00 |
|
2007-09-08-unaligned.ll
|
|
|
|
2007-09-11-RegCoalescerAssert.ll
|
|
|
|
2007-09-12-LiveIntervalsAssert.ll
|
|
|
|
2007-10-16-InlineAsmFrameOffset.ll
|
|
|
|
2007-10-18-PtrArithmetic.ll
|
|
|
|
2007-10-21-LocalRegAllocAssert2.ll
|
|
|
|
2007-10-21-LocalRegAllocAssert.ll
|
|
|
|
2007-11-04-CoalescerCrash.ll
|
|
|
|
2007-11-16-landingpad-split.ll
|
|
|
|
2007-11-19-VectorSplitting.ll
|
Make the default triple optional by allowing an empty string
|
2015-09-16 05:34:32 +00:00 |
|
2008-02-05-LiveIntervalsAssert.ll
|
|
|
|
2008-02-09-LocalRegAllocAssert.ll
|
|
|
|
2008-03-05-RegScavengerAssert.ll
|
|
|
|
2008-03-17-RegScavengerCrash.ll
|
|
|
|
2008-03-18-RegScavengerAssert.ll
|
|
|
|
2008-03-24-AddressRegImm.ll
|
|
|
|
2008-03-24-CoalescerBug.ll
|
Make "@name =" mandatory for globals in .ll files.
|
2016-05-10 18:22:45 +00:00 |
|
2008-03-26-CoalescerBug.ll
|
|
|
|
2008-04-10-LiveIntervalCrash.ll
|
|
|
|
2008-04-16-CoalescerBug.ll
|
|
|
|
2008-04-23-CoalescerCrash.ll
|
|
|
|
2008-05-01-ppc_fp128.ll
|
|
|
|
2008-06-19-LegalizerCrash.ll
|
|
|
|
2008-06-21-F128LoadStore.ll
|
|
|
|
2008-06-23-LiveVariablesCrash.ll
|
|
|
|
2008-07-10-SplatMiscompile.ll
|
|
|
|
2008-07-15-Bswap.ll
|
|
|
|
2008-07-15-Fabs.ll
|
|
|
|
2008-07-15-SignExtendInreg.ll
|
|
|
|
2008-07-17-Fneg.ll
|
|
|
|
2008-07-24-PPC64-CCBug.ll
|
|
|
|
2008-09-12-CoalescerBug.ll
|
|
|
|
2008-10-17-AsmMatchingOperands.ll
|
|
|
|
2008-10-28-f128-i32.ll
|
|
|
|
2008-10-28-UnprocessedNode.ll
|
|
|
|
2008-10-31-PPCF128Libcalls.ll
|
|
|
|
2008-12-02-LegalizeTypeAssert.ll
|
|
|
|
2009-01-16-DeclareISelBug.ll
|
|
|
|
2009-03-17-LSRBug.ll
|
|
|
|
2009-05-28-LegalizeBRCC.ll
|
|
|
|
2009-07-16-InlineAsm-M-Operand.ll
|
|
|
|
2009-08-17-inline-asm-addr-mode-breakage.ll
|
|
|
|
2009-09-18-carrybit.ll
|
|
|
|
2009-11-15-ProcImpDefsBug.ll
|
|
|
|
2009-11-25-ImpDefBug.ll
|
|
|
|
2010-02-04-EmptyGlobal.ll
|
[MC] Use .p2align instead of .align
|
2016-01-26 00:03:25 +00:00 |
|
2010-02-12-saveCR.ll
|
|
|
|
2010-03-09-indirect-call.ll
|
|
|
|
2010-04-01-MachineCSEBug.ll
|
|
|
|
2010-05-03-retaddr1.ll
|
|
|
|
2010-10-11-Fast-Varargs.ll
|
|
|
|
2010-12-18-PPCStackRefs.ll
|
|
|
|
2011-12-05-NoSpillDupCR.ll
|
Revert "Change memcpy/memset/memmove to have dest and source alignments."
|
2015-11-19 05:56:52 +00:00 |
|
2011-12-06-SpillAndRestoreCR.ll
|
Revert "Change memcpy/memset/memmove to have dest and source alignments."
|
2015-11-19 05:56:52 +00:00 |
|
2011-12-08-DemandedBitsMiscompile.ll
|
|
|
|
2012-09-16-TOC-entry-check.ll
|
|
|
|
2012-10-11-dynalloc.ll
|
|
|
|
2012-10-12-bitcast.ll
|
|
|
|
2012-11-16-mischedcall.ll
|
[PPC] Enable transformations in PPCPassConfig::addIRPasses at O2
|
2016-04-07 15:30:55 +00:00 |
|
2013-05-15-preinc-fold.ll
|
|
|
|
2013-07-01-PHIElimBug.ll
|
|
|
|
2016-01-07-BranchWeightCrash.ll
|
Codegen: [PPC] Handle weighted comparisons when inserting selects.
|
2016-01-12 21:00:43 +00:00 |
|
2016-04-16-ADD8TLS.ll
|
[PowerPC] [PR27387] Disallow r0 for ADD8TLS.
|
2016-04-25 09:24:34 +00:00 |
|
2016-04-17-combine.ll
|
[PR27390] [CodeGen] Reject indexed loads in CombinerDAG.
|
2016-04-25 15:43:44 +00:00 |
|
2016-04-28-setjmp.ll
|
[PowerPC] Fix the EH_SjLj_Setup pseudo.
|
2016-04-28 21:24:37 +00:00 |
|
a2-fp-basic.ll
|
|
|
|
a2q-stackalign.ll
|
|
|
|
a2q.ll
|
|
|
|
aa-tbaa.ll
|
|
|
|
aantidep-def-ec.mir
|
test: Always treat .mir files as tests even outside of CodeGen/MIR
|
2016-04-04 21:23:44 +00:00 |
|
aantidep-inline-asm-use.ll
|
Tests: PPC: remove unnecessary metadata. NFC
|
2015-12-02 21:08:03 +00:00 |
|
add-fi.ll
|
|
|
|
addc.ll
|
|
|
|
addi-licm.ll
|
|
|
|
addi-reassoc.ll
|
|
|
|
addisdtprelha-nonr3.mir
|
test: Always treat .mir files as tests even outside of CodeGen/MIR
|
2016-04-04 21:23:44 +00:00 |
|
addrfuncstr.ll
|
|
|
|
aggressive-anti-dep-breaker-subreg.ll
|
Fix Sub-register Rewriting in Aggressive Anti-Dependence Breaker
|
2016-04-01 02:05:29 +00:00 |
|
alias.ll
|
[opaque pointer type] Add textual IR support for explicit type parameter for global aliases
|
2015-09-11 03:22:04 +00:00 |
|
align.ll
|
[MC] Use .p2align instead of .align
|
2016-01-26 00:03:25 +00:00 |
|
allocate-r0.ll
|
|
|
|
altivec-ord.ll
|
|
|
|
and_add.ll
|
|
|
|
and_sext.ll
|
|
|
|
and_sra.ll
|
|
|
|
and-branch.ll
|
|
|
|
and-elim.ll
|
|
|
|
and-imm.ll
|
|
|
|
andc.ll
|
[ppc] add tests to show potential andc optimization
|
2016-04-13 23:23:30 +00:00 |
|
anon_aggr.ll
|
|
|
|
arr-fp-arg-no-copy.ll
|
|
|
|
ashr-neg1.ll
|
|
|
|
asm-constraints.ll
|
Finish the incomplete 'd' inline asm constraint support for PPC by
|
2016-03-24 21:04:52 +00:00 |
|
asm-dialect.ll
|
|
|
|
asm-printer-topological-order.ll
|
Move asm-printer-topological-order.ll to PowerPC backend
|
2016-03-31 22:32:10 +00:00 |
|
asm-Zy.ll
|
|
|
|
asym-regclass-copy.ll
|
|
|
|
atomic-1.ll
|
|
|
|
atomic-2.ll
|
|
|
|
Atomics-64.ll
|
|
|
|
atomics-fences.ll
|
[LLVM] Remove unwanted --check-prefix=CHECK from unit tests. NFC.
|
2016-04-19 23:51:52 +00:00 |
|
atomics-indexed.ll
|
|
|
|
atomics.ll
|
|
|
|
available-externally.ll
|
|
|
|
bdzlr.ll
|
[PPC] Enable transformations in PPCPassConfig::addIRPasses at O2
|
2016-04-07 15:30:55 +00:00 |
|
big-endian-actual-args.ll
|
|
|
|
big-endian-call-result.ll
|
|
|
|
big-endian-formal-args.ll
|
|
|
|
bitcasts-direct-move.ll
|
Bitcasts between FP and INT values using direct moves
|
2015-12-15 14:50:34 +00:00 |
|
bitreverse.ll
|
[SDAG] Introduce a new BITREVERSE node along with a corresponding LLVM intrinsic
|
2015-11-12 12:29:09 +00:00 |
|
blockaddress.ll
|
|
|
|
BoolRetToIntTest.ll
|
[PPC64] Convert bool literals to i32
|
2015-12-07 20:50:29 +00:00 |
|
bperm.ll
|
|
|
|
branch-hint.ll
|
[PowerPC] Add Branch Hints for Highly-Biased Branches
|
2015-12-12 00:32:00 +00:00 |
|
branch-opt.ll
|
|
|
|
BreakableToken-reduced.ll
|
[LLVM] Remove unwanted --check-prefix=CHECK from unit tests. NFC.
|
2016-04-19 23:51:52 +00:00 |
|
bswap-load-store.ll
|
|
|
|
buildvec_canonicalize.ll
|
|
|
|
builtins-ppc-elf2-abi.ll
|
|
|
|
builtins-ppc-p8vector.ll
|
|
|
|
bv-pres-v8i1.ll
|
|
|
|
bv-widen-undef.ll
|
|
|
|
byval-agg-info.ll
|
|
|
|
byval-aliased.ll
|
|
|
|
calls.ll
|
|
|
|
can-lower-ret.ll
|
|
|
|
cc.ll
|
|
|
|
cmp-cmp.ll
|
|
|
|
cmpb-ppc32.ll
|
|
|
|
cmpb.ll
|
|
|
|
coal-sections.ll
|
[MachO] Stop generating *coal* sections.
|
2015-10-15 05:28:38 +00:00 |
|
coalesce-ext.ll
|
|
|
|
code-align.ll
|
[MBP] Use Function::optForSize() instead of checking OptimizeForSize directly.
|
2016-04-29 22:01:10 +00:00 |
|
combine-to-pre-index-store-crash.ll
|
[SelectionDAG] Fix CombineToPreIndexedLoadStore O(n^2) behavior
|
2016-02-03 20:58:55 +00:00 |
|
compare-duplicate.ll
|
|
|
|
compare-simm.ll
|
|
|
|
complex-return.ll
|
|
|
|
constants-i64.ll
|
|
|
|
constants.ll
|
|
|
|
copysignl.ll
|
|
|
|
cr1eq-no-extra-moves.ll
|
|
|
|
cr1eq.ll
|
|
|
|
cr_spilling.ll
|
|
|
|
cr-spills.ll
|
|
|
|
crash.ll
|
|
|
|
crbit-asm-disabled.ll
|
Revert "[llc] New diagnostic handler"
|
2016-05-14 14:37:11 +00:00 |
|
crbit-asm.ll
|
[PowerPC] Fix CodeGen/PowerPC/crbit-asm.ll test for -O1
|
2015-10-28 19:58:02 +00:00 |
|
crbits.ll
|
|
|
|
crsave.ll
|
[ppc64] fix bug in prologue that mfocrf's cr operand should be explict state instead of implicit
|
2016-04-27 02:59:28 +00:00 |
|
crypto_bifs.ll
|
[Power9] Add support for -mcpu=pwr9 in the back end
|
2016-05-09 18:54:58 +00:00 |
|
ctr-cleanup.ll
|
|
|
|
ctr-loop-tls-const.ll
|
[PowerPC] Recurse through constants when looking for TLS globals
|
2015-10-28 23:43:00 +00:00 |
|
ctr-minmaxnum.ll
|
[PowerPC] Map max/minnum intrinsics and fmax/fmin to ISD nodes for CTR-based loop legality
|
2016-03-27 05:40:56 +00:00 |
|
ctrloop-asm.ll
|
|
|
|
ctrloop-cpsgn.ll
|
|
|
|
ctrloop-fp64.ll
|
|
|
|
ctrloop-i64.ll
|
|
|
|
ctrloop-intrin.ll
|
Fix the PPC CTR Loop pass to look for calls to the intrinsics that
|
2015-09-08 22:14:58 +00:00 |
|
ctrloop-large-ec.ll
|
|
|
|
ctrloop-le.ll
|
|
|
|
ctrloop-lt.ll
|
|
|
|
ctrloop-ne.ll
|
|
|
|
ctrloop-reg.ll
|
Revert "Change memcpy/memset/memmove to have dest and source alignments."
|
2015-11-19 05:56:52 +00:00 |
|
ctrloop-s000.ll
|
|
|
|
ctrloop-sh.ll
|
|
|
|
ctrloop-sums.ll
|
|
|
|
ctrloop-udivti3.ll
|
[PPC] Enable transformations in PPCPassConfig::addIRPasses at O2
|
2016-04-07 15:30:55 +00:00 |
|
ctrloops-softfloat.ll
|
[PowerPC] Disable CTR loops optimization for soft float operations
|
2016-03-17 17:11:33 +00:00 |
|
ctrloops.ll
|
[PPC] Enable transformations in PPCPassConfig::addIRPasses at O2
|
2016-04-07 15:30:55 +00:00 |
|
cttz.ll
|
[PowerPC] Replace cntlz[.] with cntlzw[.]
|
2015-10-28 03:26:45 +00:00 |
|
cxx_tlscc64.ll
|
CXX_FAST_TLS calling convention: performance improvement for PPC64
|
2016-04-08 12:04:32 +00:00 |
|
darwin-labels.ll
|
|
|
|
dbg.ll
|
[PR27284] Reverse the ownership between DICompileUnit and DISubprogram.
|
2016-04-15 15:57:41 +00:00 |
|
DbgValueOtherTargets.test
|
|
|
|
dcbt-sched.ll
|
|
|
|
delete-node.ll
|
|
|
|
direct-move-profit.ll
|
[PPC] Use VSX/FP Facility integer load when an integer load's only users are conversion to FP
|
2016-04-06 20:12:29 +00:00 |
|
div-2.ll
|
|
|
|
div-e-32.ll
|
|
|
|
div-e-all.ll
|
|
|
|
dyn-alloca-aligned.ll
|
|
|
|
dyn-alloca-offset.ll
|
Introduce new @llvm.get.dynamic.area.offset.i{32, 64} intrinsics.
|
2015-12-01 11:40:55 +00:00 |
|
e500-1.ll
|
[PowerPC] Don't generate mfocrf on the e500mc
|
2015-11-25 10:14:31 +00:00 |
|
early-ret2.ll
|
|
|
|
early-ret.ll
|
|
|
|
ec-input.ll
|
[PPC] Enable transformations in PPCPassConfig::addIRPasses at O2
|
2016-04-07 15:30:55 +00:00 |
|
empty-functions.ll
|
|
|
|
emptystruct.ll
|
Revert "Change memcpy/memset/memmove to have dest and source alignments."
|
2015-11-19 05:56:52 +00:00 |
|
emutls_generic.ll
|
|
|
|
eqv-andc-orc-nor.ll
|
|
|
|
ext-bool-trunc-repl.ll
|
[PowerPC] Fix a DAG replacement bug in PPCTargetLowering::DAGCombineExtBoolTrunc
|
2016-05-12 04:00:56 +00:00 |
|
extra-toc-reg-deps.ll
|
|
|
|
extsh.ll
|
|
|
|
f32-to-i64.ll
|
|
|
|
fabs.ll
|
use FileCheck; add test for disguised fabs
|
2016-04-21 20:58:58 +00:00 |
|
fast-isel-binary.ll
|
|
|
|
fast-isel-br-const.ll
|
|
|
|
fast-isel-call.ll
|
|
|
|
fast-isel-cmp-imm.ll
|
|
|
|
fast-isel-const.ll
|
|
|
|
fast-isel-conversion-p5.ll
|
|
|
|
fast-isel-conversion.ll
|
|
|
|
fast-isel-crash.ll
|
|
|
|
fast-isel-ext.ll
|
|
|
|
fast-isel-fcmp-nan.ll
|
[PPC, FastISel] Fix ordered/unordered fcmp
|
2016-03-17 22:27:58 +00:00 |
|
fast-isel-fold.ll
|
|
|
|
fast-isel-fpconv.ll
|
[PowerPC] Remove incorrect use of COPY_TO_REGCLASS in fast isel
|
2016-03-31 14:44:50 +00:00 |
|
fast-isel-GEP-coalesce.ll
|
|
|
|
fast-isel-i64offset.ll
|
[PowerPC] Attempt to fix fast-isel-i64offset.ll failure
|
2016-03-31 16:38:57 +00:00 |
|
fast-isel-icmp-split.ll
|
|
|
|
fast-isel-indirectbr.ll
|
|
|
|
fast-isel-load-store-vsx.ll
|
|
|
|
fast-isel-load-store.ll
|
|
|
|
fast-isel-redefinition.ll
|
|
|
|
fast-isel-ret.ll
|
Since LI/LIS sign extend the constant passed into the instruction we should
|
2016-01-29 07:20:01 +00:00 |
|
fast-isel-shifter.ll
|
|
|
|
fastisel-gep-promote-before-add.ll
|
|
|
|
fcpsgn.ll
|
|
|
|
fdiv-combine.ll
|
Fix tests that used CHECK-NEXT-NOT and CHECK-DAG-NOT.
|
2016-02-26 19:40:34 +00:00 |
|
float-asmprint.ll
|
|
|
|
float-to-int.ll
|
|
|
|
floatPSA.ll
|
|
|
|
flt-preinc.ll
|
|
|
|
fma-assoc.ll
|
[PPCVSXFMAMutate] Temporarily disable this pass
|
2016-03-03 01:27:35 +00:00 |
|
fma-ext.ll
|
[PPCVSXFMAMutate] Temporarily disable this pass
|
2016-03-03 01:27:35 +00:00 |
|
fma-mutate-duplicate-vreg.ll
|
Codegen: [PPC] Fix PPCVSXFMAMutate to handle duplicates.
|
2016-02-03 01:41:09 +00:00 |
|
fma-mutate-register-constraint.ll
|
PPC: Teach FMA mutate to respect register classes.
|
2015-12-10 21:28:40 +00:00 |
|
fma-mutate.ll
|
[PPCVSXFMAMutate] Temporarily disable this pass
|
2016-03-03 01:27:35 +00:00 |
|
fma.ll
|
[PPCVSXFMAMutate] Temporarily disable this pass
|
2016-03-03 01:27:35 +00:00 |
|
fmaxnum.ll
|
|
|
|
fminnum.ll
|
|
|
|
fnabs.ll
|
|
|
|
fneg.ll
|
|
|
|
fold-li.ll
|
|
|
|
fold-zero.ll
|
|
|
|
fp2int2fp-ppcfp128.ll
|
[PPC] Enable transformations in PPCPassConfig::addIRPasses at O2
|
2016-04-07 15:30:55 +00:00 |
|
fp128-bitcast-after-operation.ll
|
Bitcasts between FP and INT values using direct moves
|
2015-12-15 14:50:34 +00:00 |
|
fp_to_uint.ll
|
|
|
|
fp-branch.ll
|
|
|
|
fp-int-conversions-direct-moves.ll
|
|
|
|
fp-int-fp.ll
|
|
|
|
fp-to-int-ext.ll
|
|
|
|
fp-to-int-to-fp.ll
|
|
|
|
fpcopy.ll
|
|
|
|
frame-size.ll
|
|
|
|
frameaddr.ll
|
|
|
|
Frames-alloca.ll
|
|
|
|
Frames-large.ll
|
|
|
|
Frames-leaf.ll
|
|
|
|
Frames-small.ll
|
|
|
|
frounds.ll
|
|
|
|
fsel.ll
|
|
|
|
fsl-e500mc.ll
|
Revert "Change memcpy/memset/memmove to have dest and source alignments."
|
2015-11-19 05:56:52 +00:00 |
|
fsl-e5500.ll
|
Revert "Change memcpy/memset/memmove to have dest and source alignments."
|
2015-11-19 05:56:52 +00:00 |
|
fsqrt.ll
|
|
|
|
func-addr.ll
|
|
|
|
glob-comp-aa-crash.ll
|
Revert "Change memcpy/memset/memmove to have dest and source alignments."
|
2015-11-19 05:56:52 +00:00 |
|
hello-reloc.s
|
|
|
|
hello.ll
|
|
|
|
hidden-vis-2.ll
|
|
|
|
hidden-vis.ll
|
|
|
|
htm.ll
|
|
|
|
i1-ext-fold.ll
|
|
|
|
i1-to-double.ll
|
|
|
|
i32-to-float.ll
|
|
|
|
i64_fp_round.ll
|
|
|
|
i64_fp.ll
|
|
|
|
i64-to-float.ll
|
|
|
|
i128-and-beyond.ll
|
|
|
|
ia-mem-r0.ll
|
|
|
|
ia-neg-const.ll
|
|
|
|
iabs.ll
|
|
|
|
ifcvt.ll
|
|
|
|
illegal-element-type.ll
|
|
|
|
in-asm-f64-reg.ll
|
|
|
|
indexed-load.ll
|
|
|
|
indirectbr.ll
|
|
|
|
inline-asm-s-modifier.ll
|
Provide a test case for rl259798
|
2016-02-04 22:36:10 +00:00 |
|
inlineasm-copy.ll
|
|
|
|
inlineasm-i64-reg.ll
|
|
|
|
int-fp-conv-0.ll
|
|
|
|
int-fp-conv-1.ll
|
|
|
|
inverted-bool-compares.ll
|
|
|
|
isel-rc-nox0.ll
|
Revert "Change memcpy/memset/memmove to have dest and source alignments."
|
2015-11-19 05:56:52 +00:00 |
|
isel.ll
|
|
|
|
ispositive.ll
|
|
|
|
itofp128.ll
|
|
|
|
jaggedstructs.ll
|
|
|
|
LargeAbsoluteAddr.ll
|
|
|
|
lbz-from-ld-shift.ll
|
|
|
|
lbzux.ll
|
[PPC] Enable transformations in PPCPassConfig::addIRPasses at O2
|
2016-04-07 15:30:55 +00:00 |
|
ld-st-upd.ll
|
|
|
|
ldtoc-inv.ll
|
|
|
|
lha.ll
|
|
|
|
lit.local.cfg
|
|
|
|
load-constant-addr.ll
|
|
|
|
load-shift-combine.ll
|
Make the default triple optional by allowing an empty string
|
2015-09-16 05:34:32 +00:00 |
|
load-two-flts.ll
|
[PowerPC] Load two floats directly instead of using one 64-bit integer load
|
2016-03-31 02:56:05 +00:00 |
|
long-compare.ll
|
[PowerPC] Replace cntlz[.] with cntlzw[.]
|
2015-10-28 03:26:45 +00:00 |
|
longdbl-truncate.ll
|
|
|
|
loop-data-prefetch-inner.ll
|
|
|
|
loop-data-prefetch.ll
|
|
|
|
loop-prep-all.ll
|
|
|
|
lsa.ll
|
|
|
|
lsr-postinc-pos.ll
|
[PPC] Enable transformations in PPCPassConfig::addIRPasses at O2
|
2016-04-07 15:30:55 +00:00 |
|
lxvw4x-bug.ll
|
|
|
|
machine-combiner.ll
|
|
|
|
mask64.ll
|
|
|
|
mature-mc-support.ll
|
|
|
|
mc-instrlat.ll
|
|
|
|
mcm-1.ll
|
|
|
|
mcm-2.ll
|
|
|
|
mcm-3.ll
|
|
|
|
mcm-4.ll
|
|
|
|
mcm-5.ll
|
|
|
|
mcm-6.ll
|
|
|
|
mcm-7.ll
|
|
|
|
mcm-8.ll
|
|
|
|
mcm-9.ll
|
|
|
|
mcm-10.ll
|
|
|
|
mcm-11.ll
|
|
|
|
mcm-12.ll
|
|
|
|
mcm-13.ll
|
Weak non-function symbols were being accessed directly, which is
|
2015-11-20 20:51:31 +00:00 |
|
mcm-default.ll
|
|
|
|
mcm-obj-2.ll
|
|
|
|
mcm-obj.ll
|
|
|
|
mem_update.ll
|
|
|
|
mem-rr-addr-mode.ll
|
|
|
|
memcpy-vec.ll
|
Revert "Change memcpy/memset/memmove to have dest and source alignments."
|
2015-11-19 05:56:52 +00:00 |
|
memset-nc-le.ll
|
Revert "Change memcpy/memset/memmove to have dest and source alignments."
|
2015-11-19 05:56:52 +00:00 |
|
memset-nc.ll
|
Revert "Change memcpy/memset/memmove to have dest and source alignments."
|
2015-11-19 05:56:52 +00:00 |
|
merge-st-chain-op.ll
|
[DAGCombine] Fix getStoreMergeAndAliasCandidates's AA-enabled chain walking
|
2015-09-28 08:02:14 +00:00 |
|
MergeConsecutiveStores.ll
|
|
|
|
mftb.ll
|
|
|
|
misched-inorder-latency.ll
|
|
|
|
misched.ll
|
|
|
|
mul-neg-power-2.ll
|
|
|
|
mul-with-overflow.ll
|
|
|
|
mulhs.ll
|
|
|
|
mulli64.ll
|
|
|
|
mult-alt-generic-powerpc64.ll
|
|
|
|
mult-alt-generic-powerpc.ll
|
|
|
|
named-reg-alloc-r0.ll
|
|
|
|
named-reg-alloc-r1-64.ll
|
|
|
|
named-reg-alloc-r1.ll
|
|
|
|
named-reg-alloc-r2-64.ll
|
|
|
|
named-reg-alloc-r2.ll
|
|
|
|
named-reg-alloc-r13-64.ll
|
|
|
|
named-reg-alloc-r13.ll
|
|
|
|
neg.ll
|
|
|
|
negctr.ll
|
|
|
|
no-dead-strip.ll
|
|
|
|
no-extra-fp-conv-ldst.ll
|
|
|
|
no-pref-jumps.ll
|
|
|
|
no-rlwimi-trivial-commute.mir
|
test: Always treat .mir files as tests even outside of CodeGen/MIR
|
2016-04-04 21:23:44 +00:00 |
|
novrsave.ll
|
|
|
|
opt-cmp-inst-cr0-live.ll
|
[PPC64] Mark CR0 Live if PPCInstrInfo::optimizeCompareInstr Creates a Use of CR0
|
2016-04-12 03:10:52 +00:00 |
|
optcmp.ll
|
[PPC] Enable transformations in PPCPassConfig::addIRPasses at O2
|
2016-04-07 15:30:55 +00:00 |
|
optnone-crbits-i1-ret.ll
|
|
|
|
or-addressing-mode.ll
|
|
|
|
p8-isel-sched.ll
|
|
|
|
p8-scalar_vector_conversions.ll
|
Bitcasts between FP and INT values using direct moves
|
2015-12-10 13:35:28 +00:00 |
|
p8altivec-shuffles-pred.ll
|
[PowerPC] Don't always consider P8Altivec-only masks in LowerVECTOR_SHUFFLE
|
2015-09-02 16:52:37 +00:00 |
|
peephole-align.ll
|
[PPC]: Peephole optimize small accesss to aligned globals.
|
2015-12-11 00:47:36 +00:00 |
|
pip-inner.ll
|
|
|
|
popcnt.ll
|
[PowerPC] Refactor popcnt[dw] target features
|
2016-03-29 01:36:01 +00:00 |
|
post-ra-ec.ll
|
|
|
|
ppc32-align-long-double-sf.ll
|
[PowerPC] fix register alignment for long double type
|
2016-05-09 12:27:39 +00:00 |
|
ppc32-cyclecounter.ll
|
|
|
|
ppc32-i1-vaarg.ll
|
|
|
|
ppc32-lshrti3.ll
|
|
|
|
ppc32-nest.ll
|
|
|
|
ppc32-pic-large.ll
|
|
|
|
ppc32-pic.ll
|
|
|
|
ppc32-vacopy.ll
|
|
|
|
ppc64-32bit-addic.ll
|
|
|
|
ppc64-abi-extend.ll
|
|
|
|
ppc64-align-long-double.ll
|
Fix Load Control Dependence in MemCpy Generation
|
2016-04-08 19:44:40 +00:00 |
|
ppc64-altivec-abi.ll
|
|
|
|
ppc64-anyregcc-crash.ll
|
|
|
|
ppc64-anyregcc.ll
|
|
|
|
ppc64-byval-align.ll
|
|
|
|
ppc64-calls.ll
|
[PPC] Enable transformations in PPCPassConfig::addIRPasses at O2
|
2016-04-07 15:30:55 +00:00 |
|
ppc64-crash.ll
|
|
|
|
ppc64-cyclecounter.ll
|
|
|
|
ppc64-elf-abi.ll
|
|
|
|
ppc64-fastcc-fast-isel.ll
|
|
|
|
ppc64-fastcc.ll
|
[ScheduleDAGInstrs::buildSchedGraph()] Handling of memory dependecies rewritten.
|
2016-02-03 17:52:29 +00:00 |
|
ppc64-func-desc-hoist.ll
|
|
|
|
ppc64-gep-opt.ll
|
|
|
|
ppc64-i128-abi.ll
|
|
|
|
ppc64-icbt-pwr7.ll
|
SelectionDAG: Introduce PersistentID to SDNode for assert builds.
|
2015-09-18 17:41:00 +00:00 |
|
ppc64-icbt-pwr8.ll
|
|
|
|
ppc64-linux-func-size.ll
|
[MC] Use .p2align instead of .align
|
2016-01-26 00:03:25 +00:00 |
|
ppc64-nest.ll
|
|
|
|
ppc64-nonfunc-calls.ll
|
|
|
|
ppc64-patchpoint.ll
|
|
|
|
ppc64-prefetch.ll
|
|
|
|
ppc64-r2-alloc.ll
|
|
|
|
ppc64-sibcall-shrinkwrap.ll
|
[ppc64] Temporary disable sibling call optimization on ppc64 due to breaking test case
|
2016-04-06 10:48:36 +00:00 |
|
ppc64-sibcall.ll
|
[ppc64] Temporary disable sibling call optimization on ppc64 due to breaking test case
|
2016-04-06 10:48:36 +00:00 |
|
ppc64-smallarg.ll
|
|
|
|
ppc64-stackmap-nops.ll
|
|
|
|
ppc64-stackmap.ll
|
|
|
|
ppc64-toc.ll
|
[MC] Use .p2align instead of .align
|
2016-01-26 00:03:25 +00:00 |
|
ppc64-vaarg-int.ll
|
|
|
|
ppc64-zext.ll
|
|
|
|
ppc64le-aggregates.ll
|
|
|
|
ppc64le-calls.ll
|
|
|
|
ppc64le-crsave.ll
|
|
|
|
ppc64le-localentry-large.ll
|
[PowerPC] Fix large code model with the ELFv2 ABI
|
2016-01-13 13:12:23 +00:00 |
|
ppc64le-localentry.ll
|
[PowerPC] Fix large code model with the ELFv2 ABI
|
2016-01-13 13:12:23 +00:00 |
|
ppc64le-smallarg.ll
|
|
|
|
ppc440-fp-basic.ll
|
|
|
|
ppc440-msync.ll
|
|
|
|
ppc-crbits-onoff.ll
|
|
|
|
ppc-empty-fs.ll
|
Revert "Change memcpy/memset/memmove to have dest and source alignments."
|
2015-11-19 05:56:52 +00:00 |
|
ppc-prologue.ll
|
|
|
|
ppc-shrink-wrapping.ll
|
[PPC] Enable transformations in PPCPassConfig::addIRPasses at O2
|
2016-04-07 15:30:55 +00:00 |
|
ppc-vaarg-agg.ll
|
|
|
|
ppcf128-1-opt.ll
|
|
|
|
ppcf128-1.ll
|
|
|
|
ppcf128-2.ll
|
|
|
|
ppcf128-3.ll
|
|
|
|
ppcf128-4.ll
|
|
|
|
ppcf128-endian.ll
|
Address buildbot fallout from r259065
|
2016-01-28 18:59:04 +00:00 |
|
ppcf128sf.ll
|
[PPC] Move PPC test to a PPC-specific dir
|
2016-02-04 16:14:59 +00:00 |
|
ppcsoftops.ll
|
[PowerPC] add comment to test
|
2016-04-18 11:52:14 +00:00 |
|
pr3711_widen_bit.ll
|
|
|
|
pr12757.ll
|
|
|
|
pr13641.ll
|
|
|
|
pr13891.ll
|
|
|
|
pr15031.ll
|
|
|
|
pr15359.ll
|
|
|
|
pr15630.ll
|
|
|
|
pr15632.ll
|
|
|
|
pr16556-2.ll
|
|
|
|
pr16556.ll
|
|
|
|
pr16573.ll
|
|
|
|
pr17168.ll
|
[PR27284] Reverse the ownership between DICompileUnit and DISubprogram.
|
2016-04-15 15:57:41 +00:00 |
|
pr17354.ll
|
|
|
|
pr18663-2.ll
|
|
|
|
pr18663.ll
|
|
|
|
pr20442.ll
|
|
|
|
pr22711.ll
|
|
|
|
pr24216.ll
|
|
|
|
pr24546.ll
|
[PR27284] Reverse the ownership between DICompileUnit and DISubprogram.
|
2016-04-15 15:57:41 +00:00 |
|
pr24636.ll
|
[DAGCombine] Fixup SETCC legality checking
|
2015-08-31 23:15:04 +00:00 |
|
pr25157-peephole.ll
|
[PowerPC] Add an MI SSA peephole pass.
|
2015-11-10 21:38:26 +00:00 |
|
pr25157.ll
|
[PowerPC] Fix invalid lxvdsx optimization (PR25157)
|
2015-10-14 20:45:00 +00:00 |
|
pr26180.ll
|
Fix for PR26180
|
2016-02-29 16:42:27 +00:00 |
|
pr26193.ll
|
Add the missing test case for PR26193
|
2016-02-05 15:03:17 +00:00 |
|
pr26356.ll
|
Fix for PR 26356
|
2016-02-04 23:14:42 +00:00 |
|
pr26378.ll
|
Fix for PR 26378
|
2016-03-12 10:23:07 +00:00 |
|
pr26381.ll
|
Test case for PR 26381
|
2016-02-04 01:58:20 +00:00 |
|
pr26617.ll
|
[PowerPC] Disable direct moves for extractelement and bitcast in 32-bit mode
|
2016-03-24 13:40:33 +00:00 |
|
pr26690.ll
|
[PPC64] Use mfocrf in prologue when we only need to save 1 nonvolatile CR field
|
2016-04-12 03:04:44 +00:00 |
|
pr27078.ll
|
[PowerPC] Generate VSX version of splat word
|
2016-05-04 16:04:02 +00:00 |
|
pr27350.ll
|
Fix typing on generated LXV2DX/STXV2DX instructions
|
2016-04-15 15:01:38 +00:00 |
|
preinc-ld-sel-crash.ll
|
|
|
|
preincprep-invoke.ll
|
[PPC] Enable transformations in PPCPassConfig::addIRPasses at O2
|
2016-04-07 15:30:55 +00:00 |
|
preincprep-nontrans-crash.ll
|
[PowerPC] Fix LoopPreIncPrep not to depend on SCEV constant simplifications
|
2015-11-08 08:04:40 +00:00 |
|
private.ll
|
|
|
|
pwr3-6x.ll
|
|
|
|
pwr7-gt-nop.ll
|
|
|
|
qpx-bv-sint.ll
|
[PPC] Enable transformations in PPCPassConfig::addIRPasses at O2
|
2016-04-07 15:30:55 +00:00 |
|
qpx-bv.ll
|
|
|
|
qpx-func-clobber.ll
|
|
|
|
qpx-load-splat.ll
|
[PowerPC] Cleanup test/CodeGen/PowerPC/qpx-load-splat.ll
|
2016-03-31 20:45:00 +00:00 |
|
qpx-load.ll
|
|
|
|
qpx-recipest.ll
|
|
|
|
qpx-rounding-ops.ll
|
|
|
|
qpx-s-load.ll
|
|
|
|
qpx-s-sel.ll
|
[PPC] Enable transformations in PPCPassConfig::addIRPasses at O2
|
2016-04-07 15:30:55 +00:00 |
|
qpx-s-store.ll
|
|
|
|
qpx-sel.ll
|
[PPC] Enable transformations in PPCPassConfig::addIRPasses at O2
|
2016-04-07 15:30:55 +00:00 |
|
qpx-split-vsetcc.ll
|
[PPC] Enable transformations in PPCPassConfig::addIRPasses at O2
|
2016-04-07 15:30:55 +00:00 |
|
qpx-store.ll
|
|
|
|
qpx-unal-cons-lds.ll
|
[PowerPC] Try harder to find a base+offset when looking for consecutive accesses
|
2015-09-03 22:37:44 +00:00 |
|
qpx-unalperm.ll
|
|
|
|
quadint-return.ll
|
|
|
|
r31.ll
|
|
|
|
recipest.ll
|
|
|
|
reg-coalesce-simple.ll
|
|
|
|
reg-names.ll
|
|
|
|
reloc-align.ll
|
|
|
|
remap-crash.ll
|
|
|
|
remat-imm.ll
|
|
|
|
resolvefi-basereg.ll
|
Revert "Change memcpy/memset/memmove to have dest and source alignments."
|
2015-11-19 05:56:52 +00:00 |
|
resolvefi-disp.ll
|
Revert "Change memcpy/memset/memmove to have dest and source alignments."
|
2015-11-19 05:56:52 +00:00 |
|
retaddr2.ll
|
Find available scratch register to use in function prologue and epilogue as part of shrink wrapping.
|
2015-11-16 20:22:15 +00:00 |
|
retaddr.ll
|
|
|
|
return-val-i128.ll
|
|
|
|
rlwimi2.ll
|
|
|
|
rlwimi3.ll
|
|
|
|
rlwimi-and-or-bits.ll
|
[PowerPC] Fix and(or(x, c1), c2) -> rlwimi generation
|
2015-09-05 00:02:59 +00:00 |
|
rlwimi-and.ll
|
|
|
|
rlwimi-commute.ll
|
|
|
|
rlwimi-dyn-and.ll
|
|
|
|
rlwimi-keep-rsh.ll
|
|
|
|
rlwimi.ll
|
|
|
|
rlwinm2.ll
|
|
|
|
rlwinm-zero-ext.ll
|
Codegen: [PPC] Word Rotates are Zero Extending.
|
2016-03-23 19:51:22 +00:00 |
|
rlwinm.ll
|
|
|
|
rm-zext.ll
|
|
|
|
rotl-2.ll
|
|
|
|
rotl-64.ll
|
|
|
|
rotl-rotr-crash.ll
|
Patch to fix a crash in the PowerPC back end due to ISD::ROTL and ISD::ROTR
|
2015-12-02 10:36:24 +00:00 |
|
rotl.ll
|
|
|
|
rounding-ops.ll
|
|
|
|
rs-undef-use.ll
|
|
|
|
s000-alias-misched.ll
|
|
|
|
sdag-ppcf128.ll
|
|
|
|
sdiv-pow2.ll
|
|
|
|
sections.ll
|
|
|
|
select_lt0.ll
|
|
|
|
select-cc.ll
|
|
|
|
select-i1-vs-i1.ll
|
[PowerPC] Fixup SELECT_CC (and SETCC) patterns with i1 comparison operands
|
2015-08-30 22:12:50 +00:00 |
|
selectiondag-extload-computeknownbits.ll
|
[SelectionDAG] Don't inspect !range metadata for extended loads
|
2015-10-28 03:20:10 +00:00 |
|
set0-v8i16.ll
|
|
|
|
setcc_no_zext.ll
|
|
|
|
seteq-0.ll
|
[PowerPC] Replace cntlz[.] with cntlzw[.]
|
2015-10-28 03:26:45 +00:00 |
|
shift128.ll
|
|
|
|
shl_elim.ll
|
|
|
|
shl_sext.ll
|
|
|
|
sign_ext_inreg1.ll
|
|
|
|
sj-ctr-loop.ll
|
|
|
|
sjlj.ll
|
Let SelectionDAG start to use probability-based interface to add successors.
|
2015-11-24 08:51:23 +00:00 |
|
small-arguments.ll
|
|
|
|
spill-nor0.ll
|
|
|
|
splat-bug.ll
|
|
|
|
split-index-tc.ll
|
|
|
|
srl-mask.ll
|
|
|
|
stack-protector.ll
|
[PowerPC] [SSP] Fix stack guard load for 32-bit.
|
2016-04-21 17:36:05 +00:00 |
|
stack-realign.ll
|
Find available scratch register to use in function prologue and epilogue as part of shrink wrapping.
|
2015-11-16 20:22:15 +00:00 |
|
stackmap-frame-setup.ll
|
When printing MIR, output to errs() rather than outs().
|
2016-02-19 00:18:46 +00:00 |
|
std-unal-fi.ll
|
|
|
|
stdux-constuse.ll
|
|
|
|
stfiwx-2.ll
|
|
|
|
stfiwx.ll
|
|
|
|
store-load-fwd.ll
|
|
|
|
store-update.ll
|
|
|
|
structsinmem.ll
|
Revert "Change memcpy/memset/memmove to have dest and source alignments."
|
2015-11-19 05:56:52 +00:00 |
|
structsinregs.ll
|
Revert "Change memcpy/memset/memmove to have dest and source alignments."
|
2015-11-19 05:56:52 +00:00 |
|
stubs.ll
|
|
|
|
stwu8.ll
|
Revert "Change memcpy/memset/memmove to have dest and source alignments."
|
2015-11-19 05:56:52 +00:00 |
|
stwu-gta.ll
|
|
|
|
stwux.ll
|
[PPC] Enable transformations in PPCPassConfig::addIRPasses at O2
|
2016-04-07 15:30:55 +00:00 |
|
sub-bv-types.ll
|
|
|
|
subc.ll
|
|
|
|
subreg-postra-2.ll
|
[PPC] Enable transformations in PPCPassConfig::addIRPasses at O2
|
2016-04-07 15:30:55 +00:00 |
|
subreg-postra.ll
|
[PPC] Enable transformations in PPCPassConfig::addIRPasses at O2
|
2016-04-07 15:30:55 +00:00 |
|
svr4-redzone.ll
|
[PPC] Enable transformations in PPCPassConfig::addIRPasses at O2
|
2016-04-07 15:30:55 +00:00 |
|
swaps-le-1.ll
|
|
|
|
swaps-le-2.ll
|
[PowerPC] Generate VSX version of splat word
|
2016-05-04 16:04:02 +00:00 |
|
swaps-le-3.ll
|
|
|
|
swaps-le-4.ll
|
|
|
|
swaps-le-5.ll
|
[PowerPC] Add an MI SSA peephole pass.
|
2015-11-10 21:38:26 +00:00 |
|
swaps-le-6.ll
|
[PowerPC] Add an MI SSA peephole pass.
|
2015-11-10 21:38:26 +00:00 |
|
tailcall1-64.ll
|
|
|
|
tailcall1.ll
|
|
|
|
tailcallpic1.ll
|
|
|
|
thread-pointer.ll
|
[PowerPC] Add support for llvm.thread.pointer
|
2016-04-26 10:37:22 +00:00 |
|
tls_get_addr_clobbers.ll
|
Add call sequence start and end for __tls_get_addr
|
2016-01-08 02:06:19 +00:00 |
|
tls_get_addr_stackframe.ll
|
[PPC] Enable transformations in PPCPassConfig::addIRPasses at O2
|
2016-04-07 15:30:55 +00:00 |
|
tls-cse.ll
|
|
|
|
tls-pic.ll
|
|
|
|
tls-store2.ll
|
|
|
|
tls.ll
|
|
|
|
toc-load-sched-bug.ll
|
Revert "Change memcpy/memset/memmove to have dest and source alignments."
|
2015-11-19 05:56:52 +00:00 |
|
trampoline.ll
|
|
|
|
unal4-std.ll
|
[PPC] Enable transformations in PPCPassConfig::addIRPasses at O2
|
2016-04-07 15:30:55 +00:00 |
|
unal-altivec2.ll
|
|
|
|
unal-altivec-wint.ll
|
|
|
|
unal-altivec.ll
|
[PPC] Enable transformations in PPCPassConfig::addIRPasses at O2
|
2016-04-07 15:30:55 +00:00 |
|
unal-vec-ldst.ll
|
[PowerPC] Cleanup cost model for unaligned vector loads/stores
|
2015-09-02 21:03:28 +00:00 |
|
unal-vec-negarith.ll
|
[PowerPC] Compute the MMO offset for an unaligned load with signed arithmetic
|
2015-09-03 21:12:15 +00:00 |
|
unaligned.ll
|
|
|
|
unsafe-math.ll
|
|
|
|
unwind-dw2-g.ll
|
[PR27284] Reverse the ownership between DICompileUnit and DISubprogram.
|
2016-04-15 15:57:41 +00:00 |
|
unwind-dw2.ll
|
|
|
|
vaddsplat.ll
|
|
|
|
varargs-struct-float.ll
|
|
|
|
varargs.ll
|
|
|
|
variable_elem_vec_extracts.ll
|
Bitcasts between FP and INT values using direct moves
|
2015-12-10 13:35:28 +00:00 |
|
vcmp-fold.ll
|
|
|
|
vec_abs.ll
|
[PPC] backend changes to generate xvabs[s,d]p and xvnabs[s,d]p instructions
|
2016-03-09 17:48:01 +00:00 |
|
vec_add_sub_doubleword.ll
|
|
|
|
vec_add_sub_quadword.ll
|
|
|
|
vec_auto_constant.ll
|
|
|
|
vec_br_cmp.ll
|
|
|
|
vec_buildvector_loadstore.ll
|
|
|
|
vec_call.ll
|
|
|
|
vec_clz.ll
|
|
|
|
vec_cmp.ll
|
|
|
|
vec_cmpd.ll
|
|
|
|
vec_constants.ll
|
|
|
|
vec_conv.ll
|
|
|
|
vec_extload.ll
|
|
|
|
vec_fmuladd.ll
|
|
|
|
vec_fneg.ll
|
[PPC] Legalize FNEG on PPC when possible
|
2016-02-26 21:59:44 +00:00 |
|
vec_insert.ll
|
|
|
|
vec_mergeow.ll
|
|
|
|
vec_minmax.ll
|
|
|
|
vec_misaligned.ll
|
|
|
|
vec_mul_even_odd.ll
|
|
|
|
vec_mul.ll
|
|
|
|
vec_perf_shuffle.ll
|
|
|
|
vec_popcnt.ll
|
|
|
|
vec_rotate_shift.ll
|
|
|
|
vec_rounding.ll
|
|
|
|
vec_select.ll
|
|
|
|
vec_shift.ll
|
|
|
|
vec_shuffle_le.ll
|
|
|
|
vec_shuffle_p8vector_le.ll
|
|
|
|
vec_shuffle_p8vector.ll
|
|
|
|
vec_shuffle.ll
|
|
|
|
vec_splat_constant.ll
|
|
|
|
vec_splat.ll
|
|
|
|
vec_sqrt.ll
|
|
|
|
vec_urem_const.ll
|
|
|
|
vec_veqv_vnand_vorc.ll
|
|
|
|
vec_vrsave.ll
|
|
|
|
vec_zero.ll
|
|
|
|
vec-abi-align.ll
|
|
|
|
vec-asm-disabled.ll
|
Revert "[llc] New diagnostic handler"
|
2016-05-14 14:37:11 +00:00 |
|
vector-identity-shuffle.ll
|
|
|
|
vector-merge-store-fp-constants.ll
|
DAGCombiner: Replace store of FP constant after attemping store merges
|
2015-09-21 15:59:46 +00:00 |
|
vector.ll
|
|
|
|
vperm-instcombine.ll
|
|
|
|
vperm-lowering.ll
|
|
|
|
vrsave-spill.ll
|
|
|
|
vrspill.ll
|
|
|
|
vsel-prom.ll
|
|
|
|
vsx_insert_extract_le.ll
|
[PowerPC] Add an MI SSA peephole pass.
|
2015-11-10 21:38:26 +00:00 |
|
vsx_scalar_ld_st.ll
|
|
|
|
vsx_shuffle_le.ll
|
[PowerPC] Add an MI SSA peephole pass.
|
2015-11-10 21:38:26 +00:00 |
|
vsx-args.ll
|
|
|
|
vsx-div.ll
|
|
|
|
vsx-elementary-arith.ll
|
|
|
|
vsx-fma-m.ll
|
[ScheduleDAGInstrs::buildSchedGraph()] Handling of memory dependecies rewritten.
|
2016-02-03 17:52:29 +00:00 |
|
vsx-fma-mutate-trivial-copy.ll
|
[PowerPC] PPCVSXFMAMutate should ignore trivial-copy addends
|
2015-08-24 23:48:28 +00:00 |
|
vsx-fma-mutate-undef.ll
|
[PPC] Enable transformations in PPCPassConfig::addIRPasses at O2
|
2016-04-07 15:30:55 +00:00 |
|
vsx-fma-sp.ll
|
[ScheduleDAGInstrs::buildSchedGraph()] Handling of memory dependecies rewritten.
|
2016-02-03 17:52:29 +00:00 |
|
vsx-infl-copy1.ll
|
[PPC] Enable transformations in PPCPassConfig::addIRPasses at O2
|
2016-04-07 15:30:55 +00:00 |
|
vsx-infl-copy2.ll
|
|
|
|
vsx-ldst-builtin-le.ll
|
|
|
|
vsx-ldst.ll
|
|
|
|
vsx-minmax.ll
|
|
|
|
vsx-p8.ll
|
|
|
|
vsx-recip-est.ll
|
|
|
|
vsx-self-copy.ll
|
|
|
|
vsx-spill-norwstore.ll
|
|
|
|
vsx-spill.ll
|
|
|
|
vsx-word-splats.ll
|
[PowerPC] Generate VSX version of splat word
|
2016-05-04 16:04:02 +00:00 |
|
vsx.ll
|
[PowerPC] Add an MI SSA peephole pass.
|
2015-11-10 21:38:26 +00:00 |
|
vtable-reloc.ll
|
|
|
|
weak_def_can_be_hidden.ll
|
|
|
|
xvcmpeqdp-v2f64.ll
|
[PPC] Enable transformations in PPCPassConfig::addIRPasses at O2
|
2016-04-07 15:30:55 +00:00 |
|
xxleqv_xxlnand_xxlorc.ll
|
|
|
|
zero-not-run.ll
|
|
|
|
zext-free.ll
|
|
|
