1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-21 12:02:58 +02:00
llvm-mirror/test/CodeGen
Nicolai Haehnle bbd04b8c49 [DivergenceAnalysis] Treat PHI with incoming undef as constant
Summary:
If a PHI has an incoming undef, we can pretend that it is equal to one
non-undef, non-self incoming value.

This is particularly relevant in combination with the StructurizeCFG
pass, which introduces PHI nodes with undefs. Previously, this lead to
branch conditions that were uniform before StructurizeCFG to become
non-uniform afterwards, which confused the SIAnnotateControlFlow
pass.

This fixes a crash when Mesa radeonsi compiles a shader from
dEQP-GLES3.functional.shaders.switch.switch_in_for_loop_dynamic_vertex

Reviewers: arsenm, tstellarAMD, jingyue

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D19013

llvm-svn: 266347
2016-04-14 17:42:47 +00:00
..
AArch64 AArch64: expand cmpxchg after regalloc at -O0. 2016-04-14 17:03:29 +00:00
AMDGPU [DivergenceAnalysis] Treat PHI with incoming undef as constant 2016-04-14 17:42:47 +00:00
ARM [CodeGen] Teach LLVM how to lower @llvm.{min,max}num to {MIN,MAX}NAN 2016-04-14 07:13:24 +00:00
BPF
CPP
Generic
Hexagon
Inputs
Lanai [lanai] Add areMemAccessesTriviallyDisjoint, getMemOpBaseRegImmOfs and getMemOpBaseRegImmOfsWidth. 2016-04-14 16:47:42 +00:00
Mips Summary: 2016-04-14 13:43:17 +00:00
MIR CodeGen: Clear the MFI's save and restore point after PrologEpilogInserter 2016-04-12 23:21:53 +00:00
MSP430
NVPTX
PowerPC [ppc] add tests to show potential andc optimization 2016-04-13 23:23:30 +00:00
SPARC
SystemZ [SystemZ] Support conditional indirect sibling calls via BCR 2016-04-11 12:12:32 +00:00
Thumb
Thumb2 ARM: use r7 as the frame-pointer on all MachO targets. 2016-04-11 22:27:40 +00:00
WebAssembly [WebAssembly] Fix debug info in reg-stackify.ll test 2016-04-12 20:12:05 +00:00
WinEH
X86 Revert "Support arbitrary addrspace pointers in masked load/store intrinsics" 2016-04-14 08:47:17 +00:00
XCore