Duncan P. N. Exon Smith 5943cdad84 AArch64: Make getNextNode() cleanup in r249764 more clear ... After r249764, if you didn't see the full context, it looked like `std::next(I)` would get the same result as `++MachineBasicBlock::iterator(I)`. However, `I` is a `MachineInstr*` (not a `MachineBasicBlock::iterator`). Use the `getIterator()` helper I added later (r249782) to make this code more clear. llvm-svn: 249852		2015-10-09 16:54:54 +00:00
..
AsmParser	[MC layer][AArch64] llvm-mc accepts 4-bit immediate values for	2015-10-05 13:42:31 +00:00
Disassembler	[MC layer][AArch64] llvm-mc accepts 4-bit immediate values for	2015-10-05 13:42:31 +00:00
InstPrinter
MCTargetDesc	Fix pr24486.	2015-10-05 12:07:05 +00:00
TargetInfo
Utils
AArch64.h
AArch64.td	[AArch64] Lower READCYCLECOUNTER using MRS PMCCTNR_EL0.	2015-09-01 16:23:45 +00:00
AArch64A53Fix835769.cpp	Fix some comment typos.	2015-08-08 18:27:36 +00:00
AArch64A57FPLoadBalancing.cpp
AArch64AddressTypePromotion.cpp
AArch64AdvSIMDScalarPass.cpp
AArch64AsmPrinter.cpp
AArch64BranchRelaxation.cpp
AArch64CallingConvention.h
AArch64CallingConvention.td
AArch64CleanupLocalDynamicTLSPass.cpp	AArch64: Make getNextNode() cleanup in r249764 more clear	2015-10-09 16:54:54 +00:00
AArch64CollectLOH.cpp	[AArch64][CollectLOH] Remove an invalid assertion and add a test case exposing it.	2015-08-31 19:02:00 +00:00
AArch64ConditionalCompares.cpp
AArch64ConditionOptimizer.cpp
AArch64DeadRegisterDefinitionsPass.cpp
AArch64ExpandPseudoInsts.cpp
AArch64FastISel.cpp	FastISel: Factor out common code; NFC intended	2015-08-26 01:38:00 +00:00
AArch64FrameLowering.cpp	Remove redundant TargetFrameLowering::getFrameIndexOffset virtual	2015-08-15 02:32:35 +00:00
AArch64FrameLowering.h	Remove redundant TargetFrameLowering::getFrameIndexOffset virtual	2015-08-15 02:32:35 +00:00
AArch64InstrAtomics.td
AArch64InstrFormats.td	[MC layer][AArch64] llvm-mc accepts 4-bit immediate values for	2015-10-05 13:42:31 +00:00
AArch64InstrInfo.cpp	[Machine Combiner] Refactor machine reassociation code to be target-independent.	2015-09-21 15:09:11 +00:00
AArch64InstrInfo.h	MIR Serialization: Serialize the operand's bit mask target flags.	2015-08-18 22:52:15 +00:00
AArch64InstrInfo.td	[MC layer][AArch64] llvm-mc accepts 4-bit immediate values for	2015-10-05 13:42:31 +00:00
AArch64ISelDAGToDAG.cpp	[MC layer][AArch64] llvm-mc accepts 4-bit immediate values for	2015-10-05 13:42:31 +00:00
AArch64ISelLowering.cpp	Improve ISel across lane float min/max reduction	2015-10-09 14:11:25 +00:00
AArch64ISelLowering.h	[AArch64] Emit clrex in the expanded cmpxchg fail block.	2015-09-22 17:21:44 +00:00
AArch64LoadStoreOptimizer.cpp	[AArch64] Deprecate a command-line option used for testing.	2015-10-01 18:17:12 +00:00
AArch64MachineFunctionInfo.h
AArch64MCInstLower.cpp
AArch64MCInstLower.h
AArch64PBQPRegAlloc.cpp
AArch64PBQPRegAlloc.h
AArch64PerfectShuffle.h
AArch64PromoteConstant.cpp
AArch64RegisterInfo.cpp
AArch64RegisterInfo.h
AArch64RegisterInfo.td
AArch64SchedA53.td
AArch64SchedA57.td
AArch64SchedA57WriteRes.td
AArch64SchedCyclone.td
AArch64Schedule.td
AArch64SelectionDAGInfo.cpp
AArch64SelectionDAGInfo.h
AArch64StorePairSuppress.cpp
AArch64Subtarget.cpp	Revert r247692: Replace Triple with a new TargetTuple in MCTargetDesc/* and related. NFC.	2015-09-15 16:17:27 +00:00
AArch64Subtarget.h	Add Triple::isAndroid().	2015-10-08 21:21:24 +00:00
AArch64TargetMachine.cpp	constify the Function parameter to the TTI creation callback and	2015-09-16 23:38:13 +00:00
AArch64TargetMachine.h
AArch64TargetObjectFile.cpp
AArch64TargetObjectFile.h
AArch64TargetTransformInfo.cpp	[CostModel][AArch64] Remove amortization factor for some of the vector select instructions	2015-09-09 15:35:02 +00:00
AArch64TargetTransformInfo.h	constify the Function parameter to the TTI creation callback and	2015-09-16 23:38:13 +00:00
CMakeLists.txt
LLVMBuild.txt
Makefile