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llvm-mirror/lib/Target/Hexagon
Brendon Cahoon ccb1095e5c [Hexagon] Fix segment start to adjust for gaps between segments
The Hexagon Vector Combine pass genertes stores for a complete
aligned vector. The start of each section is a multiple of the
vector size, so that value is passed to normalize to compute
the offset of the stores in the section.  The first store may
not occur at offset 0 when there is a gap between sections.
2021-01-19 12:49:39 -06:00
..
AsmParser [llvm] Use llvm::erase_value and llvm::erase_if (NFC) 2021-01-02 09:24:15 -08:00
Disassembler llvmbuildectomy - replace llvm-build by plain cmake 2020-11-13 10:35:24 +01:00
MCTargetDesc [llvm] Use llvm::drop_begin (NFC) 2021-01-14 20:30:33 -08:00
TargetInfo llvmbuildectomy - replace llvm-build by plain cmake 2020-11-13 10:35:24 +01:00
BitTracker.cpp [NFC][MC] TargetRegisterInfo::getSubReg is a MCRegister. 2020-12-02 15:46:38 -08:00
BitTracker.h [NFC][MC] TargetRegisterInfo::getSubReg is a MCRegister. 2020-12-02 15:46:38 -08:00
CMakeLists.txt [Hexagon] Realign HVX vectors wherever possible 2020-12-09 17:11:25 -06:00
Hexagon.h Hexagon.h - remove unnecessary includes. NFCI. 2020-09-10 16:59:43 +01:00
Hexagon.td
HexagonArch.h
HexagonAsmPrinter.cpp
HexagonAsmPrinter.h
HexagonBitSimplify.cpp [NFC] Use [MC]Register for Hexagon target 2020-11-18 08:17:07 -08:00
HexagonBitTracker.cpp [NFC][MC] TargetRegisterInfo::getSubReg is a MCRegister. 2020-12-02 15:46:38 -08:00
HexagonBitTracker.h [NFC][MC] TargetRegisterInfo::getSubReg is a MCRegister. 2020-12-02 15:46:38 -08:00
HexagonBlockRanges.cpp [llvm] Use llvm::sort (NFC) 2021-01-17 10:39:45 -08:00
HexagonBlockRanges.h [NFC] Use [MC]Register for Hexagon target 2020-11-18 08:17:07 -08:00
HexagonBranchRelaxation.cpp
HexagonCallingConv.td
HexagonCFGOptimizer.cpp Hexagon.h - remove unnecessary includes. NFCI. 2020-09-10 16:59:43 +01:00
HexagonCommonGEP.cpp [Target] Use llvm::append_range (NFC) 2021-01-03 09:57:43 -08:00
HexagonConstExtenders.cpp [NFC] Use [MC]Register for Hexagon target 2020-11-18 08:17:07 -08:00
HexagonConstPropagation.cpp [NFC] Use [MC]Register for Hexagon target 2020-11-18 08:17:07 -08:00
HexagonCopyToCombine.cpp Hexagon.h - remove unnecessary includes. NFCI. 2020-09-10 16:59:43 +01:00
HexagonDepArch.h
HexagonDepArch.td
HexagonDepDecoders.inc
HexagonDepIICHVX.td
HexagonDepIICScalar.td
HexagonDepInstrFormats.td
HexagonDepInstrInfo.td
HexagonDepITypes.h
HexagonDepITypes.td
HexagonDepMapAsm2Intrin.td
HexagonDepMappings.td
HexagonDepMask.h
HexagonDepOperands.td
HexagonDepTimingClasses.h
HexagonEarlyIfConv.cpp [NFC] Use [MC]Register for Hexagon target 2020-11-18 08:17:07 -08:00
HexagonExpandCondsets.cpp [llvm] Use *::empty (NFC) 2021-01-16 09:40:55 -08:00
HexagonFixupHwLoops.cpp
HexagonFrameLowering.cpp [NFC] Use [MC]Register for Hexagon target 2020-11-18 08:17:07 -08:00
HexagonFrameLowering.h [SVE] Return StackOffset for TargetFrameLowering::getFrameIndexReference. 2020-11-05 11:02:18 +00:00
HexagonGenExtract.cpp Fix HexagonGenExtract return status 2020-07-13 20:41:59 +02:00
HexagonGenInsert.cpp [Target] Use llvm::erase_if (NFC) 2020-12-20 17:43:22 -08:00
HexagonGenMux.cpp
HexagonGenPredicate.cpp [NFC] Use [MC]Register for Hexagon target 2020-11-18 08:17:07 -08:00
HexagonHardwareLoops.cpp [NFC] Use [MC]Register for Hexagon target 2020-11-18 08:17:07 -08:00
HexagonHazardRecognizer.cpp
HexagonHazardRecognizer.h
HexagonIICHVX.td
HexagonIICScalar.td
HexagonInstrFormats.td
HexagonInstrFormatsV60.td
HexagonInstrFormatsV65.td
HexagonInstrInfo.cpp Add "SkipDead" parameter to TargetInstrInfo::DefinesPredicate 2020-10-21 11:52:47 +01:00
HexagonInstrInfo.h Add "SkipDead" parameter to TargetInstrInfo::DefinesPredicate 2020-10-21 11:52:47 +01:00
HexagonIntrinsics.td
HexagonIntrinsicsV5.td
HexagonIntrinsicsV60.td [Hexagon] Fix license headers in some .td files, NFC 2020-10-16 10:03:05 -05:00
HexagonISelDAGToDAG.cpp [SelectionDAG] Use Align/MaybeAlign in calls to getLoad/getStore/getExtLoad/getTruncStore. 2020-09-14 13:54:50 -07:00
HexagonISelDAGToDAG.h [Alignment][NFC] Use proper getter to retrieve alignment from ConstantInt and ConstantSDNode 2020-07-03 08:06:43 +00:00
HexagonISelDAGToDAGHVX.cpp [Hexagon] Handle additional shuffles that can be made perfect 2020-10-29 19:09:00 -05:00
HexagonISelLowering.cpp [Hexagon] Fix bitcasting v1i8 -> i8 2020-12-15 16:01:24 -06:00
HexagonISelLowering.h [Hexagon] Custom-widen SETCC's operands 2021-01-11 12:21:49 -06:00
HexagonISelLoweringHVX.cpp [Hexagon] Improve legalizing of ISD::SETCC result 2021-01-13 12:29:22 -06:00
HexagonLoopIdiomRecognition.cpp Require chained analyses in BasicAA and AAResults to be transitive 2021-01-11 11:50:07 +01:00
HexagonLoopIdiomRecognition.h [Hexagon][NewPM] Port -hexagon-loop-idiom and add to pipeline 2020-11-20 09:34:37 -08:00
HexagonMachineFunctionInfo.cpp
HexagonMachineFunctionInfo.h
HexagonMachineScheduler.cpp
HexagonMachineScheduler.h
HexagonMapAsm2IntrinV62.gen.td
HexagonMapAsm2IntrinV65.gen.td
HexagonMCInstLower.cpp [MC] Fix memory leak when allocating MCInst with bump allocator 2020-08-03 16:08:26 -07:00
HexagonNewValueJump.cpp [Hexagon][NFC] Remove redundant condition 2020-07-01 09:04:26 +02:00
HexagonOperands.td
HexagonOptAddrMode.cpp [RDF] Remove uses of RDFRegisters::normalize (deprecate) 2020-08-04 17:02:12 -05:00
HexagonOptimizeSZextends.cpp Hexagon.h - remove unnecessary includes. NFCI. 2020-09-10 16:59:43 +01:00
HexagonPatterns.td [Hexagon] Fix bad SDNodeXForm 2021-01-04 10:43:01 -06:00
HexagonPatternsHVX.td [Hexagon] Add HVX support for ISD::SMAX/SMIN/UMAX/UMIN instead of custom dag patterns 2020-11-27 15:46:11 +00:00
HexagonPatternsV65.td
HexagonPeephole.cpp [NFC] Use [MC]Register for Hexagon target 2020-11-18 08:17:07 -08:00
HexagonPseudo.td
HexagonRDFOpt.cpp
HexagonRegisterInfo.cpp [SVE] Return StackOffset for TargetFrameLowering::getFrameIndexReference. 2020-11-05 11:02:18 +00:00
HexagonRegisterInfo.h
HexagonRegisterInfo.td
HexagonSchedule.td
HexagonScheduleV5.td
HexagonScheduleV55.td
HexagonScheduleV60.td
HexagonScheduleV62.td
HexagonScheduleV65.td
HexagonScheduleV66.td
HexagonScheduleV67.td
HexagonScheduleV67T.td
HexagonSelectionDAGInfo.cpp [Alignment][NFC] Migrate SelectionDAGTargetInfo::EmitTargetCodeForMemcpy to Align 2020-06-30 13:12:31 +00:00
HexagonSelectionDAGInfo.h [Alignment][NFC] Migrate SelectionDAGTargetInfo::EmitTargetCodeForMemcpy to Align 2020-06-30 13:12:31 +00:00
HexagonSplitConst32AndConst64.cpp
HexagonSplitDouble.cpp [NFC] Use [MC]Register for Hexagon target 2020-11-18 08:17:07 -08:00
HexagonStoreWidening.cpp
HexagonSubtarget.cpp [Target] Use llvm::is_contained (NFC) 2020-12-13 19:35:10 -08:00
HexagonSubtarget.h [Hexagon] Move isTypeForHVX from Hexagon TTI to HexagonSubtarget, NFC 2020-11-02 14:00:45 -06:00
HexagonTargetMachine.cpp [llvm] Use Optional::getValueOr (NFC) 2021-01-12 21:43:50 -08:00
HexagonTargetMachine.h [NPM] Add target specific hook to add passes for New Pass Manager 2020-09-30 13:29:43 -07:00
HexagonTargetObjectFile.cpp [X86][AMX] Fix compilation warning introduced by 981a0bd8. 2020-12-30 22:22:13 +08:00
HexagonTargetObjectFile.h
HexagonTargetStreamer.h
HexagonTargetTransformInfo.cpp [Hexagon] Realign HVX vectors wherever possible 2020-12-09 17:11:25 -06:00
HexagonTargetTransformInfo.h [Hexagon] Move isTypeForHVX from Hexagon TTI to HexagonSubtarget, NFC 2020-11-02 14:00:45 -06:00
HexagonVectorCombine.cpp [Hexagon] Fix segment start to adjust for gaps between segments 2021-01-19 12:49:39 -06:00
HexagonVectorLoopCarriedReuse.cpp [Hexagon] Make HexagonVLCR compatibile with New PM 2020-09-21 13:45:12 -07:00
HexagonVectorLoopCarriedReuse.h [Hexagon] Make HexagonVLCR compatibile with New PM 2020-09-21 13:45:12 -07:00
HexagonVectorPrint.cpp
HexagonVExtract.cpp [Alignment][NFC] Migrate AArch64, ARM, Hexagon, MSP and NVPTX backends to Align 2020-06-30 07:56:17 +00:00
HexagonVLIWPacketizer.cpp
HexagonVLIWPacketizer.h
RDFCopy.cpp
RDFCopy.h
RDFDeadCode.cpp
RDFDeadCode.h