1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-24 03:33:20 +01:00
llvm-mirror/test/MC/Disassembler/AMDGPU
2017-04-24 20:42:27 +00:00
..
aperture-regs.ll AMDGPU: Fix disassembly of aperture registers 2017-02-18 18:41:41 +00:00
dpp_vi.txt [AMDGPU] Disassembler: fix for disaasembling v_mac_f32/16_dpp/sdwa 2016-12-22 11:30:48 +00:00
ds_vi.txt [AMDGPU][MC] Fix for Bug 28211 + LIT tests 2017-04-07 13:07:13 +00:00
flat_vi.txt
gfx8_dasm_all.txt [AMDGPU][mc][tests][NFC] Bulk ISA tests: update for Gfx7/Gfx8, add for Gfx9. 2017-04-24 20:42:27 +00:00
lit.local.cfg
literal16_vi.txt AMDGPU: Fix handling of 16-bit immediates 2016-12-10 00:39:12 +00:00
mac.txt AMDGPU: Fix crash when disassembling VOP3 mac 2017-04-10 17:58:06 +00:00
mov.txt
mubuf_vi.txt [AMDGPU][mc] Add support for buffer_load_dwordx3, buffer_store_dwordx3. 2016-10-07 15:53:16 +00:00
nop.txt
sdwa_vi.txt [AMDGPU] Disassembler: fix for disaasembling v_mac_f32/16_dpp/sdwa 2016-12-22 11:30:48 +00:00
si-support.txt AMDGPU: Replace assert with report_fatal_error 2017-02-15 21:50:34 +00:00
smem_vi.txt [AMDGPU] Disassembler: fix s_buffer_store_dword instructions 2016-12-05 09:58:51 +00:00
smrd_vi.txt [AMDGPU][MC][gfx8] Support 20-bit immediate offset in SMEM instructions. 2016-10-31 16:07:39 +00:00
sop1_vi.txt [AMDGPU][MC] Corrected src0 size for s_cbranch_join 2017-04-12 12:40:19 +00:00
sop2_vi.txt
sopc_vi.txt
sopk_vi.txt
sopp_vi.txt
trap_vi.txt
vintrp.txt AMDGPU: Change vintrp printing 2016-12-14 16:36:12 +00:00
vop1_gfx9.txt AMDGPU: Add definition for v_swap_b32 2017-02-28 21:09:04 +00:00
vop1_vi.txt
vop1.txt AMDGPU: Fix handling of 16-bit immediates 2016-12-10 00:39:12 +00:00
vop2_vi.txt AMDGPU: Fix name for v_ashrrev_i16 2016-12-16 17:40:11 +00:00
vop3_vi.txt [AMDGPU][MC] Fix for Bugs 28200, 28202 + LIT tests 2017-03-20 14:50:35 +00:00
vopc_vi.txt