Jessica Paquette d867e75f8e [MachineOutliner][NFC] Don't compute liveness if X16/X17/NZCV are unused ... Using the MBB flags, we can tell if X16/X17/NZCV are unused in a block, and also not live out. If this holds for all MBBs, then we can avoid checking for liveness on that candidate. Furthermore, if it holds for an individual candidate's MBB, then we can avoid checking for liveness on that candidate. llvm-svn: 346901		2018-11-14 22:23:38 +00:00
..
AsmParser	[AArch64][v8.5A] Add Memory Tagging instructions	2018-10-02 10:04:39 +00:00
Disassembler	[AArch64][v8.5A] Add Memory Tagging instructions	2018-10-02 10:04:39 +00:00
InstPrinter	[AArch64][v8.5A] Add Branch Target Identification instructions	2018-09-27 14:54:33 +00:00
MCTargetDesc	Remove unneeded friend declarations that clang-cl warns on	2018-10-29 22:38:13 +00:00
TargetInfo
Utils	[AArch64][v8.5A] Add Branch Target Identification instructions	2018-09-27 14:54:33 +00:00
AArch64.h	AArch64: add a pass to compress jump-table entries when possible.	2018-10-24 20:19:09 +00:00
AArch64.td	[AArch64] Support HiSilicon's TSV110 processor	2018-11-09 19:32:08 +00:00
AArch64A53Fix835769.cpp
AArch64A57FPLoadBalancing.cpp	llvm::sort(C.begin(), C.end(), ...) -> llvm::sort(C, ...)	2018-09-27 02:13:45 +00:00
AArch64AdvSIMDScalarPass.cpp
AArch64AsmPrinter.cpp	[ARM64][Windows] MCLayer support for exception handling	2018-10-27 06:13:06 +00:00
AArch64BranchTargets.cpp	[AArch64][v8.5A] Branch Target Identification code-generation pass	2018-10-08 14:04:24 +00:00
AArch64CallingConvention.h
AArch64CallingConvention.td	[ARM64] [Windows] Exception handling support in frame lowering	2018-10-31 09:27:01 +00:00
AArch64CallLowering.cpp	[AArch64] Support adding X[8-15,18] registers as CSRs.	2018-09-22 22:17:50 +00:00
AArch64CallLowering.h
AArch64CleanupLocalDynamicTLSPass.cpp
AArch64CollectLOH.cpp
AArch64CompressJumpTables.cpp	AArch64: add a pass to compress jump-table entries when possible.	2018-10-24 20:19:09 +00:00
AArch64CondBrTuning.cpp
AArch64ConditionalCompares.cpp
AArch64ConditionOptimizer.cpp
AArch64DeadRegisterDefinitionsPass.cpp
AArch64ExpandPseudoInsts.cpp
AArch64FalkorHWPFFix.cpp
AArch64FastISel.cpp	[COFF, ARM64] Implement Intrinsic.sponentry for AArch64	2018-11-01 23:22:25 +00:00
AArch64FrameLowering.cpp	[ARM64] [Windows] Handle funclets	2018-11-09 23:33:30 +00:00
AArch64FrameLowering.h	[ARM64] [Windows] Handle funclets	2018-11-09 23:33:30 +00:00
AArch64GenRegisterBankInfo.def
AArch64InstrAtomics.td
AArch64InstrFormats.td	[AArch64] Add support for UDF instruction	2018-10-30 11:06:50 +00:00
AArch64InstrInfo.cpp	[MachineOutliner][NFC] Don't compute liveness if X16/X17/NZCV are unused	2018-11-14 22:23:38 +00:00
AArch64InstrInfo.h	[MachineOutliner][NFC] Change getMachineOutlinerMBBFlags to isMBBSafeToOutlineFrom	2018-11-12 23:51:32 +00:00
AArch64InstrInfo.td	[ARM64] [Windows] Handle funclets	2018-11-09 23:33:30 +00:00
AArch64InstructionSelector.cpp
AArch64ISelDAGToDAG.cpp	[AArch64][v8.5A] Add speculation restriction system registers	2018-09-27 14:05:46 +00:00
AArch64ISelLowering.cpp	[x86] allow vector load narrowing with multi-use values	2018-11-10 20:05:31 +00:00
AArch64ISelLowering.h	[ARM64] [Windows] Handle funclets	2018-11-09 23:33:30 +00:00
AArch64LegalizerInfo.cpp	[GlobalISel] Fix a bug in LegalizeRuleSet::clampMaxNumElements	2018-11-01 19:01:53 +00:00
AArch64LegalizerInfo.h
AArch64LoadStoreOptimizer.cpp
AArch64MachineFunctionInfo.h	[COFF, ARM64] Make sure to forward arguments from vararg to musttail vararg	2018-10-30 20:46:10 +00:00
AArch64MacroFusion.cpp	[PATCH] [NFC][AArch64] Fix refactoring of macro fusion	2018-10-16 17:41:45 +00:00
AArch64MacroFusion.h
AArch64MCInstLower.cpp	[ARM64] [Windows] Handle funclets	2018-11-09 23:33:30 +00:00
AArch64MCInstLower.h
AArch64PBQPRegAlloc.cpp
AArch64PBQPRegAlloc.h
AArch64PerfectShuffle.h
AArch64PfmCounters.td	[llvm-exegesis][NFC] Add a way to declare the default counter binding for unbound CPUs for a target.	2018-11-09 13:15:32 +00:00
AArch64PreLegalizerCombiner.cpp	Add the missing new files from r343654	2018-10-03 02:21:30 +00:00
AArch64PromoteConstant.cpp
AArch64RedundantCopyElimination.cpp
AArch64RegisterBankInfo.cpp
AArch64RegisterBankInfo.h
AArch64RegisterBanks.td
AArch64RegisterInfo.cpp	[ARM64] [Windows] Handle funclets	2018-11-09 23:33:30 +00:00
AArch64RegisterInfo.h	[ARM64] [Windows] Handle funclets	2018-11-09 23:33:30 +00:00
AArch64RegisterInfo.td	[AArch64][v8.5A] Restrict indirect tail calls to use x16/17 only when using BTI	2018-10-08 14:09:15 +00:00
AArch64SchedA53.td
AArch64SchedA57.td
AArch64SchedA57WriteRes.td
AArch64SchedCyclone.td
AArch64SchedExynosM1.td	[AArch64] Refactor Exynos machine model	2018-10-24 21:40:43 +00:00
AArch64SchedExynosM3.td	[AArch64] Refactor Exynos machine model	2018-10-24 21:40:43 +00:00
AArch64SchedFalkor.td
AArch64SchedFalkorDetails.td
AArch64SchedKryo.td
AArch64SchedKryoDetails.td
AArch64SchedThunderX2T99.td
AArch64SchedThunderX.td
AArch64Schedule.td
AArch64SelectionDAGInfo.cpp
AArch64SelectionDAGInfo.h
AArch64SIMDInstrOpt.cpp
AArch64StorePairSuppress.cpp
AArch64Subtarget.cpp	[AArch64] Support HiSilicon's TSV110 processor	2018-11-09 19:32:08 +00:00
AArch64Subtarget.h	[AArch64] Support HiSilicon's TSV110 processor	2018-11-09 19:32:08 +00:00
AArch64SVEInstrInfo.td
AArch64SystemOperands.td	[AArch64][v8.5A] Add Memory Tagging system registers	2018-10-02 09:54:35 +00:00
AArch64TargetMachine.cpp	[AArch64] [Windows] Address post-commit review comment on r346358.	2018-11-07 22:30:56 +00:00
AArch64TargetMachine.h
AArch64TargetObjectFile.cpp
AArch64TargetObjectFile.h
AArch64TargetTransformInfo.cpp	[LV] Support vectorization of interleave-groups that require an epilog under	2018-10-31 09:57:56 +00:00
AArch64TargetTransformInfo.h	[LV] Support vectorization of interleave-groups that require an epilog under	2018-10-31 09:57:56 +00:00
CMakeLists.txt	[llvm-exegesis][NFC] Add a way to declare the default counter binding for unbound CPUs for a target.	2018-11-09 13:15:32 +00:00
LLVMBuild.txt
SVEInstrFormats.td	Remove extra whitespace. NFC. (test commit)	2018-09-28 08:45:28 +00:00