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AsmParser
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[AArch64] Move feature predctrl to predres
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2019-01-09 11:24:15 +00:00 |
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Disassembler
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[AArch64][v8.5A] Add Memory Tagging instructions
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2018-10-02 10:04:39 +00:00 |
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InstPrinter
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[AArch64][v8.5A] Add Branch Target Identification instructions
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2018-09-27 14:54:33 +00:00 |
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MCTargetDesc
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[MC] [AArch64] Support resolving signed fixups for :abs_g0_s: etc.
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2019-01-08 04:48:00 +00:00 |
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TargetInfo
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Utils
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[AArch64] Emit the correct MCExpr relocations specifiers like VK_ABS_G0, etc
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2019-01-10 04:59:44 +00:00 |
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AArch64.h
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Introduce control flow speculation tracking pass for AArch64
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2018-12-18 08:50:02 +00:00 |
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AArch64.td
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[AArch64] Adjust the feature set for Exynos
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2019-01-15 01:53:49 +00:00 |
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AArch64A53Fix835769.cpp
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Rename DEBUG macro to LLVM_DEBUG.
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2018-05-14 12:53:11 +00:00 |
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AArch64A57FPLoadBalancing.cpp
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llvm::sort(C.begin(), C.end(), ...) -> llvm::sort(C, ...)
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2018-09-27 02:13:45 +00:00 |
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AArch64AdvSIMDScalarPass.cpp
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Rename DEBUG macro to LLVM_DEBUG.
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2018-05-14 12:53:11 +00:00 |
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AArch64AsmPrinter.cpp
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[Dwarf/AArch64] Return address signing B key dwarf support
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2018-12-21 10:45:08 +00:00 |
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AArch64BranchTargets.cpp
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[AArch64][v8.5A] Branch Target Identification code-generation pass
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2018-10-08 14:04:24 +00:00 |
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AArch64CallingConvention.h
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AArch64CallingConvention.td
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AArch64: clean up some whitespace in Windows CC (NFC)
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2018-12-04 22:19:29 +00:00 |
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AArch64CallLowering.cpp
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[AArch64] Support adding X[8-15,18] registers as CSRs.
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2018-09-22 22:17:50 +00:00 |
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AArch64CallLowering.h
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[GlobalISel] Rewrite CallLowering::lowerReturn to accept multiple VRegs per Value
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2018-08-02 08:33:31 +00:00 |
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AArch64CleanupLocalDynamicTLSPass.cpp
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MachineFunction: Return reference from getFunction(); NFC
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2017-12-15 22:22:58 +00:00 |
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AArch64CollectLOH.cpp
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Rename DEBUG macro to LLVM_DEBUG.
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2018-05-14 12:53:11 +00:00 |
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AArch64CompressJumpTables.cpp
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AArch64: add a pass to compress jump-table entries when possible.
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2018-10-24 20:19:09 +00:00 |
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AArch64CondBrTuning.cpp
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Rename DEBUG macro to LLVM_DEBUG.
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2018-05-14 12:53:11 +00:00 |
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AArch64ConditionalCompares.cpp
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Rename DEBUG macro to LLVM_DEBUG.
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2018-05-14 12:53:11 +00:00 |
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AArch64ConditionOptimizer.cpp
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Rename DEBUG macro to LLVM_DEBUG.
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2018-05-14 12:53:11 +00:00 |
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AArch64DeadRegisterDefinitionsPass.cpp
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Rename DEBUG macro to LLVM_DEBUG.
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2018-05-14 12:53:11 +00:00 |
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AArch64ExpandPseudoInsts.cpp
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[AArch64] Add Tiny Code Model for AArch64
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2018-08-22 11:31:39 +00:00 |
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AArch64FalkorHWPFFix.cpp
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Rename DEBUG macro to LLVM_DEBUG.
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2018-05-14 12:53:11 +00:00 |
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AArch64FastISel.cpp
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Introduce control flow speculation tracking pass for AArch64
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2018-12-18 08:50:02 +00:00 |
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AArch64FrameLowering.cpp
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[Dwarf/AArch64] Return address signing B key dwarf support
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2018-12-21 10:45:08 +00:00 |
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AArch64FrameLowering.h
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[ARM64] [Windows] Handle funclets
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2018-11-09 23:33:30 +00:00 |
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AArch64GenRegisterBankInfo.def
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AArch64InstrAtomics.td
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[AArch64] Improve v8.1-A code-gen for atomic load-and
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2018-02-12 17:03:11 +00:00 |
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AArch64InstrFormats.td
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[NFC][AArch64] Split out backend features
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2018-12-06 15:39:17 +00:00 |
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AArch64InstrInfo.cpp
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[AArch64] Emit the correct MCExpr relocations specifiers like VK_ABS_G0, etc
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2019-01-10 04:59:44 +00:00 |
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AArch64InstrInfo.h
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[AArch64] Refactor the Exynos scheduling predicates
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2018-12-10 17:17:26 +00:00 |
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AArch64InstrInfo.td
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Initial AArch64 SLH implementation.
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2019-01-09 15:13:34 +00:00 |
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AArch64InstructionSelector.cpp
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Fix build errors introduced by r349712 on aarch64 bots.
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2018-12-20 03:27:42 +00:00 |
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AArch64ISelDAGToDAG.cpp
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[AArch64] Always use the version of computeKnownBits that returns a value. NFCI.
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2018-12-21 15:05:10 +00:00 |
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AArch64ISelLowering.cpp
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[AArch64] Explicitly use v1i64 type for llvm.aarch64.neon.abs.i64 .
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2019-01-15 00:15:24 +00:00 |
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AArch64ISelLowering.h
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[ARM64] [Windows] Handle funclets
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2018-11-09 23:33:30 +00:00 |
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AArch64LegalizerInfo.cpp
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GlobalISel: Implement fewerElements for implicit_def
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2019-01-09 07:51:52 +00:00 |
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AArch64LegalizerInfo.h
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[GISel]: Provide standard interface to observe changes in GISel passes
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2018-12-05 20:14:52 +00:00 |
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AArch64LoadStoreOptimizer.cpp
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[MI] Change the array of MachineMemOperand pointers to be
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2018-08-16 21:30:05 +00:00 |
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AArch64MachineFunctionInfo.h
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[COFF, ARM64] Make sure to forward arguments from vararg to musttail vararg
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2018-10-30 20:46:10 +00:00 |
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AArch64MacroFusion.cpp
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[AArch64] Add new target feature to fuse arithmetic and logic operations
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2019-01-14 23:54:36 +00:00 |
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AArch64MacroFusion.h
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AArch64MCInstLower.cpp
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[AArch64] Emit the correct MCExpr relocations specifiers like VK_ABS_G0, etc
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2019-01-10 04:59:44 +00:00 |
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AArch64MCInstLower.h
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AArch64PBQPRegAlloc.cpp
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Rename DEBUG macro to LLVM_DEBUG.
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2018-05-14 12:53:11 +00:00 |
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AArch64PBQPRegAlloc.h
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AArch64PerfectShuffle.h
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AArch64PfmCounters.td
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[llvm-exegesis][NFC] Add a way to declare the default counter binding for unbound CPUs for a target.
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2018-11-09 13:15:32 +00:00 |
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AArch64PreLegalizerCombiner.cpp
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[GISel]: Provide standard interface to observe changes in GISel passes
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2018-12-05 20:14:52 +00:00 |
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AArch64PromoteConstant.cpp
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Rename DEBUG macro to LLVM_DEBUG.
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2018-05-14 12:53:11 +00:00 |
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AArch64RedundantCopyElimination.cpp
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[CodeGen][AArch64] Use RegUnits to track register aliases. (NFC)
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2018-05-23 17:49:38 +00:00 |
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AArch64RegisterBankInfo.cpp
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[GlobalISel][AArch64] Add G_FCEIL to isPreISelGenericFloatingPointOpcode
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2018-12-20 21:14:15 +00:00 |
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AArch64RegisterBankInfo.h
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AArch64RegisterBanks.td
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AArch64RegisterInfo.cpp
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Introduce control flow speculation tracking pass for AArch64
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2018-12-18 08:50:02 +00:00 |
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AArch64RegisterInfo.h
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[ARM64] [Windows] Handle funclets
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2018-11-09 23:33:30 +00:00 |
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AArch64RegisterInfo.td
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[AArch64][v8.5A] Restrict indirect tail calls to use x16/17 only when using BTI
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2018-10-08 14:09:15 +00:00 |
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AArch64SchedA53.td
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[AArch64] Clean-up a few over-eager regexps in models.
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2018-03-23 11:00:42 +00:00 |
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AArch64SchedA57.td
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AArch64SchedA57WriteRes.td
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AArch64SchedCyclone.td
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AArch64SchedExynosM1.td
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[AArch64] Adjust the cost model for Exynos
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2019-01-08 22:29:58 +00:00 |
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AArch64SchedExynosM3.td
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[AArch64] Adjust the cost model for Exynos
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2019-01-08 22:29:58 +00:00 |
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AArch64SchedExynosM4.td
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[AArch64] Add pipeline model for Exynos M4
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2019-01-11 19:36:25 +00:00 |
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AArch64SchedFalkor.td
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[TableGen] When trying to reuse a scheduler class for instructions from an InstRW, make sure we haven't already seen another InstRW containing this instruction on this CPU.
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2018-03-18 19:56:15 +00:00 |
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AArch64SchedFalkorDetails.td
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[AArch64][Falkor] Correct load/store increment scheduling details
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2018-03-20 13:46:35 +00:00 |
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AArch64SchedKryo.td
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[TableGen] When trying to reuse a scheduler class for instructions from an InstRW, make sure we haven't already seen another InstRW containing this instruction on this CPU.
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2018-03-18 19:56:15 +00:00 |
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AArch64SchedKryoDetails.td
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AArch64SchedPredExynos.td
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[AArch64] Improve Exynos predicates
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2019-01-11 22:39:47 +00:00 |
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AArch64SchedPredicates.td
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[AArch64] Add new scheduling predicates
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2019-01-03 17:28:09 +00:00 |
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AArch64SchedThunderX2T99.td
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[TableGen] Emit a fatal error on inconsistencies in resource units vs cycles.
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2018-06-13 09:41:49 +00:00 |
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AArch64SchedThunderX.td
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[TableGen] When trying to reuse a scheduler class for instructions from an InstRW, make sure we haven't already seen another InstRW containing this instruction on this CPU.
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2018-03-18 19:56:15 +00:00 |
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AArch64Schedule.td
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[AArch64] Refactor the scheduling predicates (3/3) (NFC)
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2018-11-26 21:47:46 +00:00 |
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AArch64SelectionDAGInfo.cpp
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AArch64/X86: Factor out common bzero logic; NFC
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2017-12-18 23:14:28 +00:00 |
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AArch64SelectionDAGInfo.h
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AArch64SIMDInstrOpt.cpp
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[TargetSchedule] shrink interface for init(); NFCI
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2018-04-08 19:56:04 +00:00 |
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AArch64SpeculationHardening.cpp
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Initial AArch64 SLH implementation.
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2019-01-09 15:13:34 +00:00 |
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AArch64StorePairSuppress.cpp
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[CodeGen][NFC] Make TII::getMemOpBaseImmOfs return a base operand
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2018-11-28 12:00:20 +00:00 |
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AArch64Subtarget.cpp
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[AArch64] Refactor the scheduling predicates (1/3) (NFC)
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2018-11-26 21:47:28 +00:00 |
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AArch64Subtarget.h
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[AArch64] Add new target feature to fuse arithmetic and logic operations
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2019-01-14 23:54:36 +00:00 |
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AArch64SVEInstrInfo.td
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[AArch64][SVE] Asm: Enable instructions to be prefixed.
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2018-07-30 16:05:45 +00:00 |
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AArch64SystemOperands.td
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[AArch64] Move feature predctrl to predres
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2019-01-09 11:24:15 +00:00 |
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AArch64TargetMachine.cpp
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Introduce control flow speculation tracking pass for AArch64
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2018-12-18 08:50:02 +00:00 |
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AArch64TargetMachine.h
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(Re-landing) Expose a TargetMachine::getTargetTransformInfo function
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2017-12-22 18:21:59 +00:00 |
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AArch64TargetObjectFile.cpp
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[AArch64] DWARF: do not generate AT_location for thread local
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2018-08-01 23:46:49 +00:00 |
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AArch64TargetObjectFile.h
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Move TargetLoweringObjectFile from CodeGen to Target to fix layering
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2018-03-23 23:58:19 +00:00 |
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AArch64TargetTransformInfo.cpp
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[LV] Support vectorization of interleave-groups that require an epilog under
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2018-10-31 09:57:56 +00:00 |
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AArch64TargetTransformInfo.h
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[LV] Support vectorization of interleave-groups that require an epilog under
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2018-10-31 09:57:56 +00:00 |
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CMakeLists.txt
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Introduce control flow speculation tracking pass for AArch64
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2018-12-18 08:50:02 +00:00 |
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LLVMBuild.txt
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SVEInstrFormats.td
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Remove extra whitespace. NFC. (test commit)
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2018-09-28 08:45:28 +00:00 |
