Chris Lattner
4fb170e47b
fix breakage from last night, simplify code.
...
llvm-svn: 35560
2007-04-01 20:49:36 +00:00
Evan Cheng
949a34fbad
Add i16 address mode.
...
llvm-svn: 35551
2007-04-01 08:06:46 +00:00
Andrew Lenharth
ff1ff37be9
Readme
...
llvm-svn: 35533
2007-03-31 15:05:44 +00:00
Anton Korobeynikov
db09256c9f
Consistency with native compilers
...
llvm-svn: 35532
2007-03-31 13:11:52 +00:00
Bill Wendling
8f16f4bf9c
Fix comment.
...
llvm-svn: 35531
2007-03-31 09:36:12 +00:00
Chris Lattner
cea5e599ed
add a note
...
llvm-svn: 35530
2007-03-31 07:06:25 +00:00
Bill Wendling
0cba5d3c15
Match GCC's MMX calling convention.
...
llvm-svn: 35523
2007-03-31 01:03:53 +00:00
Chris Lattner
c0405a348d
implement the new addressing mode description hook.
...
llvm-svn: 35521
2007-03-30 23:15:24 +00:00
Bill Wendling
503f3e41f6
Add MMX calling conventions.
...
llvm-svn: 35489
2007-03-30 00:35:22 +00:00
Evan Cheng
526a67c09b
New entry.
...
llvm-svn: 35480
2007-03-29 21:40:13 +00:00
Evan Cheng
3a6b488265
Can't re-materialize mov r, imm in thumb since mov would clobber the condition code.
...
llvm-svn: 35479
2007-03-29 21:38:31 +00:00
Jeff Cohen
67dbe2064f
MS C does have inlining after all, just uses _inline instead of inline.
...
llvm-svn: 35467
2007-03-29 17:42:21 +00:00
Evan Cheng
bde0409264
Add support for hidden visibility to darwin/arm.
...
llvm-svn: 35448
2007-03-29 07:49:34 +00:00
Jeff Cohen
9193778f39
Fix C Backend to generate code that works with Microsoft C for the benefit of
...
front ends that do not depend on the GCC runtime (someday...).
llvm-svn: 35441
2007-03-28 23:08:37 +00:00
Bill Wendling
0549ae5cdb
Made this into a bug report: PR1286
...
llvm-svn: 35439
2007-03-28 19:07:34 +00:00
Anton Korobeynikov
1a8740c88b
Oops :)
...
llvm-svn: 35438
2007-03-28 18:38:33 +00:00
Anton Korobeynikov
d59c4e54c7
Don't allow MatchAddress recurse too much. This trims exponential
...
behaviour in some cases.
llvm-svn: 35437
2007-03-28 18:36:33 +00:00
Chris Lattner
a710f7442c
add a note
...
llvm-svn: 35435
2007-03-28 18:17:19 +00:00
Chris Lattner
26a37bfd6a
Compile CodeGen/X86/lea-3.ll:test2 to:
...
_test3:
leaq (,%rdi,4), %rax
orq %rdi, %rax
ret
instead of:
_test2:
movq %rdi, %rax
shlq $2, %rax
orq %rdi, %rax
ret
llvm-svn: 35434
2007-03-28 18:12:31 +00:00
Chris Lattner
1f18012438
Dan pointed out that this is done, remove it!
...
llvm-svn: 35430
2007-03-28 17:26:52 +00:00
Scott Michel
ae7090641f
First test check-in.
...
llvm-svn: 35429
2007-03-28 17:04:43 +00:00
Evan Cheng
a55449c051
Remove isLegalAddressImmediate.
...
llvm-svn: 35406
2007-03-28 01:53:55 +00:00
Bill Wendling
e8eccb1684
Remove cruft I put in there...
...
llvm-svn: 35394
2007-03-28 01:02:54 +00:00
Chris Lattner
9f59529c61
Fix a problem building llvm-gcc on amd64-unknown-freebsd6.2, due to the
...
system assembler not groking legal instructions like "leal (,%esi,8), %ecx".
llvm-svn: 35393
2007-03-28 00:58:40 +00:00
Bill Wendling
1087888176
Unbreak mmx arithmetic. It was barfing trying to do v8i8 arithmetic.
...
llvm-svn: 35392
2007-03-28 00:57:11 +00:00
Bill Wendling
6b555c80c0
Add the "unpack low packed data" instructions. This should be the last of
...
the MMX instructions that are needed...
llvm-svn: 35389
2007-03-27 21:20:36 +00:00
Bill Wendling
d43819da2f
Fix so that pandn is emitted instead of an xor/and combo. Add integer
...
comparison operators.
llvm-svn: 35385
2007-03-27 20:22:40 +00:00
Lauro Ramos Venancio
99fca527d3
"The C standards do say that "char" may either be a "signed char" or "unsigned
...
char" and it is up to the compilers implementation or the platform which is
followed."
http://www.arm.linux.org.uk/docs/faqs/signedchar.php
llvm-svn: 35382
2007-03-27 16:33:08 +00:00
Lauro Ramos Venancio
8b2e32de5a
bugfix: sometimes the spiller puts a load between the "mov lr, pc" and "bx" of a CALL_NOLINK.
...
llvm-svn: 35381
2007-03-27 16:19:21 +00:00
Evan Cheng
968135bd3f
findRegisterUseOperand() changed.
...
llvm-svn: 35366
2007-03-26 22:41:48 +00:00
Bill Wendling
8065cc3173
Promote to v1i64 type...
...
llvm-svn: 35353
2007-03-26 08:03:33 +00:00
Bill Wendling
3c4e130b77
Updated.
...
llvm-svn: 35352
2007-03-26 07:55:58 +00:00
Bill Wendling
a42484728c
Add support for the v1i64 type. This makes better code for this:
...
#include <mmintrin.h>
extern __m64 C;
void baz(__v2si *A, __v2si *B)
{
*A = C;
_mm_empty();
}
We get this:
_baz:
call "L1$pb"
"L1$pb":
popl %eax
movl L_C$non_lazy_ptr-"L1$pb"(%eax), %eax
movq (%eax), %mm0
movl 4(%esp), %eax
movq %mm0, (%eax)
emms
ret
GCC gives us this:
_baz:
pushl %ebx
call L3
"L00000000001$pb":
L3:
popl %ebx
subl $8, %esp
movl L_C$non_lazy_ptr-"L00000000001$pb"(%ebx), %eax
movl (%eax), %edx
movl 4(%eax), %ecx
movl 16(%esp), %eax
movl %edx, (%eax)
movl %ecx, 4(%eax)
emms
addl $8, %esp
popl %ebx
ret
llvm-svn: 35351
2007-03-26 07:53:08 +00:00
Anton Korobeynikov
a5e854461f
Fix authorship
...
llvm-svn: 35337
2007-03-25 13:44:26 +00:00
Chris Lattner
ee90a087a6
add a note
...
llvm-svn: 35334
2007-03-25 05:10:46 +00:00
Chris Lattner
6d8bbccee0
add a note
...
llvm-svn: 35330
2007-03-25 04:46:28 +00:00
Chris Lattner
31c6763051
Fix CodeGen/PowerPC/2007-03-24-cntlzd.ll
...
llvm-svn: 35329
2007-03-25 04:44:03 +00:00
Chris Lattner
b19069959d
switch TargetLowering::getConstraintType to take the entire constraint,
...
not just the first letter. No functionality change.
llvm-svn: 35322
2007-03-25 02:14:49 +00:00
Chris Lattner
18c3c6a01d
Allow the b/h/w/k constraints to be applied to values that have multiple alternatives, and end up not being registers.
...
llvm-svn: 35320
2007-03-25 02:01:03 +00:00
Chris Lattner
104e73382c
enforce the proper range for the i386 N constraint.
...
llvm-svn: 35319
2007-03-25 01:57:35 +00:00
Chris Lattner
92e2ee7b2d
Fix test/CodeGen/X86/2007-03-24-InlineAsmPModifier.ll
...
llvm-svn: 35318
2007-03-25 01:44:57 +00:00
Chris Lattner
a04981fbda
add a bad case evan though of.
...
llvm-svn: 35296
2007-03-24 06:01:32 +00:00
Anton Korobeynikov
63bff8af0c
Autodetect MMX & SSE stuff for AMD processors
...
llvm-svn: 35292
2007-03-23 23:46:48 +00:00
Bill Wendling
124f2c8706
PR1260:
...
Add final support to get the QT example to compile.
llvm-svn: 35290
2007-03-23 22:35:46 +00:00
Bill Wendling
e6a9c6dfe6
We generate a shufflevector instruction, so we don't need the builtin
...
intrinsic.
llvm-svn: 35269
2007-03-22 20:29:26 +00:00
Bill Wendling
1bcad4c1cd
Support added for shifts and unpacking MMX instructions.
...
llvm-svn: 35266
2007-03-22 18:42:45 +00:00
Dale Johannesen
44c0a5d545
repair x86 performance, dejagnu problems from previous change
...
llvm-svn: 35245
2007-03-21 21:51:52 +00:00
Anton Korobeynikov
c0842af02d
Add TODO list for MSIL backend
...
llvm-svn: 35244
2007-03-21 21:48:59 +00:00
Anton Korobeynikov
bc43d296b2
Let the new backend begin!
...
llvm-svn: 35242
2007-03-21 21:38:25 +00:00
Dale Johannesen
fb7b59f5dd
add generation of unnecessary push/pop around calls
...
llvm-svn: 35241
2007-03-21 21:16:39 +00:00
Nicolas Geoffray
205541ef78
Protect R31's frame offset from being used by callee-saved registers, when R31
...
is the frame pointer.
llvm-svn: 35233
2007-03-21 16:44:14 +00:00
Evan Cheng
00a5cbf9e7
Mark re-materializable instructions.
...
llvm-svn: 35230
2007-03-21 00:16:56 +00:00
Evan Cheng
fb9c4c2edc
Updated.
...
llvm-svn: 35229
2007-03-20 22:32:39 +00:00
Dale Johannesen
3e422e3b49
do not share old induction variables when this would result in invalid
...
instructions (that would have to be split later)
llvm-svn: 35227
2007-03-20 21:54:54 +00:00
Lauro Ramos Venancio
11d7d3fcaf
bugfix: When the source register of CALL_NOLINK was LR, the following code was emitted:
...
mov lr, pc
bx lr
So, the function was not called.
llvm-svn: 35218
2007-03-20 17:57:23 +00:00
Evan Cheng
4fec9d7228
Make two piece constant generation as a single instruction. It's re-materialized as a load from constantpool.
...
llvm-svn: 35207
2007-03-20 08:11:30 +00:00
Evan Cheng
11976abd1e
New entry.
...
llvm-svn: 35206
2007-03-20 08:10:17 +00:00
Evan Cheng
41f4f032ee
Added MRegisterInfo hook to re-materialize an instruction.
...
llvm-svn: 35205
2007-03-20 08:09:38 +00:00
Chris Lattner
b9cc0ade43
Two changes:
...
1) codegen a shift of a register as a shift, not an LEA.
2) teach the RA to convert a shift to an LEA instruction if it wants something
in three-address form.
This gives us asm diffs like:
- leal (,%eax,4), %eax
+ shll $2, %eax
which is faster on some processors and smaller on all of them.
and, more interestingly:
- movl 24(%esi), %eax
- leal (,%eax,4), %edi
+ movl 24(%esi), %edi
+ shll $2, %edi
Without #2 , #1 was a significant pessimization in some cases.
This implements CodeGen/X86/shift-codegen.ll
llvm-svn: 35204
2007-03-20 06:08:29 +00:00
Chris Lattner
1ed603c0d9
fix indentation
...
llvm-svn: 35202
2007-03-20 02:25:53 +00:00
Dale Johannesen
c526b970ce
fix obvious comment bug
...
llvm-svn: 35196
2007-03-20 00:30:56 +00:00
Evan Cheng
8d374caead
Fix naming inconsistencies.
...
llvm-svn: 35163
2007-03-19 07:48:02 +00:00
Evan Cheng
7cbf4c4582
Special LDR instructions to load from non-pc-relative constantpools. These are
...
rematerializable. Only used for constant generation for now.
llvm-svn: 35162
2007-03-19 07:20:03 +00:00
Evan Cheng
389cf8e719
Constant generation instructions are re-materializable.
...
llvm-svn: 35161
2007-03-19 07:09:02 +00:00
Evan Cheng
498f19548c
Added isReMaterializable.
...
llvm-svn: 35160
2007-03-19 06:22:07 +00:00
Chris Lattner
59fe2be1c4
fix a warning
...
llvm-svn: 35152
2007-03-19 00:39:32 +00:00
Chris Lattner
a1df6908d2
minor updates
...
llvm-svn: 35143
2007-03-18 22:41:33 +00:00
Nick Lewycky
04ecc07c25
This is implemented. We now generate:
...
entry:
icmp ugt i32 %x, 4 ; <i1>:0 [#uses=1]
br i1 %0, label %cond_true, label %cond_false
cond_true: ; preds = %entry
%tmp1 = tail call i32 (...)* @bar( i32 12 ) ; <i32> [#uses=0]
ret void
cond_false: ; preds = %entry
switch i32 %x, label %cond_true15 [
i32 4, label %cond_true3
i32 3, label %cond_true7
i32 2, label %cond_true11
i32 0, label %cond_false17
]
...
llvm-svn: 35142
2007-03-18 14:37:20 +00:00
Devang Patel
2dabb16eac
Support 'I' inline asm constraint.
...
llvm-svn: 35129
2007-03-17 00:13:28 +00:00
Lauro Ramos Venancio
f756184c5e
Only ARMv6 has BSWAP.
...
Fix MultiSource/Applications/aha test.
llvm-svn: 35128
2007-03-16 22:54:16 +00:00
Bill Wendling
8ced23ee5a
And now support for MMX logical operations.
...
llvm-svn: 35125
2007-03-16 09:44:46 +00:00
Evan Cheng
4858c6f781
Added isLegalAddressExpression(). Only allows X +/- C for now.
...
llvm-svn: 35122
2007-03-16 08:43:56 +00:00
Bill Wendling
feaff80149
Multiplication support for MMX.
...
llvm-svn: 35118
2007-03-15 21:24:36 +00:00
Evan Cheng
00edaa08b5
Under X86-64 large code model, do not emit 32-bit pc relative calls.
...
llvm-svn: 35108
2007-03-14 22:11:11 +00:00
Evan Cheng
fc80b5b712
Notes about codegen issues.
...
llvm-svn: 35107
2007-03-14 21:03:53 +00:00
Evan Cheng
50a0af3b57
Clean up.
...
llvm-svn: 35105
2007-03-14 20:20:19 +00:00
Evan Cheng
2617c8dd3a
Oops.
...
llvm-svn: 35104
2007-03-14 19:44:58 +00:00
Evan Cheng
371b8e8fa9
X86-64 JIT is in large code model. Need stubs for direct calls.
...
llvm-svn: 35097
2007-03-14 10:51:55 +00:00
Evan Cheng
1092e481ce
x86-64 JIT stub codegen.
...
llvm-svn: 35096
2007-03-14 10:48:08 +00:00
Evan Cheng
15de6714a4
Preliminary support for X86-64 JIT stub codegen.
...
llvm-svn: 35095
2007-03-14 10:44:30 +00:00
Evan Cheng
7cbde8351a
AM2 can match 2^n +/- 1. e.g. ldr r3, [r2, r2, lsl #2 ]
...
llvm-svn: 35088
2007-03-13 21:05:54 +00:00
Evan Cheng
7b24b3e474
Zero is always a legal AM immediate.
...
llvm-svn: 35087
2007-03-13 20:37:59 +00:00
Nicolas Geoffray
9c77df75ea
Stack and register alignment of call arguments in the ELF ABI
...
llvm-svn: 35083
2007-03-13 15:02:46 +00:00
Evan Cheng
92712d4884
Implement getTargetLowering() or else LSR won't be using ARM specific hooks.
...
llvm-svn: 35077
2007-03-13 01:20:42 +00:00
Evan Cheng
7767159f08
Updated TargetLowering LSR addressing mode hooks for ARM and Thumb.
...
llvm-svn: 35075
2007-03-12 23:30:29 +00:00
Evan Cheng
06d83c8fce
More flexible TargetLowering LSR hooks for testing whether an immediate is a legal target address immediate or scale.
...
llvm-svn: 35074
2007-03-12 23:29:01 +00:00
Evan Cheng
0eeb8b59eb
More flexible TargetLowering LSR hooks for testing whether an immediate is
...
a legal target address immediate or scale.
llvm-svn: 35073
2007-03-12 23:28:50 +00:00
Evan Cheng
4224fa3617
Stupid bug: SSE2 supports v2i64 add / sub.
...
llvm-svn: 35070
2007-03-12 22:58:52 +00:00
Bill Wendling
236cfc4344
Adding more arithmetic operators to MMX. This is an almost exact copy of
...
the addition. Please let me know if you have suggestions.
llvm-svn: 35055
2007-03-10 09:57:05 +00:00
Evan Cheng
a4e410aa9c
Minor stuff.
...
llvm-svn: 35049
2007-03-09 19:46:06 +00:00
Evan Cheng
d7201d12af
Add comments about LSR / ARM.
...
llvm-svn: 35048
2007-03-09 19:35:33 +00:00
Evan Cheng
2e6f19d8c8
Unfinished work and ideas related to register scavenger.
...
llvm-svn: 35047
2007-03-09 19:34:51 +00:00
Dale Johannesen
10a05b538d
apply comments from review of last patch
...
llvm-svn: 35045
2007-03-09 19:18:59 +00:00
Dale Johannesen
23c2498e23
Add some observations from CoreGraphics benchmark. Remove register
...
scavenging todo item, since it is now implemented.
llvm-svn: 35044
2007-03-09 17:58:17 +00:00
Evan Cheng
7ef8db2fb5
Implement inline asm modifier c.
...
llvm-svn: 35035
2007-03-08 22:42:46 +00:00
Bill Wendling
5fef3fd7e7
Added "padd*" support for MMX. Added MMX move stuff to X86InstrInfo so that
...
moves, loads, etc. are recognized.
llvm-svn: 35031
2007-03-08 22:09:11 +00:00
Evan Cheng
6445ce2423
Fix a typo.
...
llvm-svn: 35030
2007-03-08 21:59:30 +00:00
Evan Cheng
7d528d089c
Putting more constants which do not contain relocations into .literal{4|8|16}
...
llvm-svn: 35026
2007-03-08 08:31:54 +00:00
Evan Cheng
393fd04eb4
Change register allocation order to Dale's suggestion.
...
llvm-svn: 35021
2007-03-08 02:56:40 +00:00
Evan Cheng
2c3e4ab3a6
Bug fix. Not advancing the register scavenger iterator correctly.
...
llvm-svn: 35020
2007-03-08 02:55:08 +00:00
Evan Cheng
c79408b032
For Darwin, put constant data into .const, .const_data, .literal{4|8|16}
...
sections.
llvm-svn: 35017
2007-03-08 01:25:25 +00:00
Evan Cheng
14b63d89c1
Put constant data to .const, .const_data, .literal{4|8|16} sections.
...
llvm-svn: 35016
2007-03-08 01:07:07 +00:00
Evan Cheng
6bf2f3665e
Add ReadOnlySection directive.
...
llvm-svn: 35015
2007-03-08 01:00:38 +00:00
Evan Cheng
51c3e53eb7
Only safe to use a call-clobbered or spilled callee-saved register as scratch register.
...
llvm-svn: 35010
2007-03-07 20:30:36 +00:00
Bill Wendling
8f49ba1000
Remove useless pattern fragments.
...
llvm-svn: 35009
2007-03-07 18:23:09 +00:00
Anton Korobeynikov
85d6c1ebad
Refactoring of formal parameter flags. Enable properly use of
...
zext/sext/aext stuff.
llvm-svn: 35008
2007-03-07 16:25:09 +00:00
Bill Wendling
3c201ddd02
Properly support v8i8 and v4i16 types. It now converts them to v2i32 for
...
load and stores.
llvm-svn: 35002
2007-03-07 05:43:18 +00:00
Anton Korobeynikov
090c2d50ea
Fix DWARF debugging information on x86/Linux and (hopefully)
...
Mingw32/Cygwin targets. This fixes PR978
llvm-svn: 35000
2007-03-07 02:47:57 +00:00
Evan Cheng
493960579f
ARM always use register scavenger. No longer reserves R12.
...
llvm-svn: 34999
2007-03-07 02:46:23 +00:00
Evan Cheng
4e01b11512
Fix some brittle code. Watch out for cases where register scavenger is pointing to deleted instructions.
...
llvm-svn: 34998
2007-03-07 02:38:05 +00:00
Evan Cheng
9839628fd1
Fix one more Thumb eliminateFrameIndex bug.
...
llvm-svn: 34990
2007-03-07 00:12:18 +00:00
Evan Cheng
63ffd3e17f
Register scavenging is now on by default for ARM.
...
llvm-svn: 34987
2007-03-06 22:02:53 +00:00
Evan Cheng
6453ad00d2
Make load / store optimizer use register scavenger.
...
llvm-svn: 34986
2007-03-06 21:59:20 +00:00
Bill Wendling
a02d43fbbd
Add LOAD/STORE support for MMX.
...
llvm-svn: 34978
2007-03-06 18:53:42 +00:00
Evan Cheng
228403bfcb
Code clean up. Prepare to use register scavenger.
...
llvm-svn: 34976
2007-03-06 18:02:41 +00:00
Evan Cheng
b0c0d22f30
Minor interface change.
...
llvm-svn: 34967
2007-03-06 10:05:14 +00:00
Evan Cheng
7c90fb2d67
Scavenge a register using the register scavenger when needed.
...
llvm-svn: 34966
2007-03-06 10:03:56 +00:00
Anton Korobeynikov
6da6c8c48b
Use new SDIselParamAttr enumeration. This removes "magick" constants
...
from formal attributes' flags processing.
llvm-svn: 34963
2007-03-06 08:12:33 +00:00
Chris Lattner
26a5492049
Switch PPC return lower to use an autogenerated CC description.
...
llvm-svn: 34940
2007-03-06 00:59:59 +00:00
Bill Wendling
c52174dee3
Add the emms intrinsic for MMX support.
...
llvm-svn: 34938
2007-03-05 23:09:45 +00:00
Lauro Ramos Venancio
3f855f6a54
Use init_array/fini_array sections for static contructors/destructors when the ABI is AAPCS.
...
Fix SingleSource/Regression/C/ConstructorDestructorAttributes test on arm-linux-gnueabi.
llvm-svn: 34931
2007-03-05 17:59:58 +00:00
Jeff Cohen
98c99a3a02
Unbreak VC++ build.
...
llvm-svn: 34917
2007-03-05 00:00:42 +00:00
Chris Lattner
6d7701714e
add missing braces
...
llvm-svn: 34905
2007-03-04 06:13:52 +00:00
Reid Spencer
e0d00951c2
Make sure that when we store a value it is masked to its correct bit
...
width. This helps CBE work with non-standard integer bit widths.
llvm-svn: 34885
2007-03-03 16:33:33 +00:00
Nick Lewycky
cfed5f36a1
Emit low/high immediate loads properly for Linux/PPC.
...
llvm-svn: 34871
2007-03-03 05:29:51 +00:00
Evan Cheng
2fb461c1b5
X86-64 VACOPY needs custom expansion. va_list is a struct { i32, i32, i8*, i8* }.
...
llvm-svn: 34857
2007-03-02 23:16:35 +00:00
Anton Korobeynikov
7cec92bcd2
Simplify things
...
llvm-svn: 34849
2007-03-02 21:50:27 +00:00
Chris Lattner
55dcf58453
argument lowering should copy from the vreg shadows of live-in arguments
...
passed in registers, not directly from the pregs themselves.
llvm-svn: 34838
2007-03-02 05:12:29 +00:00
Chris Lattner
e29ef5d9cb
add a note
...
llvm-svn: 34837
2007-03-02 05:04:52 +00:00
Dale Johannesen
a6003a9eb6
eliminate unnecessary reset of SP in epilog on darwin
...
llvm-svn: 34824
2007-03-02 01:17:17 +00:00
Reid Spencer
381752cb34
Wrap a long line.
...
llvm-svn: 34799
2007-03-01 19:48:16 +00:00
Anton Korobeynikov
eaf27d276a
Ensure that fastcall'ed function is correctly mangled & stack is
...
properly aligned
llvm-svn: 34788
2007-03-01 16:29:22 +00:00
Nicolas Geoffray
4b5b81198a
Implemented the frameaddress intrinsic for PPC.
...
llvm-svn: 34787
2007-03-01 13:11:38 +00:00
Evan Cheng
07dcde8ba2
Use a spilled free callee-saved register as scratch register.
...
llvm-svn: 34785
2007-03-01 08:57:52 +00:00
Evan Cheng
8d3d4155e5
- Track which callee-saved registers are spilled.
...
- Some code clean up.
llvm-svn: 34783
2007-03-01 08:26:31 +00:00
Evan Cheng
f771a323c2
Switch from std::vector<bool> to BitVector.
...
llvm-svn: 34781
2007-03-01 07:52:44 +00:00
Bill Wendling
2aabf75e82
Get rid of verboten <iostream> include.
...
llvm-svn: 34777
2007-03-01 06:05:39 +00:00
Dale Johannesen
f38e3d7085
Changes requested in review of last pass. Also pulled isThumb into a
...
member, instead of resetting in every function that uses it.
llvm-svn: 34764
2007-02-28 23:20:38 +00:00
Evan Cheng
5dc0ece7cb
Doh. ARM::PC is obvious a reserved register.
...
llvm-svn: 34763
2007-02-28 23:12:34 +00:00
Dale Johannesen
5ec68034ee
Add intelligence about where to break large blocks.
...
llvm-svn: 34755
2007-02-28 18:41:23 +00:00
Chris Lattner
bcc44762bc
remove dead option
...
llvm-svn: 34754
2007-02-28 18:39:53 +00:00
Chris Lattner
d8c7e8999e
bugfix: fastcall does not require the first two params to be marked 'inreg',
...
they always get registers.
llvm-svn: 34748
2007-02-28 18:35:11 +00:00
Nate Begeman
2288ec3331
More Mach-O writer improvements.
...
llvm-svn: 34740
2007-02-28 07:40:50 +00:00
Chris Lattner
a66d550298
use high-level functions in CCState
...
llvm-svn: 34739
2007-02-28 07:09:55 +00:00
Chris Lattner
3663b6e73a
make use of helper functions in CCState for analyzing formals and calls.
...
llvm-svn: 34737
2007-02-28 07:00:42 +00:00
Chris Lattner
3762b44a0c
switch LowerFastCCCallTo over to using the new fastcall description.
...
llvm-svn: 34734
2007-02-28 06:26:33 +00:00
Chris Lattner
a8dd712470
switch LowerFastCCArguments over to using the autogenerated Fastcall description.
...
llvm-svn: 34733
2007-02-28 06:21:19 +00:00
Chris Lattner
9a1f1c41b0
add new CC_X86_32_FastCall calling conv, which describes fastcall on win32.
...
Factor out a CC_X86_32_Common convention, which is the part shared between
ccc, stdcall and fastcall
llvm-svn: 34732
2007-02-28 06:20:01 +00:00
Chris Lattner
3b16744840
rearrange code
...
llvm-svn: 34731
2007-02-28 06:10:12 +00:00
Chris Lattner
023751c20b
remove fastcc (not fastcall) support
...
llvm-svn: 34730
2007-02-28 06:05:16 +00:00
Chris Lattner
012066f78b
switch LowerCCCArguments over to using autogenerated CC.
...
llvm-svn: 34729
2007-02-28 05:46:49 +00:00
Chris Lattner
6424f8e245
simplify sret handling
...
llvm-svn: 34728
2007-02-28 05:39:26 +00:00
Chris Lattner
76147834d6
switch LowerCCCCallTo over to using an autogenerated callingconv
...
llvm-svn: 34727
2007-02-28 05:31:48 +00:00
Chris Lattner
d663281088
rename stuff
...
llvm-svn: 34726
2007-02-28 05:30:29 +00:00
Chris Lattner
99f65b22c9
rename some CCActions, add CCIfInReg
...
llvm-svn: 34725
2007-02-28 05:29:33 +00:00
Chris Lattner
eef57fed6e
switch return value passing and the x86-64 calling convention information
...
over to being autogenerated from the X86CallingConv.td file.
llvm-svn: 34722
2007-02-28 04:55:35 +00:00
Chris Lattner
3eb95551d7
make subtarget references work.
...
llvm-svn: 34721
2007-02-28 04:51:41 +00:00
Evan Cheng
db591ecaa8
Make requiresRegisterScavenging determination on a per MachineFunction basis.
...
llvm-svn: 34711
2007-02-28 00:59:19 +00:00
Evan Cheng
cfb0f8cfc6
Temporary: make R12 available in ARM mode if RegScavenger is being used.
...
llvm-svn: 34709
2007-02-28 00:22:44 +00:00
Evan Cheng
fa23d8e51f
Start making use of RegScavenger.
...
llvm-svn: 34708
2007-02-28 00:21:58 +00:00
Evan Cheng
116f97f2c7
PEI now passes a RegScavenger ptr to eliminateFrameIndex.
...
llvm-svn: 34707
2007-02-28 00:21:17 +00:00
Evan Cheng
4357509984
Minor tweak. Allocate r0 to r3 in reverse order, r3 is least likely to be livein to a function.
...
llvm-svn: 34701
2007-02-27 23:03:55 +00:00
Chris Lattner
da909a2df7
reenable generation of CC info
...
llvm-svn: 34699
2007-02-27 22:12:19 +00:00
Evan Cheng
b314459812
Back out previous commit temporarily.
...
llvm-svn: 34694
2007-02-27 21:47:22 +00:00
Evan Cheng
a19dd6f388
Let MRegisterInfo now owns RegScavenger; eliminateFrameIndex must preserve register kill info.
...
llvm-svn: 34692
2007-02-27 21:12:35 +00:00
Chris Lattner
0d05dc2523
implement CCMatchIfCC in terms of CCMatchIf
...
llvm-svn: 34685
2007-02-27 20:45:02 +00:00
Chris Lattner
4d29a90170
build cc info
...
llvm-svn: 34684
2007-02-27 20:44:31 +00:00
Chris Lattner
da49dee51d
a note
...
llvm-svn: 34670
2007-02-27 17:21:09 +00:00
Nicolas Geoffray
a144ebf568
Fix parenthesis for BCTRL_{ELF|Macho} test.
...
llvm-svn: 34668
2007-02-27 13:10:41 +00:00
Nicolas Geoffray
a562e5c1c5
Differentiate between the MachO and the ELF ABI the CALL instruction.
...
llvm-svn: 34667
2007-02-27 13:01:19 +00:00
Jim Laskey
f5b5a3cf77
Duplicate use of LR, take 2.
...
llvm-svn: 34666
2007-02-27 11:55:45 +00:00
Chris Lattner
90c768b913
Add calling convention info
...
llvm-svn: 34661
2007-02-27 06:59:52 +00:00
Chris Lattner
9f0e5d8b03
move target independent calling convention stuff to TargetCallingConv.td
...
llvm-svn: 34659
2007-02-27 05:57:32 +00:00
Chris Lattner
2b737abea1
fill in some holes
...
llvm-svn: 34658
2007-02-27 05:51:05 +00:00
Chris Lattner
9117648533
switch x86-64 return value lowering over to using same mechanism as argument
...
lowering uses.
llvm-svn: 34657
2007-02-27 05:28:59 +00:00
Chris Lattner
11a1c2113c
Minor refactoring of CC Lowering interfaces
...
llvm-svn: 34656
2007-02-27 05:13:54 +00:00
Chris Lattner
e34136f6d5
move CC Lowering stuff to its own public interface
...
llvm-svn: 34655
2007-02-27 04:43:02 +00:00
Chris Lattner
cac44e283d
refactor x86-64 argument lowering yet again, this time eliminating templates,
...
'clients', etc, and adding CCValAssign instead.
llvm-svn: 34654
2007-02-27 04:18:15 +00:00
Evan Cheng
f54dbab209
Backing out Jim's LR spill changes. This was causing llvm-gcc bootstrapping
...
to infinite loop:
PPCMachineFunctionInfo.h updated: 1.2 -> 1.3
PPCRegisterInfo.cpp updated: 1.110 -> 1.111
PPCRegisterInfo.h updated: 1.28 -> 1.29
llvm-svn: 34652
2007-02-27 02:55:29 +00:00
Chris Lattner
d4cd3a31e6
always lower to RETFLAG, never leave it as just ret.
...
llvm-svn: 34639
2007-02-26 19:44:02 +00:00
Chris Lattner
656996aab8
fix attribution
...
llvm-svn: 34637
2007-02-26 18:56:07 +00:00
Chris Lattner
948965f809
Add a description of the X86-64 calling convention and the return
...
conventions. This doesn't do anything yet, but may in the future.
llvm-svn: 34636
2007-02-26 18:17:14 +00:00
Chris Lattner
7165ee9b6b
switch to smallvector
...
llvm-svn: 34633
2007-02-26 07:59:53 +00:00
Chris Lattner
3fe1132dcd
initial hack at splitting the x86-64 calling convention info out from the
...
mechanics that process it. I'm still not happy with this, but it's a step
in the right direction.
llvm-svn: 34631
2007-02-26 07:50:02 +00:00
Chris Lattner
d0c941c89e
the truncate must always be done, it's only the assert that is conditional.
...
llvm-svn: 34628
2007-02-26 05:21:05 +00:00
Chris Lattner
decf97fae2
add an accessor.
...
llvm-svn: 34625
2007-02-26 04:01:25 +00:00
Chris Lattner
2e7125dc74
in X86-64 CCC, i8/i16 arguments are already properly zext/sext'd on input.
...
Capture this so that downstream zext/sext's are optimized out. This
compiles:
int test(short X) { return (int)X; }
to:
_test:
movl %edi, %eax
ret
instead of:
_test:
movswl %di, %eax
ret
GCC produces this bizarre code:
_test:
movw %di, -12(%rsp)
movswl -12(%rsp),%eax
ret
llvm-svn: 34623
2007-02-26 03:18:56 +00:00
Chris Lattner
ad14e21b97
Fix an X86-64 abi bug. We now compile:
...
void foo(short);
void bar(unsigned short A) {
foo(A);
}
into:
_bar:
subq $8, %rsp
movswl %di, %edi
call _foo
addq $8, %rsp
ret
instead of:
_bar:
subq $8, %rsp
call _foo
addq $8, %rsp
ret
Testcase here: test/CodeGen/X86/x86-64-shortint.ll
llvm-svn: 34615
2007-02-25 23:10:46 +00:00
Chris Lattner
15c167cc61
fix CodeGen/X86/2007-02-25-FastCCStack.ll, a regression from my patch last
...
night: fastcc returns should only go in XMM0 if we have SSE2 or above.
llvm-svn: 34613
2007-02-25 22:23:46 +00:00
Chris Lattner
796625a49d
no really, this is the right patch
...
llvm-svn: 34605
2007-02-25 20:01:40 +00:00
Chris Lattner
49fc72110a
always promote float varargs to double.
...
llvm-svn: 34604
2007-02-25 19:59:18 +00:00
Chris Lattner
b5ce97a83a
one important bugfix: PPC32 didn't have both elf and macho support for
...
external symbols and global addresses. Add the missing ones.
one important workaround: PPCISD::CALL is matched by both PPCcall_ELF
and PPCcall_Macho, disable the _ELF patterns for now.
llvm-svn: 34601
2007-02-25 19:20:53 +00:00
Dale Johannesen
f6f34ec2e0
cosmetic changes from review of last patch. obvious
...
llvm-svn: 34598
2007-02-25 18:31:31 +00:00
Chris Lattner
65ba08d627
fastcc functions that return double values now return them in xmm0 on x86-32.
...
This implements CodeGen/X86/fp-stack-ret.ll:test[23]
llvm-svn: 34592
2007-02-25 09:31:16 +00:00
Chris Lattner
e4ba88824d
allow vectors to be passed to stdcall/fastcall functions
...
llvm-svn: 34590
2007-02-25 09:14:25 +00:00
Chris Lattner
fac0b30da0
move LowerRET into the 'Return Value Calling Convention Implementation'
...
section of the file.
llvm-svn: 34589
2007-02-25 09:12:39 +00:00
Chris Lattner
65d915a3b6
make all Lower*CallTo implementations use LowerCallResult to handle their
...
result value stuff. This eliminates a bunch of duplicated code and now
GetRetValueLocs is the sole place that decides where a value is returned.
llvm-svn: 34588
2007-02-25 09:10:05 +00:00
Chris Lattner
423224a7b4
pass the calling convention into Lower*CallTo, instead of using ad-hoc flags.
...
llvm-svn: 34587
2007-02-25 09:06:15 +00:00
Chris Lattner
8fa75c3ae8
factor a bunch of code out of LowerCCCCallTo into a new LowerCallResult
...
function. This function now uses GetRetValueLocs to determine *where*
the result values are located and concerns itself with *how* to pull the
values out.
llvm-svn: 34586
2007-02-25 08:59:22 +00:00
Chris Lattner
3bfbc23ccd
move some code around, pass in calling conv, even though it is unused
...
llvm-svn: 34585
2007-02-25 08:29:00 +00:00
Chris Lattner
f119813ff4
simplify result value lowering by splitting the selection of *where* to return
...
registers out from the logic of *how* to return them.
This changes X86-64 to mark EAX live out when returning a 32-bit value,
where before it marked RAX liveout.
llvm-svn: 34582
2007-02-25 08:15:11 +00:00
Chris Lattner
bcce79717b
make void-return not a special case
...
llvm-svn: 34579
2007-02-25 07:18:38 +00:00
Chris Lattner
d00fcb3277
eliminate a bunch more temporary vectors from X86 lowering.
...
llvm-svn: 34578
2007-02-25 07:10:00 +00:00
Chris Lattner
f7eeef816d
eliminate temporary vectors created during X86 lowering.
...
llvm-svn: 34577
2007-02-25 06:40:16 +00:00
Chris Lattner
6f25082e67
remove std::vector's in RET lowering.
...
llvm-svn: 34576
2007-02-25 06:21:57 +00:00
Chris Lattner
041fb5bc67
implement support for the linux/ppc function call ABI. Patch by
...
Nicolas Geoffray!
llvm-svn: 34574
2007-02-25 05:34:32 +00:00
Chris Lattner
ed4920842f
Add XLForm_1_ext template, patch by Nicolas Geoffray.
...
llvm-svn: 34573
2007-02-25 05:07:49 +00:00
Chris Lattner
42cfb7c452
Improve JIT support for linux/ppc: Patch by Nicolas Geoffray!
...
llvm-svn: 34572
2007-02-25 05:04:13 +00:00
Dale Johannesen
6e366a1006
remove crediting of Evan Cheng and me.
...
llvm-svn: 34568
2007-02-25 01:42:36 +00:00
Dale Johannesen
ccecc12da5
Removed WaterListOffset, inserted BBOffsets. Remove TODO item about this
...
from README.
When no water available, use end of block if in range. (More to do here.)
llvm-svn: 34563
2007-02-25 00:47:03 +00:00
Bill Wendling
2c5f64532b
PR1164:
...
Generate local names with a "llvm_cbe_" prefix using the actual name of the
variable instead of a temporary name.
llvm-svn: 34540
2007-02-23 22:45:08 +00:00
Lauro Ramos Venancio
19040a3f0d
bugfix: SP wasn't updated for varargs when frame pointer was eliminated.
...
llvm-svn: 34537
2007-02-23 21:53:48 +00:00
Jim Laskey
704423b797
Don't spill LR as a callee saved register.
...
llvm-svn: 34533
2007-02-23 20:34:16 +00:00
Lauro Ramos Venancio
7c2f17b629
Fix stack alignment in functions with varargs.
...
llvm-svn: 34532
2007-02-23 20:32:57 +00:00
Dale Johannesen
544968d665
rewrite of constant islands
...
llvm-svn: 34523
2007-02-23 05:02:36 +00:00
Evan Cheng
2d4b1cb0ca
Added -march=thumb; removed -enable-thumb.
...
llvm-svn: 34521
2007-02-23 03:14:31 +00:00
Evan Cheng
3ddb5d1018
80 col. violation.
...
llvm-svn: 34520
2007-02-23 03:03:16 +00:00
Anton Korobeynikov
b7350e191e
External weak linkage is supported by recent binutils on mingw32.
...
llvm-svn: 34519
2007-02-23 01:58:50 +00:00
Evan Cheng
da51cf986a
By default, spills kills the register being stored.
...
llvm-svn: 34515
2007-02-23 01:10:04 +00:00
Evan Cheng
bd3219f5bf
Add option to turn on register scavenger; By default, spills kills the register being stored.
...
llvm-svn: 34514
2007-02-23 01:09:11 +00:00
Chris Lattner
f8d7232532
remove obsolete file
...
llvm-svn: 34506
2007-02-22 23:48:43 +00:00
Jim Laskey
b57ee1fc37
Simplify lowering and selection of exception ops.
...
llvm-svn: 34488
2007-02-22 14:56:36 +00:00
Jim Laskey
6a937ad320
Support to provide exception and selector registers.
...
llvm-svn: 34482
2007-02-21 22:54:50 +00:00
Jim Laskey
bce43df323
Add support for changes in DwarfWriter.
...
llvm-svn: 34478
2007-02-21 22:47:38 +00:00
Jim Laskey
d1e09aa74a
Add TAI field for exception table section.
...
llvm-svn: 34477
2007-02-21 22:43:40 +00:00
Evan Cheng
0e7be3c4e0
ELF / PIC requires GOT be in the EBX register during calls via PLT GOT pointer.
...
Add implicit uses of EBX to calls to ensure liveintervalanalysis does not treat
the GOT in EBX move as dead upon definition.
This should fix PR1207.
llvm-svn: 34470
2007-02-21 21:18:14 +00:00
Dan Gohman
e24135a647
Fix typos in comments.
...
llvm-svn: 34456
2007-02-20 20:52:03 +00:00
Evan Cheng
a6399ed8d6
How the heck did I forget patterns for llvm.x86.sse2.cmp.sd?
...
llvm-svn: 34434
2007-02-20 00:39:09 +00:00
Reid Spencer
bd46f28da7
Simplify some code by moving variable declarations into the only block that
...
uses them.
llvm-svn: 34432
2007-02-19 23:30:10 +00:00
Reid Spencer
78e1ec0122
Implement support for non-standard integer bit widths of any size. The
...
rules alignment is to pick the alignment that corresponds to the smallest
specified alignment that is larger than the bit width of the type or the
largest specified integer alignment if none are larger than the bitwidth
of the type. For the byte size, the size returned is the next larger
multiple of the alignment for that type (using the above rule). This patch
also changes bit widths from "short" to "uint32_t" to ensure there are
enough bits to specify any bit width that LLVM can handle (currently 2^23);
16-bits isn't enough.
llvm-svn: 34431
2007-02-19 22:35:00 +00:00
Evan Cheng
e4ab9c032b
Re-apply my liveintervalanalysis changes. Now with PR1207 fixes.
...
llvm-svn: 34428
2007-02-19 21:49:54 +00:00
Reid Spencer
b27fcf3482
For PR1207:
...
Revert patches that caused the problem. Evan, please investigate and reapply
when you've discovered the problem.
llvm-svn: 34399
2007-02-19 03:20:00 +00:00
Evan Cheng
8c2508f1ac
Added getReservedRegs().
...
llvm-svn: 34376
2007-02-17 11:06:00 +00:00
Chris Lattner
e3eae5e265
Fix ixaddrs as well, allowing ppc64 to compile to:
...
_test2:
li r2, 0
lis r3, 1
std r2, 9024(r3)
blr
instead of:
_test2:
lis r2, 1
li r3, 0
ori r2, r2, 9024
std r3, 0(r2)
blr
This implements CodeGen/PowerPC/LargeAbsoluteAddr.ll:test2
llvm-svn: 34373
2007-02-17 06:57:26 +00:00
Chris Lattner
50411d5be7
Compile test/CodeGen/PowerPC/LargeAbsoluteAddr.ll to:
...
_test:
lis r2, 743
li r3, 0
stw r3, 32751(r2)
blr
instead of:
_test:
li r2, 0
stw r2, 32751(48693248)
blr
Implement support for ppc64 as well, allowing it to produce better code.
llvm-svn: 34371
2007-02-17 06:44:03 +00:00
Chris Lattner
14496ddfd4
Do not dereference invalid ranges. Generalize targetdata alignment model.
...
This fixes the UnitTests/Vector/sumarray-dbl regressions.
llvm-svn: 34358
2007-02-17 00:41:42 +00:00
Chris Lattner
09f6f520bf
Fix CodeGen/PowerPC/2007-02-16-AlignPacked.ll
...
llvm-svn: 34356
2007-02-16 23:11:51 +00:00
Reid Spencer
b175f70613
Remove an unnecessary predicate.
...
Patch by Scott Michel.
llvm-svn: 34354
2007-02-16 22:42:40 +00:00
Chris Lattner
8dd1ed7465
simplify some code, ensure that packed structures get abi alignment of 1.
...
llvm-svn: 34352
2007-02-16 22:25:34 +00:00
Chris Lattner
3beba5539b
fix incorrect encoding of vminsw.
...
llvm-svn: 34351
2007-02-16 21:20:09 +00:00
Andrew Lenharth
ed90594898
This was done recently
...
llvm-svn: 34338
2007-02-16 02:11:59 +00:00
Reid Spencer
c5814f843c
For PR1195:
...
PACKED_ALIGN -> VECTOR_ALIGN
llvm-svn: 34330
2007-02-15 22:07:05 +00:00
Reid Spencer
af246fde76
For PR1202:
...
Make sure we found an existing Alignment before overwriting it.
llvm-svn: 34308
2007-02-15 18:34:36 +00:00
Evan Cheng
28eaad250f
Use BitVector instead of vector<bool> which can be extremely slow.
...
llvm-svn: 34302
2007-02-15 05:59:24 +00:00
Reid Spencer
e7ff3305d6
For PR1195:
...
Change use of "packed" term to "vector" in comments, strings, variable
names, etc.
llvm-svn: 34300
2007-02-15 03:39:18 +00:00
Reid Spencer
55e4e98a2a
For PR1195:
...
Rename PackedType -> VectorType, ConstantPacked -> ConstantVector, and
PackedTyID -> VectorTyID. No functional changes.
llvm-svn: 34293
2007-02-15 02:26:10 +00:00
Reid Spencer
ca25d2b273
Fixed packed structure breakage from earlier TargetData patch; applied
...
Chris Lattner's code style suggestions.
Patch by Scott Michel!
llvm-svn: 34292
2007-02-15 02:11:06 +00:00
Chris Lattner
5cece73ec8
Generalize TargetData strings, to support more interesting forms of data.
...
Patch by Scott Michel.
llvm-svn: 34266
2007-02-14 05:52:17 +00:00
Andrew Lenharth
f4bbe64c83
Well this isn't as ugly and it works better. At least gcc bootstraps again
...
llvm-svn: 34254
2007-02-13 23:41:16 +00:00
Chris Lattner
67bdb3aae8
add a note
...
llvm-svn: 34249
2007-02-13 21:44:43 +00:00
Lauro Ramos Venancio
81f86314e6
Add space between // and the comment.
...
llvm-svn: 34246
2007-02-13 20:06:15 +00:00
Lauro Ramos Venancio
ff9f78e230
Add ABI information to ARM subtarget.
...
llvm-svn: 34245
2007-02-13 19:52:28 +00:00
Lauro Ramos Venancio
02ba8f20e3
According to ARM EABI, 8-bytes function arguments must be 8-bytes aligned.
...
llvm-svn: 34241
2007-02-13 14:07:13 +00:00
Chris Lattner
97739dcbca
more notes
...
llvm-svn: 34204
2007-02-12 21:20:26 +00:00
Chris Lattner
216d889852
add a note
...
llvm-svn: 34202
2007-02-12 20:26:34 +00:00
Chris Lattner
d079b34aa0
Switch LayoutInfo to be a DenseMap instead of an std::map. This speeds up
...
-load-vn -gcse by 2.3%.
llvm-svn: 34160
2007-02-10 20:26:17 +00:00
Chris Lattner
8fa88af5f0
add a typedef
...
llvm-svn: 34159
2007-02-10 20:18:06 +00:00
Chris Lattner
863b62eb50
eliminate the std::vector from StructLayout, allocating the elements immediately
...
after the StructLayout object in memory. This marginally improves locality,
speeding up -load-vn -gcse by ~0.8%.
llvm-svn: 34158
2007-02-10 20:15:41 +00:00
Chris Lattner
109373538b
encapsulate the rest of the StructLayout members.
...
llvm-svn: 34157
2007-02-10 19:59:22 +00:00
Chris Lattner
9dafd9fe90
Privatize StructLayout::MemberOffsets, adding an accessor
...
llvm-svn: 34156
2007-02-10 19:55:17 +00:00
Chris Lattner
13b4f184fd
Use ManagedStatic to manage LayoutInfo, instead of rolling our own.
...
llvm-svn: 34154
2007-02-10 19:43:18 +00:00
Chris Lattner
eaceeb61fb
Change TargetData::getIndexedOffset interface to not require indices
...
in a vector.
llvm-svn: 34153
2007-02-10 19:33:15 +00:00
Evan Cheng
af3b119b29
These vectors are frequently large. Use std::vector instead.
...
llvm-svn: 34109
2007-02-09 23:59:14 +00:00
Evan Cheng
5e8eb0c198
Add reference counting to constantpool entries. Delete the unused ones.
...
llvm-svn: 34105
2007-02-09 20:54:44 +00:00
Chris Lattner
31e202922a
add a note
...
llvm-svn: 34101
2007-02-09 17:38:01 +00:00
Nate Begeman
e7902cc8ba
Remove fixed item
...
llvm-svn: 34081
2007-02-09 04:19:54 +00:00
Evan Cheng
400120abe5
This is done.
...
llvm-svn: 34072
2007-02-08 23:53:38 +00:00
Andrew Lenharth
fc510fe358
return addresses, those I already have
...
llvm-svn: 34056
2007-02-08 17:37:41 +00:00
Bill Wendling
4b33b03487
Fixed comments.
...
llvm-svn: 34040
2007-02-08 06:05:08 +00:00
Bill Wendling
289ab30051
Moved the MachOWriter and ELFWriter out of the Target/* files. Placed the
...
definition of it into the CodeGen library. This is so that a backend doesn't
necessarily add in these writers if it doesn't use them (like in the lli
program).
llvm-svn: 34034
2007-02-08 01:39:44 +00:00
Bill Wendling
1620ef9a95
Added new method to add a "simple" code emitter. That is, to only add
...
the code emitter and not set variables.
llvm-svn: 34033
2007-02-08 01:38:33 +00:00
Bill Wendling
abb65b1d4d
Dead files. Functionality has been taken over by the Add*Writer functions.
...
llvm-svn: 34029
2007-02-08 01:32:51 +00:00
Evan Cheng
dc15bc54a4
isLowRegister() expects input is a physical register.
...
llvm-svn: 34013
2007-02-07 21:44:33 +00:00
Evan Cheng
03ffd4a6d5
Rename.
...
llvm-svn: 34011
2007-02-07 21:24:09 +00:00
Evan Cheng
2bbe03a4df
If sp offset will be materialized in a register. Clear the offset field of str / ldr.
...
llvm-svn: 34010
2007-02-07 21:19:58 +00:00
Evan Cheng
fe7242e9bb
Get rid of references to iostream.
...
llvm-svn: 34009
2007-02-07 21:18:32 +00:00
Evan Cheng
808cf2b6a1
New entry.
...
llvm-svn: 34000
2007-02-07 09:22:15 +00:00
Evan Cheng
d5921e8a32
In thumb mode, R3 is reserved, but it can be live in to the function. If
...
that is the case, whenever we use it as a scratch register, save it to R12
first and then restore it after the use.
This is a temporary and truly horrible workaround!
llvm-svn: 33999
2007-02-07 09:17:36 +00:00
Evan Cheng
8f5c613d03
Update
...
llvm-svn: 33998
2007-02-07 08:37:57 +00:00
Evan Cheng
efeb81a8c4
- If fp (r7) is used to reference stack objects, use [r, r] address mode.
...
- If there is a dynamic alloca, in the epilogue, restore the value of sp
using r7 - offset.
- Other bug fixes.
llvm-svn: 33997
2007-02-07 08:37:31 +00:00
Evan Cheng
b6cdeca59d
eliminateFrameIndex() is even more complicated if frame ptr is used instead of SP when there are dynamic alloca's.
...
llvm-svn: 33975
2007-02-07 02:44:23 +00:00
Evan Cheng
60bde0ebb1
Spill / restore should avoid modifying the condition register.
...
llvm-svn: 33971
2007-02-07 00:06:56 +00:00
Evan Cheng
b3ff5f65d4
Select add FI, c correctly.
...
llvm-svn: 33960
2007-02-06 09:11:20 +00:00
Evan Cheng
1f1a01403a
foldMemoryOperand() cannot fold tMOVrr sp into load / store in thumb mode. tLDRspi / tSTRspi cannot target / store high registers.
...
llvm-svn: 33958
2007-02-06 06:13:29 +00:00
Evan Cheng
119b5e3558
eliminateFrameIndex() bug when frame pointer is used as base register.
...
llvm-svn: 33945
2007-02-06 00:23:31 +00:00
Evan Cheng
c4ba711e91
- Store val, [sp, c] must be selected to tSTRsp.
...
- If c does not fit in the offset field, materialize sp + c into a register
using tADDhirr.
llvm-svn: 33944
2007-02-06 00:22:06 +00:00
Reid Spencer
4881e131eb
Although targets are not required to support integers > 64bits, TargetData
...
must in order for backends that do want to support large integer types to be
able to function. Consequently, don't assert if the bitwidth > 64 bits
when computing the size and alignment. Instead, compute the size by rounding
up to the next even number of bytes for the size. Compute the alignment
as the same as the LongABIAlignment. These provide reasonable defaults
that the target can override.
llvm-svn: 33943
2007-02-05 23:51:43 +00:00
Reid Spencer
6af21b3029
For PR411:
...
This patch replaces the SymbolTable class with ValueSymbolTable which does
not support types planes. This means that all symbol names in LLVM must now
be unique. The patch addresses the necessary changes to deal with this and
removes code no longer needed as a result. This completes the bulk of the
changes for this PR. Some cleanup patches will follow.
llvm-svn: 33918
2007-02-05 20:47:22 +00:00
Chris Lattner
3e01807e87
Fix a miscompilation in the addr mode code trying to implement X | C and
...
X + C to promote LEA formation. We would incorrectly apply it in some cases
(test) and miss it in others.
This fixes CodeGen/X86/2007-02-04-OrAddrMode.ll
llvm-svn: 33884
2007-02-04 20:18:17 +00:00
Evan Cheng
bf4ca3b491
ARM callseq_end should have a input flag operand so it would be scheduled right after the call.
...
llvm-svn: 33832
2007-02-03 09:11:58 +00:00
Evan Cheng
ece3d334c2
Fix comments.
...
llvm-svn: 33831
2007-02-03 08:53:01 +00:00
Bill Wendling
4423d49d94
Moved the GetTargetRelocation method from PPCMachOWriter to here. It uses
...
non-Mach-O-specific information.
llvm-svn: 33819
2007-02-03 02:41:58 +00:00
Bill Wendling
2831f1ae0d
Moved the GetTargetRelocation method to the PPCMachOWriterInfo object. The
...
PPCMachOWriter is now trivial.
llvm-svn: 33818
2007-02-03 02:40:57 +00:00
Bill Wendling
ed60103206
Put destructor out-of-line.
...
llvm-svn: 33817
2007-02-03 02:40:10 +00:00
Evan Cheng
b4c6dfa3e7
- Branch max. displacement calculation bug.
...
- Add debugging info.
llvm-svn: 33811
2007-02-03 02:08:34 +00:00
Lauro Ramos Venancio
1b8a04e036
bugfix: SP isn't resetted when function has FP and there is no spills.
...
llvm-svn: 33800
2007-02-02 23:08:40 +00:00
Evan Cheng
d308af8c1f
Another thumb large stack offset codegen bug.
...
llvm-svn: 33795
2007-02-02 21:08:39 +00:00
Evan Cheng
496c67ee3e
Use MBB.empty() instead of MBB.size() for speed.
...
llvm-svn: 33789
2007-02-02 19:09:19 +00:00
Evan Cheng
6a428320d6
Watch out for empty BB.
...
llvm-svn: 33788
2007-02-02 18:49:02 +00:00
Evan Cheng
e450d1bfa4
Ugh. Only meant to do this in thumb mode.
...
llvm-svn: 33780
2007-02-02 08:58:48 +00:00
Chris Lattner
63479262b4
add a note
...
llvm-svn: 33778
2007-02-02 04:36:46 +00:00
Reid Spencer
591bfa1e0b
Changes to support making the shift instructions be true BinaryOperators.
...
This feature is needed in order to support shifts of more than 255 bits
on large integer types. This changes the syntax for llvm assembly to
make shl, ashr and lshr instructions look like a binary operator:
shl i32 %X, 1
instead of
shl i32 %X, i8 1
Additionally, this should help a few passes perform additional optimizations.
llvm-svn: 33776
2007-02-02 02:16:23 +00:00
Evan Cheng
689b0a4a62
Fix a bug in getARMCMP (which translate CondCode to ARM specific CC) when the RHS is a constant.
...
llvm-svn: 33775
2007-02-02 01:53:26 +00:00
Evan Cheng
73975a6076
Thumb does not have clz.
...
llvm-svn: 33773
2007-02-01 23:34:03 +00:00
Lauro Ramos Venancio
5765bcd825
Define PrivateGlobalPrefix for ARM Linux. (Fix CodeGen/ARM/large_stack.ll)
...
llvm-svn: 33763
2007-02-01 21:43:53 +00:00
Evan Cheng
3d9b702988
Pasto. Lots of it.
...
llvm-svn: 33762
2007-02-01 20:44:52 +00:00
Lauro Ramos Venancio
5781691b22
Fix .thumb_func directive on linux.
...
llvm-svn: 33759
2007-02-01 18:25:34 +00:00
Jim Laskey
52a12383a4
Support for non-landing pad exception handling.
...
llvm-svn: 33755
2007-02-01 16:31:34 +00:00
Evan Cheng
88b703eec4
- Off by one bugs in maximum displacement calculation / testing.
...
- In thumb mode, a new constpool island BB size should be 4 + 2 to
compensate for the potential padding due to alignment requirement.
llvm-svn: 33753
2007-02-01 10:16:15 +00:00
Anton Korobeynikov
c469cbc2e7
Fixed uninitialized stuff inside LegalizeDAG. Fortunately, the only
...
affected part is codegen of "memove" inside x86 backend. This fixes
PR1144
llvm-svn: 33752
2007-02-01 08:39:52 +00:00
Evan Cheng
d3dc2eefc2
.set pc relative displacement bug: label should be moved down one instruction
...
to just before the add r1, pc:
Before:
.set PCRELV0, (LJTI1_0_0-(LPCRELL0+4))
LPCRELL0:
mov r1, #PCRELV0
add r1, pc
Now:
.set PCRELV0, (LJTI1_0_0-(LPCRELL0+4))
mov r1, #PCRELV0
LPCRELL0:
add r1, pc
llvm-svn: 33744
2007-02-01 03:04:49 +00:00
Evan Cheng
eafe1f7bd9
Add a note.
...
llvm-svn: 33743
2007-02-01 02:46:20 +00:00
Evan Cheng
9f177f9058
Also set alignment of stack-based structs to 4 in thumb mode.
...
llvm-svn: 33741
2007-02-01 02:18:36 +00:00
Evan Cheng
439dcbedba
Special epilogue for vararg functions. We cannot do a pop to pc because
...
there follows a sp increment for the va register save region. Instead issue
a separate pop to another register, increment sp, and then return:
pop {r4, r5, r6, r7}
pop {r3}
add sp, #3 * 4
bx r3
llvm-svn: 33739
2007-02-01 01:49:46 +00:00
Evan Cheng
9f87fca49c
Pessmistically assume the .align 2 before the first constpool entry adds
...
two bytes padding.
llvm-svn: 33734
2007-02-01 01:09:47 +00:00
Evan Cheng
3d8d381600
Possible JT improvements.
...
llvm-svn: 33733
2007-02-01 01:07:48 +00:00
Chris Lattner
f4e5c29cb9
Fix CodeGen/PowerPC/2007-01-31-InlineAsmAddrMode.ll
...
llvm-svn: 33732
2007-02-01 00:39:08 +00:00
Evan Cheng
54a1324bae
Don't emit unnecessary .align directive.
...
llvm-svn: 33729
2007-01-31 23:39:39 +00:00
Evan Cheng
765de99fac
Handle an interesting corner case: the constpool_entry being reference is two
...
instructions away, i.e. its address is equal to PC.
%r0 = tLDRpci <cp#0>
bx
CONSTPOOL_ENTRY 0 <cp#0>, 4
llvm-svn: 33728
2007-01-31 23:35:18 +00:00
Evan Cheng
082e441207
Don't want to add FramePtr to callee save spill list twice.
...
llvm-svn: 33727
2007-01-31 23:17:29 +00:00
Evan Cheng
457d429cab
Darwin ABI requires FP to point to stack slot of prev FP.
...
llvm-svn: 33724
2007-01-31 22:25:33 +00:00
Evan Cheng
0ce094c7a8
Add entry.
...
llvm-svn: 33723
2007-01-31 22:11:38 +00:00
Evan Cheng
41bee13a0e
Thumb add sp, #imm requires the immediate value be multiple of 4. For now,
...
change preferred alignment of short, byte, bool to 4.
llvm-svn: 33722
2007-01-31 22:08:40 +00:00
Evan Cheng
476cd5c2d1
Update comment.
...
llvm-svn: 33721
2007-01-31 22:06:44 +00:00
Evan Cheng
8596afac45
Dead comment.
...
llvm-svn: 33719
2007-01-31 21:31:25 +00:00
Evan Cheng
a08ef111bb
Thumb asm syntax does not want 's' suffix for flag setting opcodes.
...
llvm-svn: 33717
2007-01-31 20:12:31 +00:00
Evan Cheng
1df8529721
When determining whether a pc relative branch / load displacement fits in the
...
instruction field, adjust it for PC value (4 for thumb, 8 for arm).
llvm-svn: 33711
2007-01-31 19:57:44 +00:00
Chris Lattner
084d1d8706
A relatively simple PPC optimization.
...
llvm-svn: 33709
2007-01-31 19:49:20 +00:00
Evan Cheng
f6e0e6cada
Some comments.
...
llvm-svn: 33707
2007-01-31 18:29:27 +00:00
Evan Cheng
16edf4f9bf
ConstPool island bug: watch out for cases where UserMI is the last MI of the BB.
...
llvm-svn: 33706
2007-01-31 18:19:07 +00:00
Lauro Ramos Venancio
e22bc8635e
ARM fix: Miscompilation when frame pointer can't be eliminated. Uninitialized frame pointer register is used.
...
llvm-svn: 33703
2007-01-31 13:12:46 +00:00
Evan Cheng
608ad034b0
Specify the right CC for comparison libcalls.
...
llvm-svn: 33702
2007-01-31 09:30:58 +00:00
Evan Cheng
e5f5439313
Observe -soft-float.
...
llvm-svn: 33699
2007-01-31 08:40:13 +00:00
Evan Cheng
0ee9a27976
- Added Thumb constpool island support.
...
- Islands are inserted right after the user MI since thumb LDR cannot encode
negative offset.
llvm-svn: 33690
2007-01-31 02:22:22 +00:00
Evan Cheng
26ee4f882b
During PEI, if the immediate value of sp + offset is too large (i.e. something
...
that would require > 3 instructions to materialize), load the immediate from a
constpool entry.
llvm-svn: 33667
2007-01-30 23:01:46 +00:00
Evan Cheng
0f07707270
- Fix codegen for pc relative constant (e.g. JT) in thumb mode:
...
.set PCRELV0, (LJTI1_0_0-(LPCRELL0+4))
LPCRELL0:
add r1, pc, #PCRELV0
This is not legal since add r1, pc, #c requires the constant be a multiple of 4.
Do the following instead:
.set PCRELV0, (LJTI1_0_0-(LPCRELL0+4))
LPCRELL0:
mov r1, #PCRELV0
add r1, pc
- In thumb mode, it's not possible to use .set generate a pc relative stub
address. The stub is ARM code which is in a different section from the thumb
code. Load the value from a constpool instead.
- Some asm printing clean up.
llvm-svn: 33664
2007-01-30 20:37:08 +00:00
Reid Spencer
19af04a142
For PR1136: Rename GlobalVariable::isExternal as isDeclaration to avoid
...
confusion with external linkage types.
llvm-svn: 33663
2007-01-30 20:08:39 +00:00
Evan Cheng
5e0f0364d0
Copy and paste bug.
...
llvm-svn: 33658
2007-01-30 08:22:33 +00:00
Evan Cheng
3f02e5b1e7
Darwin -static should codegen static ctors / dtors to .constructor / .destructor sections.
...
llvm-svn: 33657
2007-01-30 08:04:53 +00:00
Evan Cheng
78628c7f32
Misseed thumb jumptable branch.
...
llvm-svn: 33656
2007-01-30 08:03:06 +00:00
Evan Cheng
d0ed3f753b
In thumb mode, round up stack frame size to multiple of 4 since add/sub
...
sp, imm instructions implicitly multiply the offset by 4.
llvm-svn: 33653
2007-01-30 02:57:02 +00:00
Evan Cheng
36f03730d0
Thumb eliminateFrameIndex fixes.
...
llvm-svn: 33652
2007-01-30 02:36:01 +00:00
Evan Cheng
99a2f7d598
Change the operand orders to t_addrmode_s* to make it easier to morph
...
instructions that use these address modes to instructions that use
t_addrmode_sp.
llvm-svn: 33651
2007-01-30 02:35:32 +00:00
Evan Cheng
91ad06dd75
- In thumb mode, if size of MachineFunction is >= 2048, force LR to be
...
spilled (if it is not already).
- If LR is spilled, use BL to implement far jumps. LR is not used as a GPR
in thumb mode so it can be clobbered if it is properly spilled / restored
in prologue / epilogue.
- If LR is force spilled but no far jump has been emitted, try undo'ing the
spill by:
push lr -> delete
pop pc -> bx lr
llvm-svn: 33650
2007-01-30 01:18:38 +00:00
Evan Cheng
a16118a6cf
Use BL to implement Thumb far jumps.
...
llvm-svn: 33649
2007-01-30 01:13:37 +00:00
Evan Cheng
171943e26e
Factor GetInstSize() out of constpool island pass.
...
llvm-svn: 33644
2007-01-29 23:45:17 +00:00
Jim Laskey
6f5d7d292f
Only gather frame info if debug or eh.
...
llvm-svn: 33639
2007-01-29 23:20:22 +00:00
Nate Begeman
dc46021355
Finish off bug 680, allowing targets to custom lower frame and return
...
address nodes.
llvm-svn: 33636
2007-01-29 22:58:52 +00:00
Nate Begeman
32cbf413b6
We'd still like to register allocate r2 on darwin before the callee-save
...
regs.
llvm-svn: 33635
2007-01-29 22:57:48 +00:00
Jim Laskey
5fdc488d4a
rename flag
...
llvm-svn: 33634
2007-01-29 22:40:03 +00:00