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13275 Commits

Author SHA1 Message Date
David Greene
1b3d9eece5 Remove an assumption of default arguments. This is in anticipation of a 
change to SelectionDAG build APIs.

llvm-svn: 96239
 2010-02-15 16:57:43 +00:00
David Greene
fcf8375377 Remove an assumption of default arguments. This is in anticipation of a 
change to SelectionDAG build APIs.

llvm-svn: 96238
 2010-02-15 16:57:13 +00:00
David Greene
196564c820 Remove an assumption of default arguments. This is in anticipation of a 
change to SelectionDAG build APIs.

llvm-svn: 96237
 2010-02-15 16:57:02 +00:00
David Greene
b503e48b12 Remove an assumption of default arguments. This is in anticipation of a 
change to SelectionDAG build APIs.

llvm-svn: 96236
 2010-02-15 16:56:53 +00:00
David Greene
ea559af89a Remove an assumption of default arguments. This is in anticipation of a 
change to SelectionDAG build APIs.

llvm-svn: 96235
 2010-02-15 16:56:34 +00:00
David Greene
725287f422 Remove an assumption of default arguments. This is in anticipation of a 
change to SelectionDAG build APIs.

llvm-svn: 96234
 2010-02-15 16:56:22 +00:00
David Greene
118edab4c9 Remove an assumption of default arguments. This is in anticipation of a 
change to SelectionDAG build APIs.

llvm-svn: 96233
 2010-02-15 16:56:10 +00:00
David Greene
47a10d2053 Remove an assumption of default arguments. This is in anticipation of a 
change to SelectionDAG build APIs.

llvm-svn: 96232
 2010-02-15 16:55:58 +00:00
David Greene
3bb90b9985 Remove an assumption of default arguments. This is in anticipation of a 
change to SelectionDAG build APIs.

llvm-svn: 96231
 2010-02-15 16:55:37 +00:00
David Greene
1efa05ab91 Remove an assumption of default arguments. This is in anticipation of a 
change to SelectionDAG build APIs.

llvm-svn: 96230
 2010-02-15 16:55:24 +00:00
David Greene
b3a7357944 Remove an assumption of default arguments. This is in anticipation of a 
change to SelectionDAG build APIs.

llvm-svn: 96229
 2010-02-15 16:55:07 +00:00
David Greene
75cc8f80a6 Remove an assumption of default arguments. This is in anticipation of a 
change to SelectionDAG build APIs.

llvm-svn: 96228
 2010-02-15 16:53:33 +00:00
David Greene
dd3a290ebf Remove an assumption of default arguments. This is in anticipation of a 
change to SelectionDAG build APIs.

llvm-svn: 96227
 2010-02-15 16:49:52 +00:00
Duncan Sands
2acaf3609c Uniformize the names of type predicates: rather than having isFloatTy and 
isInteger, we now have isFloatTy and isIntegerTy.  Requested by Chris!

llvm-svn: 96223
 2010-02-15 16:12:20 +00:00
Andrew Lenharth
87e914773e Fix changes from r75027 
llvm-svn: 96220
 2010-02-15 15:00:44 +00:00
Chris Lattner
ba70b52fe6 no need to add the instruction count anymore. 
llvm-svn: 96212
 2010-02-15 06:38:41 +00:00
Chris Lattner
f036c806b3 mark "addr" as having type "iPTR", eliminating some type comparisons 
in hte generated dag isel fil.

llvm-svn: 96193
 2010-02-14 21:53:19 +00:00
Sanjiv Gupta
318fdf4e39 fixes to pagesel/banksel inserter. 
1. restore these across direct/indirect calls.
2. restore pagesel for any macros with gotos.

llvm-svn: 96175
 2010-02-14 18:27:42 +00:00
Anton Korobeynikov
3461f67cee Forgot to commit the header 
llvm-svn: 96174
 2010-02-14 18:25:41 +00:00
Anton Korobeynikov
9436d20d76 Drop winmcasminfo and use normal AT&T COFF for all windows targets. 
Otherwise AT&T asm printer is used with non-compatible MCAsmInfo and
there is no way to override this behaviour.

llvm-svn: 96165
 2010-02-14 15:19:54 +00:00
Johnny Chen
475f273d63 Try to factorize the specification of saturating add/subtract operations a bit, 
as suggested by Bob Wilson.

llvm-svn: 96153
 2010-02-14 06:32:20 +00:00
Chris Lattner
b9c4a15ad5 teach the encoder to handle pseudo instructions like FP_REG_KILL, 
encoding them into nothing.

llvm-svn: 96110
 2010-02-13 19:16:53 +00:00
Daniel Dunbar
1581cae46f X86: Move extended MCFixupKinds into X86FixupKinds.h 
llvm-svn: 96088
 2010-02-13 09:27:52 +00:00
Chris Lattner
8530ba626c add encoder support and tests for rdtscp 
llvm-svn: 96076
 2010-02-13 03:42:24 +00:00
Johnny Chen
f252f7cf0d Add SETEND and BXJ instructions for disassembly only. 
llvm-svn: 96075
 2010-02-13 02:51:09 +00:00
Sean Callanan
0bc10793b0 Added the rdtscp instruction to the x86 instruction 
tables.

llvm-svn: 96073
 2010-02-13 02:06:11 +00:00
Evan Cheng
6eb7ff5bbf Teach MachineFrameInfo to track maximum alignment while stack objects are being 
created. This ensures it's updated at all time. It means targets which perform
dynamic stack alignment would know whether it is required and whether frame
pointer register cannot be made available register allocation.
This is a fix for rdar://7625239. Sorry, I can't create a reasonably sized test
case.

llvm-svn: 96069
 2010-02-13 01:56:41 +00:00
Sean Callanan
9806eade6e Fixed encodings for invlpg, invept, and invvpid. 
llvm-svn: 96065
 2010-02-13 01:48:34 +00:00
Johnny Chen
727c71d8ac Added a bunch of saturating add/subtract instructions for disassembly only. 
llvm-svn: 96063
 2010-02-13 01:21:01 +00:00
Chris Lattner
d4fe983f23 rip out the 'heinous' x86 MCCodeEmitter implementation. 
We still have the templated X86 JIT emitter, *and* the
almost-copy in X86InstrInfo for getting instruction sizes.

llvm-svn: 96059
 2010-02-13 00:49:29 +00:00
Chris Lattner
5b01ab848c remove special cases for vmlaunch, vmresume, vmxoff, and swapgs 
fix swapgs to be spelled right.

llvm-svn: 96058
 2010-02-13 00:41:14 +00:00
Daniel Dunbar
4ef0be5df5 MC/X86: Push immediate operands as immediates not expressions when possible. 
llvm-svn: 96055
 2010-02-13 00:17:21 +00:00
Chris Lattner
1d25e3978d Remove special cases for [LM]FENCE, MONITOR and MWAIT from 
encoder and decoder by using new MRM_ forms.

llvm-svn: 96048
 2010-02-12 23:54:57 +00:00
Chris Lattner
4170bb81da implement the rest of correct x86-64 encoder support for 
rip-relative addresses, and add a testcase.

llvm-svn: 96040
 2010-02-12 23:24:09 +00:00
Dale Johannesen
08f0ab42b8 Add the problem I just hacked around in 96015/96020. 
The solution there produces correct code, but is seriously
deficient in several ways.

llvm-svn: 96039
 2010-02-12 23:16:24 +00:00
Chris Lattner
946403d05f give MCCodeEmitters access to the current MCContext. 
llvm-svn: 96038
 2010-02-12 23:12:47 +00:00
Chris Lattner
e90d092fd7 implement infrastructure to support fixups for rip-rel 
addressing.  This isn't complete because I need an MCContext
to generate new MCExprs.

llvm-svn: 96036
 2010-02-12 23:00:36 +00:00
Johnny Chen
d36727232c Add YIELD, WFE, WFI, and SEV instructions for disassembly only. 
Plus add two formats: MiscFrm and ThumbMiscFrm.  Some of the for disassembly
only instructions are changed from Pseudo Format to MiscFrm Format.

llvm-svn: 96032
 2010-02-12 22:53:19 +00:00
Chris Lattner
0a7654c7c9 pull the rip-relative addressing mode case up early. 
llvm-svn: 96031
 2010-02-12 22:47:55 +00:00
Chris Lattner
3df1321651 fixme resolved! 
llvm-svn: 96029
 2010-02-12 22:39:06 +00:00
Chris Lattner
1e01ac75bc start producing reloc_pcrel_4byte/reloc_pcrel_1byte for calls. 
llvm-svn: 96028
 2010-02-12 22:36:47 +00:00
Chris Lattner
f1f926247f enhance the immediate field encoding to know whether the immediate 
is pc relative or not, mark call and branches as pcrel.

llvm-svn: 96026
 2010-02-12 22:27:07 +00:00
Evan Cheng
c2084b74bb Load / store multiple instructions cannot load / store sp. Sorry, can't come up with a reasonable test case. 
llvm-svn: 96023
 2010-02-12 22:17:21 +00:00
Dale Johannesen
d52ea2ffc6 This should have gone in with 26015, see comments there. 
llvm-svn: 96020
 2010-02-12 22:00:40 +00:00
Johnny Chen
a56964de27 Add halfword multiply accumulate long SMLALBB/BT/TB/TT for disassembly only. 
llvm-svn: 96019
 2010-02-12 21:59:23 +00:00
Dale Johannesen
ea96b2974f When save/restoring CR at prolog/epilog, in a large 
stack frame, the prolog/epilog code was using the same
register for the copy of CR and the address of the save slot.  Oops.
This is fixed here for Darwin, sort of, by reserving R2 for this case.
A better way would be to do the store before the decrement of SP,
which is safe on Darwin due to the red zone.

SVR4 probably has the same problem, but I don't know how to fix it;
there is no red zone and R2 is already used for something else.
I'm going to leave it to someone interested in that target.

Better still would be to rewrite the CR-saving code completely;
spilling each CR subregister individually is horrible code.

llvm-svn: 96015
 2010-02-12 21:35:34 +00:00
Chris Lattner
2265d6280b Add support for a union type in LLVM IR. Patch by Talin! 
llvm-svn: 96011
 2010-02-12 20:49:41 +00:00
Johnny Chen
0f2837db87 Add SWP (Swap) and SWPB (Swap Byte) for disassembly only. 
llvm-svn: 96010
 2010-02-12 20:48:24 +00:00
Johnny Chen
473d813c5d Add CPS, MRS, MRSsys, MSR, MSRsys for disassembly only. 
llvm-svn: 95999
 2010-02-12 18:55:33 +00:00
Anton Korobeynikov
ffbf0f7027 Setup correct data layout to match gcc's expectations on mingw32. 
llvm-svn: 95981
 2010-02-12 15:28:56 +00:00
Anton Korobeynikov
7073515c86 Cleanup stdcall / fastcall name mangling. 
This should fix alot of problems we saw so far, e.g. PRs 5851 & 2936

llvm-svn: 95980
 2010-02-12 15:28:40 +00:00
Chris Lattner
c3dbd2e2fc add a bunch of mod/rm encoding types for fixed mod/rm bytes. 
This will work better for the disassembler for modeling things
like lfence/monitor/vmcall etc.

llvm-svn: 95960
 2010-02-12 02:06:33 +00:00
Chris Lattner
bde30aec54 revert r95949, it turns out that adding new prefixes is not a 
great solution for the disassembler, we'll go with "plan b".

llvm-svn: 95957
 2010-02-12 01:55:31 +00:00
Johnny Chen
d4e67c4648 Added coprocessor Instructions CDP, CDP2, MCR, MCR2, MRC, MRC2, MCRR, MCRR2, 
MRRC, MRRc2.  For disassembly only.

llvm-svn: 95955
 2010-02-12 01:44:23 +00:00
Daniel Dunbar
c82069746b X86: Fix definition for RCL/RCR.*m? operations -- they were getting represented 
with "tied memory operands", which is wrong.

llvm-svn: 95950
 2010-02-12 01:22:03 +00:00
Chris Lattner
abfe545e92 add another bit of space for new kinds of instruction prefixes. 
llvm-svn: 95949
 2010-02-12 01:15:16 +00:00
Nate Begeman
a146ac8f86 Add a missing pattern for movhps so that we get: 
movq	(%ecx,%edx,2), %xmm2
movhps	(%ecx,%eax,2), %xmm2

rather than:

movq     (%eax, %edx, 2), %xmm2		
movq     (%eax, %ebx, 2), %xmm3		
movlhps  %xmm3, %xmm2			

Testcase forthcoming.

llvm-svn: 95948
 2010-02-12 01:10:45 +00:00
Chris Lattner
9307e00dc0 fix the encodings of monitor and mwait, which were completely 
busted in both encoders.  I'm not bothering to fix it in the
old one at this point.

llvm-svn: 95947
 2010-02-12 01:06:22 +00:00
Chris Lattner
fcce3c5ee4 enhance llvm-mc -show-inst to print the enum of an instruction, like so: 
testb	%al, %al                ## <MCInst #2412 TEST8rr
                                        ##   <MCOperand Reg:2>
                                        ##   <MCOperand Reg:2>>
	jne	LBB1_7                  ## <MCInst #938 JNE_1
                                        ##   <MCOperand Expr:(LBB1_7)>>

llvm-svn: 95935
 2010-02-11 22:57:32 +00:00
Chris Lattner
144a1b7a24 add a new MCInstPrinter::getOpcodeName interface, when it is 
implemented, llvm-mc --show-inst now uses it to print the
instruction opcode as well as the number.

llvm-svn: 95929
 2010-02-11 22:39:10 +00:00
Chris Lattner
a10c41c6df improve encoding information for branches. We now know they have 
8 or 32-bit immediates, which allows the new encoder to handle
them.

llvm-svn: 95927
 2010-02-11 21:45:31 +00:00
Chris Lattner
b82b965968 make getFixupKindInfo return a const reference, allowing 
the tables to be const.  Teach MCCodeEmitter to handle
the target-indep kinds so that we don't crash on them.

llvm-svn: 95924
 2010-02-11 21:27:18 +00:00
Chris Lattner
a0e0de6974 switch to target-indep fixups for 1/2/4/8 byte data. 
llvm-svn: 95920
 2010-02-11 21:17:54 +00:00
Johnny Chen
6b88fb6575 Added LDRT/LDRBT/STRT/STRBT for disassembly only. 
llvm-svn: 95916
 2010-02-11 20:31:08 +00:00
Chris Lattner
4718a3f4ea unbreak the build. 
llvm-svn: 95915
 2010-02-11 19:52:11 +00:00
Chris Lattner
d69e1c1bb2 refactor the conditional jump instructions in the .td file to 
use a multipattern that generates both the 1-byte and 4-byte 
versions from the same defm

llvm-svn: 95901
 2010-02-11 19:25:55 +00:00
Johnny Chen
09cc8c09c5 Forgot to also check in this file for vcvt (floating-point <-> fixed-point, VFP). 
Sorry!

llvm-svn: 95892
 2010-02-11 18:47:03 +00:00
Johnny Chen
7c088ab119 Added VCVT (between floating-point and fixed-point, VFP) for disassembly. 
A8.6.297

llvm-svn: 95885
 2010-02-11 18:17:16 +00:00
Johnny Chen
c6ca0de853 Added BKPT/tBKPT (breakpoint) to the instruction table for disassembly purpose. 
llvm-svn: 95884
 2010-02-11 18:12:29 +00:00
Johnny Chen
b1e50a8594 Add pseudo instruction TRAP for disassembly, which is encoded according to A5-21 
as the "Permanently UNDEFINED" instruction.

llvm-svn: 95873
 2010-02-11 17:14:31 +00:00
Chris Lattner
83ee8edc66 dont' call getX86RegNum on X86::RIP, it doesn't like that. This 
fixes the remaining x86-64 jit failures afaik.

llvm-svn: 95867
 2010-02-11 08:45:56 +00:00
Chris Lattner
c279bf31b7 fix a really nasty bug I introduced in r95693: r12 (and r12d, 
r12b, etc) also encodes to a R/M value of 4, which is just
as illegal as ESP/RSP for the non-sib version an address.

This fixes x86-64 jit miscompilations of a bunch of programs.

llvm-svn: 95866
 2010-02-11 08:41:21 +00:00
Chris Lattner
53d91ce3e1 Add and commonize encoder support for all immediates. 
Stub out some dummy fixups to make things work.

We can now emit fixups like this:
	subl	$20, %esp               ## encoding: [0x83,0xec,A]
                                        ##   fixup A - offset: 2, value: 20, kind: fixup_1byte_imm

Emitting $20 as a single-byte fixup to be later resolved
by the assembler is ridiculous of course (vs just emitting
the byte) but this is a failure of the matcher, which 
should be producing an imm of 20, not an MCExpr of 20.

llvm-svn: 95860
 2010-02-11 07:06:31 +00:00
Chris Lattner
2e2935e175 generalize EmitDisplacementField to work with any size 
and rename it to EmitImmediate.

llvm-svn: 95859
 2010-02-11 06:54:23 +00:00
Chris Lattner
1fe88248f8 eliminate the dead IsPCRel argument. 
llvm-svn: 95858
 2010-02-11 06:51:36 +00:00
Chris Lattner
1d5fbc4deb eliminate the dead "PCAdj" logic. 
llvm-svn: 95857
 2010-02-11 06:49:52 +00:00
Mon P Wang
c17e781f35 The previous fix of widening divides that trap was too fragile as it depends on custom 
lowering and requires that certain types exist in ValueTypes.h.  Modified widening to
check if an op can trap and if so, the widening algorithm will apply only the op on
the defined elements.  It is safer to do this in widening because the optimizer can't
guarantee removing unused ops in some cases.

llvm-svn: 95823
 2010-02-10 23:37:45 +00:00
Eli Friedman
63e676c905 A few missed optimizations; the last one could have a significant impact on 
code with lots of bitfields.

llvm-svn: 95809
 2010-02-10 21:26:04 +00:00
Daniel Dunbar
b20be19ae6 MC/X86 AsmMatcher: Fix a use after free spotted by d0k, and de-XFAIL 
x86_32-encoding.s in on expectation of it passing.

llvm-svn: 95806
 2010-02-10 21:19:28 +00:00
Johnny Chen
9851630ae6 Added NOP, DBG, SVC to the instruction table for disassembly purpose. 
llvm-svn: 95784
 2010-02-10 18:02:25 +00:00
Dan Gohman
92b6122204 Fix "the the" and similar typos. 
llvm-svn: 95781
 2010-02-10 16:03:48 +00:00
Chris Lattner
72dfdc8b8a emit some simple (and probably incorrect) fixups for symbolic 
displacement values.

llvm-svn: 95773
 2010-02-10 06:52:12 +00:00
Chris Lattner
6abaa9ee3c keep track of what the current byte being emitted is 
throughout the X86 encoder.

llvm-svn: 95771
 2010-02-10 06:41:02 +00:00
Chris Lattner
aa22470a1a simplify displacement handling, emit displacements by-operand 
even for the immediate case.  No functionality change.

llvm-svn: 95770
 2010-02-10 06:30:00 +00:00
Daniel Dunbar
d2035fb242 MC: Switch MCFixup to just hold an MCExpr pointer instead of index into the 
MCInst it came from.

llvm-svn: 95767
 2010-02-10 04:47:08 +00:00
Chris Lattner
6d7856867a print all the newlines at the end of instructions with 
OutStreamer.AddBlankLine instead of textually.

llvm-svn: 95734
 2010-02-10 00:36:00 +00:00
Kevin Enderby
f31bc700f1 Fix the encoding of the movntdqa X86 instruction. It was missing the 0x66 
prefix which is part of the opcode encoding.

llvm-svn: 95729
 2010-02-10 00:10:31 +00:00
Chris Lattner
ca01d26903 Add ability for MCInstPrinters to add comments for instructions. 
Enhance the x86 backend to show the hex values of immediates in
comments when they are large.  For example:

        movl    $1072693248, 4(%esp)    ## imm = 0x3FF00000

llvm-svn: 95728
 2010-02-10 00:10:18 +00:00
David Greene
bb211816b6 TableGen fragment refactoring. 
Move some utility TableGen defs, classes, etc. into a common file so
they may be used my multiple pattern files.  We will use this for
the AVX specification to help with the transition from the current
SSE specification.

llvm-svn: 95727
 2010-02-09 23:52:19 +00:00
Johnny Chen
1f609fe5fd Add VBIF/VBIT for disassembly only. 
A8.6.279

llvm-svn: 95713
 2010-02-09 23:05:23 +00:00
Daniel Dunbar
75c5ab93a0 MC/X86: Add a dummy implementation of MCFixup generation for hacky X86 MCCodeEmitter. 
llvm-svn: 95709
 2010-02-09 23:00:03 +00:00
Daniel Dunbar
ddfda89472 MC: First cut at MCFixup, for getting fixup/relocation information out of an MCCodeEmitter. 
llvm-svn: 95708
 2010-02-09 22:59:55 +00:00
Johnny Chen
15da54da55 Added VMRS/VMSR for disassembly only. 
A8.6.335 & A8.6.336

llvm-svn: 95703
 2010-02-09 22:35:38 +00:00
Chris Lattner
3bdac5074e port encoder enhancements over to the new encoder. 
llvm-svn: 95699
 2010-02-09 21:57:34 +00:00
Chris Lattner
2457a30898 fix X86 encoder to output [disp] only addresses with no SIB byte 
in X86-32 mode.  This is still required in x86-64 mode to avoid
forming [disp+rip] encoding.  Rewrite the SIB byte decision logic
to be actually understandable.

llvm-svn: 95693
 2010-02-09 21:47:19 +00:00
Chris Lattner
a651ca3caa revert r95689: getX86RegNum(BaseReg) != N86::ESP is 
a confusing idiom to check for ESP or RSP.

llvm-svn: 95690
 2010-02-09 21:21:26 +00:00
Chris Lattner
a88bcd8963 simplify. 
llvm-svn: 95689
 2010-02-09 21:00:12 +00:00
Chris Lattner
7acf9be6c4 move target-independent opcodes out of TargetInstrInfo 
into TargetOpcodes.h.  #include the new TargetOpcodes.h
into MachineInstr.  Add new inline accessors (like isPHI())
to MachineInstr, and start using them throughout the 
codebase.

llvm-svn: 95687
 2010-02-09 19:54:29 +00:00
Jim Grosbach
bdc0ff13db Radar 7417921 
tMOVCCi pattern only valid for low registers, as the Thumb1 mov immediate to
register instruction only works with low registers. Allowing high registers
for the instruction resulted in the assembler choosing the wide (32-bit)
encoding for the mov, but LLVM though the instruction was only 16 bits wide,
so offset calculations for constant pools became incorrect, leading to
out of range constant pool entries.

llvm-svn: 95686
 2010-02-09 19:51:37 +00:00
Johnny Chen
de3621cfa8 Added vcvtb/vcvtt (between half-precision and single-precision, VFP). 
For disassembly only.

A8.6.300

llvm-svn: 95669
 2010-02-09 17:21:56 +00:00
Chris Lattner
c4c733b815 move PR3462 to here. 
llvm-svn: 95650
 2010-02-09 05:55:14 +00:00
Chris Lattner
7c64c9ca21 add a note from PR6194 
llvm-svn: 95649
 2010-02-09 05:45:29 +00:00
Chris Lattner
682f64dc8d Implement x86 asm parsing support for %st and %st(4) 
llvm-svn: 95634
 2010-02-09 00:49:22 +00:00
Chris Lattner
804c2270c7 pass stringref by value instead of by const& 
llvm-svn: 95627
 2010-02-09 00:34:28 +00:00
Chris Lattner
dbbd13f825 move PR6212 to this file. 
llvm-svn: 95624
 2010-02-09 00:11:10 +00:00
Chris Lattner
1492d5c447 this is done, tested by CodeGen/ARM/iabs.ll 
llvm-svn: 95609
 2010-02-08 23:48:10 +00:00
Jim Grosbach
a7e098af3b tighten up eh.setjmp sequence a bit. 
llvm-svn: 95603
 2010-02-08 23:22:00 +00:00
Chris Lattner
dd84f7aa7b unify the paths for external symbols and global variables: 
2 files changed, 48 insertions(+), 83 deletions(-)

llvm-svn: 95599
 2010-02-08 23:03:41 +00:00
Chris Lattner
bd71035318 switch the rest of the "@ concatentation" logic in the X86 
backend to use X86MCTargetExpr, simplifying a bunch of code.

llvm-svn: 95595
 2010-02-08 22:52:47 +00:00
Sean Callanan
219789b7fb Fixed the AT&T AsmLexer to report the proper strings 
for register tokens.  Before, if it encountered
'%al,' it would report 'al,' as the token.  Now it
correctly reports '%al'.

llvm-svn: 95594
 2010-02-08 22:50:23 +00:00
Chris Lattner
0b30a3f944 switch ELF @GOTOFF references to use X86MCTargetExpr. 
llvm-svn: 95593
 2010-02-08 22:33:55 +00:00
Chris Lattner
6162c89bfe add an x86 implementation of MCTargetExpr for 
representing @GOT and friends.  Use it for
personality references as a first use.

llvm-svn: 95588
 2010-02-08 22:09:08 +00:00
Johnny Chen
396391964d Add VCVTR (between floating-point and integer, VFP) for disassembly purpose. 
The 'R' suffix means the to-integer operations use the rounding mode specified
by the FPSCR, encoded as Inst{7} = 0.

A8.6.295

llvm-svn: 95584
 2010-02-08 22:02:41 +00:00
Dan Gohman
f45b7c6795 Rename the PerformTailCallOpt variable to GuaranteedTailCallOpt to reflect 
its current purpose.

llvm-svn: 95564
 2010-02-08 20:27:50 +00:00
Johnny Chen
7092ebb040 Add VCMP (VFP floating-point compare without 'E' bit set) for disassembly purpose. 
llvm-svn: 95560
 2010-02-08 19:41:48 +00:00
Johnny Chen
92ec9f2887 Added VMOVRRS/VMOVSRR to ARMInstrVFP.td for disassembly purpose. 
A8.6.331 VMOV (between two ARM core registers and two single-precision registers)

llvm-svn: 95548
 2010-02-08 17:26:09 +00:00
Torok Edwin
01b6959fb6 Fix x86 JIT stub on MSVC. 
Thanks to Kristaps Straupe for noticing the bug.

llvm-svn: 95537
 2010-02-08 08:37:27 +00:00
Bruno Cardoso Lopes
014f8fc7b1 Add suport for VASTART on Mips. 
llvm-svn: 95506
 2010-02-06 21:00:02 +00:00
Bruno Cardoso Lopes
2f4294068f First step towards varargs support in Mips: 
- o32 cc must pass all arguments in A0...A3 and stack regardless
if its type (but respect the alignment).
- Store all variable arguments back to the caller stack.

llvm-svn: 95500
 2010-02-06 19:20:49 +00:00
Evan Cheng
5541068ad3 Run codegen dce pass for all targets at all optimization levels. Previously it's 
only run for x86 with fastisel. I've found it being very effective in
eliminating some obvious dead code as result of formal parameter lowering
especially when tail call optimization eliminated the need for some of the loads
from fixed frame objects. It also shrinks a number of the tests. A couple of
tests no longer make sense and are now eliminated.

llvm-svn: 95493
 2010-02-06 09:07:11 +00:00
Rafael Espindola
b0bb1ddfe3 Fix alignment on ppc linux. This fixes the build of crtend.o 
llvm-svn: 95477
 2010-02-06 03:32:21 +00:00
Evan Cheng
de1a4726e6 Do not emit callseq instructions around sibcalls. This eliminated some unnecessary stack adjustments. 
llvm-svn: 95475
 2010-02-06 03:28:46 +00:00
Jakob Stoklund Olesen
83ebc265b3 Reintroduce the InlineHint function attribute. 
This time it's for real! I am going to hook this up in the frontends as well.

The inliner has some experimental heuristics for dealing with the inline hint.
When given a -respect-inlinehint option, functions marked with the inline
keyword are given a threshold just above the default for -O3.

We need some experiments to determine if that is the right thing to do.

llvm-svn: 95466
 2010-02-06 01:16:28 +00:00
Bob Wilson
1a324958d6 Handle AddrMode6 (for NEON load/stores) in Thumb2's rewriteT2FrameIndex. 
Radar 7614112.

llvm-svn: 95456
 2010-02-06 00:24:38 +00:00
Chris Lattner
e1b8c529a4 fix incorrect encoding of SBB8mi that Kevin noticed. 
llvm-svn: 95448
 2010-02-05 22:56:11 +00:00
Chris Lattner
9d4e878b6a fix a case where we'd mis-encode fisttp because of an incorrect (and 
redundant with a correct one) pattern that was added for the disassembler.

llvm-svn: 95446
 2010-02-05 22:49:06 +00:00
Chris Lattner
261d9ac280 add note. 
llvm-svn: 95445
 2010-02-05 22:48:33 +00:00
Chris Lattner
8db3500688 port X86InstrInfo::determineREX over to the new encoder. 
llvm-svn: 95440
 2010-02-05 22:10:22 +00:00
Chris Lattner
15817c2239 wire up 64-bit MCCodeEmitter. 
llvm-svn: 95438
 2010-02-05 21:51:35 +00:00
Chris Lattner
22151cbec5 really kill off the last MRMInitReg inst, remove logic from encoder. 
llvm-svn: 95437
 2010-02-05 21:34:18 +00:00
Chris Lattner
071fe62af6 lower the last of the MRMInitReg instructions in MCInstLower. 
llvm-svn: 95435
 2010-02-05 21:30:49 +00:00
Chris Lattner
9b3cf069dc teach X86MCInstLower to lower the MOV32r0 and MOV8r0 
pseudo instructions.

llvm-svn: 95433
 2010-02-05 21:21:06 +00:00
Chris Lattner
f77eadcfbb genericize helpers, use them for MOV16r0/MOV64r0 
llvm-svn: 95432
 2010-02-05 21:15:57 +00:00
Chris Lattner
32f09202d6 factor code better in X86MCInstLower::Lower, teach it to 
lower the SETB* instructions.

llvm-svn: 95431
 2010-02-05 21:13:48 +00:00
Chris Lattner
3590276566 implement the rest of the encoding types. 
llvm-svn: 95414
 2010-02-05 19:37:31 +00:00
Chris Lattner
a6d9d45f42 move functions for decoding X86II values into the X86II namespace. 
llvm-svn: 95410
 2010-02-05 19:24:13 +00:00
Chris Lattner
326cf88352 constant propagate a method away. 
llvm-svn: 95408
 2010-02-05 19:20:30 +00:00
Chris Lattner
d43a7714c9 change getSizeOfImm and getBaseOpcodeFor to just take 
TSFlags directly instead of a TargetInstrDesc.

llvm-svn: 95405
 2010-02-05 19:16:26 +00:00
Chris Lattner
f20e6a05bd add some more encodings. 
llvm-svn: 95403
 2010-02-05 19:04:37 +00:00
Johnny Chen
0b398e3919 VMOVRRD and VMOVDRR both have Inst{7-6} = 0b00. 
llvm-svn: 95397
 2010-02-05 18:04:58 +00:00
Chris Lattner
c59cbacb06 implement the non-relocation forms of memory operands 
llvm-svn: 95368
 2010-02-05 06:16:07 +00:00
Evan Cheng
81dde4c7f7 Handle tail call with byval arguments. 
llvm-svn: 95351
 2010-02-05 02:21:12 +00:00
Chris Lattner
adf475aaf7 start adding MRMDestMem, which requires memory form mod/rm encoding 
to start limping.

llvm-svn: 95350
 2010-02-05 02:18:40 +00:00
Chris Lattner
f1f355c706 Add a few more encodings, we can now encode all of: 
pushl	%ebp
	movl	%esp, %ebp
	movl	$42, %eax
	popl	%ebp
	ret

llvm-svn: 95344
 2010-02-05 01:53:19 +00:00
Evan Phoenix
a44be8b7f3 Disable external stubs for X86-32 and X86-64 
Instruction selection for X86 now can choose an instruction
sequence that will fit any address of any symbol, no matter
the pointer width. X86-64 uses a mov+call-via-reg sequence
for this.

llvm-svn: 95323
 2010-02-04 19:56:59 +00:00
Chris Lattner
a635219775 move the PR6214 microoptzn to this file. 
llvm-svn: 95299
 2010-02-04 07:32:01 +00:00
Evan Cheng
f5ee7fb571 Re-enable x86 tail call optimization. 
llvm-svn: 95295
 2010-02-04 06:47:24 +00:00
Chris Lattner
e43007d443 add support for the sparcv9-*-* target triple to turn on 
64-bit sparc codegen.  Patch by Nathan Keynes!

llvm-svn: 95293
 2010-02-04 06:34:01 +00:00
Evan Cheng
c603f314de Indirect tail call has to go through a call preserved register since it's after callee register pops. X86 isel lowering is using EAX / R11 and it was somehow adding that to function live out. That prevented the real function return register from being added to the function live out list and bad things happen. 
This fixes 483.xalancbmk (with tail call opt).

llvm-svn: 95280
 2010-02-04 02:40:39 +00:00
Dale Johannesen
b9cb5e72fd Rewrite FP constant handling in DEBUG_VALUE yet 
again, so it more or less handles long double.
Restore \n removed in latest MC frenzy.

llvm-svn: 95271
 2010-02-04 01:33:43 +00:00
Chris Lattner
26cf12e3c9 enhance new encoder to support prefixes + RawFrm 
instructions with no operands.  It can now handle

define void @test2() nounwind { ret void }

llvm-svn: 95261
 2010-02-03 21:57:59 +00:00
Chris Lattner
5078a382e4 set up some infrastructure, some minor cleanups. 
llvm-svn: 95260
 2010-02-03 21:43:43 +00:00
Evan Cheng
5c8b1b9164 Speculatively disable x86 automatic tail call optimization while we track down a self-hosting issue. 
llvm-svn: 95259
 2010-02-03 21:40:40 +00:00
Chris Lattner
dc1807366c stub out a new X86 encoder, which can be tried with 
-enable-new-x86-encoder until its stable.

llvm-svn: 95256
 2010-02-03 21:24:49 +00:00
Chris Lattner
258fb66f6e rename createX86MCCodeEmitter to more accurately reflect what it creates. 
llvm-svn: 95254
 2010-02-03 21:14:33 +00:00
Kevin Enderby
57859abd72 Added support for X86 instruction prefixes so llvm-mc can assemble them. The 
Lock prefix, Repeat string operation prefixes and the Segment override prefixes.
Also added versions of the move string and store string instructions without the
repeat prefixes to X86InstrInfo.td. And finally marked the rep versions of
move/store string records in X86InstrInfo.td as isCodeGenOnly = 1 so tblgen is
happy building the disassembler files.

llvm-svn: 95252
 2010-02-03 21:04:42 +00:00
Chris Lattner
4b6b2b1363 reapply r95206, this time actually delete the code I'm replacing in the third stub case. 
llvm-svn: 95209
 2010-02-03 06:42:38 +00:00
Chris Lattner
427e5bf013 revert r95206, it is apparently causing bootstrap failure on i386-darwin9 
llvm-svn: 95208
 2010-02-03 06:41:18 +00:00
Chris Lattner
39e5f7d84d make the x86 backend emit darwin stubs through mcstreamer 
instead of textually.

llvm-svn: 95206
 2010-02-03 06:21:16 +00:00
Chris Lattner
837d242070 make MachineModuleInfoMachO hold non-const MCSymbol*'s instead 
of const ones.  non-const ones aren't very useful, because you can't
even, say, emit them.

llvm-svn: 95205
 2010-02-03 06:18:30 +00:00
Evan Cheng
d9cf09b0d6 Allow all types of callee's to be tail called. But avoid automatic tailcall if the callee is a result of bitcast to avoid losing necessary zext / sext etc. 
llvm-svn: 95195
 2010-02-03 03:28:02 +00:00
Chris Lattner
eb6d6da2e4 don't emit \n's at the start of X86AsmPrinter::runOnMachineFunction, 
.o files don't like that.

llvm-svn: 95187
 2010-02-03 01:49:49 +00:00
Chris Lattner
dda5d34934 rename printMachineInstruction -> EmitInstruction 
llvm-svn: 95184
 2010-02-03 01:41:03 +00:00
Chris Lattner
0bb2e04b36 print instructions through the mcstreamer. 
llvm-svn: 95181
 2010-02-03 01:16:28 +00:00
Chris Lattner
bcba6c8a07 emit instructions through the streamer. 
llvm-svn: 95180
 2010-02-03 01:15:03 +00:00
Chris Lattner
1797ff9f5a Finally eliminate printMCInst and send instructions through 
the streamer.  Demo:

$ cat t.ll 
define i32 @test() nounwind {
  ret i32 42
}
$ llc t.ll -o -
...
_test: 
	movl	$42, %eax
	ret
$ llc t.ll -o t.o -filetype=obj
$ otool -tv t.o 
t.o:
(__TEXT,__text) section
_test:
00000000	movl	$0x0000002a,%eax
00000005	ret

llvm-svn: 95179
 2010-02-03 01:13:25 +00:00
Chris Lattner
edf1e280a2 rejigger the world so that EmitInstruction prints the \n at 
the end of the instruction instead of expecting the caller to
do it.  This currently causes the asm-verbose instruction 
comments to be on the next line.

llvm-svn: 95178
 2010-02-03 01:09:55 +00:00
Chris Lattner
cd07a3a0b7 sink handling of target-independent machine instrs (other 
than DEBUG_VALUE :(  ) into the target indep AsmPrinter.cpp
file.   This allows elimination of the 
NO_ASM_WRITER_BOILERPLATE hack among other things.

llvm-svn: 95177
 2010-02-03 01:00:52 +00:00
Dale Johannesen
7c4c39e651 Print FPImm a less kludgy way; APFloat.toString seems 
to have some problems anyway.

llvm-svn: 95171
 2010-02-03 00:36:40 +00:00
Evan Cheng
1d121ec4d1 ByVal frame object size should be that of the byval argument, not the size of the type which is just a pointer. This is not known to break stuff but is wrong nevertheless. 
llvm-svn: 95163
 2010-02-02 23:58:13 +00:00
Jim Grosbach
23b76845a7 As of r79039, we still try to eliminate the frame pointer on leaf functions, 
even when -disable-fp-elim is specified.

llvm-svn: 95161
 2010-02-02 23:56:14 +00:00
Evan Cheng
9057fea7ef Revert 95130. 
llvm-svn: 95160
 2010-02-02 23:55:14 +00:00
Dale Johannesen
ca2fe230d2 Accept floating point immediates in DEBUG_VALUE. 
llvm-svn: 95159
 2010-02-02 23:54:23 +00:00
Daniel Dunbar
c6f8382263 AsmParser/X86: Add temporary hack to allow parsing "sal". Eventually we need 
some mechanism for specifying alternative syntaxes, but I'm not sure what form
that should take yet.

llvm-svn: 95158
 2010-02-02 23:46:47 +00:00
Chris Lattner
643f2f9bc4 refactor code so that LLVMTargetMachine creates the asmstreamer and 
mccontext instead of having AsmPrinter do it.  This allows other 
types of MCStreamer's to be passed in.

llvm-svn: 95155
 2010-02-02 23:37:42 +00:00
Chris Lattner
6996a481db tidy some targets. 
llvm-svn: 95146
 2010-02-02 22:13:21 +00:00
Chris Lattner
04d5dfafae remove dead code. 
llvm-svn: 95144
 2010-02-02 22:03:00 +00:00
Chris Lattner
b3d8901ca8 detemplatize the ppc code emitter. 
llvm-svn: 95142
 2010-02-02 21:55:58 +00:00
Chris Lattner
40e4a9d982 remove dead code. 
llvm-svn: 95141
 2010-02-02 21:52:03 +00:00
Chris Lattner
3dedba8e8c add a definition for ID. 
llvm-svn: 95140
 2010-02-02 21:49:29 +00:00
Chris Lattner
00a839b592 detemplatize ARM code emitter. 
llvm-svn: 95138
 2010-02-02 21:48:51 +00:00
Daniel Dunbar
fe2e25aa31 MCAsmParser/X86: Represent absolute memory operands as CodeGen does, with scale 
== 1.

llvm-svn: 95137
 2010-02-02 21:44:16 +00:00
Daniel Dunbar
60fac220dd MCCodeEmitter/X86: Handle tied registers better when converting MCInst -> 
MCMachineInstr. This also fixes handling of tied registers for MRMSrcMem
instructions.

llvm-svn: 95136
 2010-02-02 21:44:10 +00:00
Chris Lattner
ec61994b1d remove dead code. 
llvm-svn: 95134
 2010-02-02 21:38:59 +00:00
Chris Lattner
aad5bcaecb detemplatize alpha code emission, it is now JIT specific. 
llvm-svn: 95133
 2010-02-02 21:35:47 +00:00
Chris Lattner
21bcba21e7 eliminate all the dead addSimpleCodeEmitter implementations. 
eliminate random "code emitter" stuff in Alpha, except for
the JIT path.  Next up, remove the template cruft.

llvm-svn: 95131
 2010-02-02 21:31:47 +00:00
Evan Cheng
48375fbf4f Pass callsite return type to TargetLowering::LowerCall and use that to check sibcall eligibility. 
llvm-svn: 95130
 2010-02-02 21:29:10 +00:00
Chris Lattner
7d162688a9 eliminate FileModel::Model, just use CodeGenFileType. The client 
of the code generator shouldn't care what object format a target
uses.

llvm-svn: 95124
 2010-02-02 21:06:45 +00:00
Chris Lattner
cb4d0d0df4 remove the remnants of TargetMachOWriterInfo. 
llvm-svn: 95114
 2010-02-02 19:41:23 +00:00
Johnny Chen
3d9b3cb28b Added t2BFI (Bitfield Insert) entry for disassembler, with blank pattern field. 
llvm-svn: 95112
 2010-02-02 19:31:58 +00:00
Chris Lattner
c82a982126 remove PPCMachOWriterInfo. 
llvm-svn: 95111
 2010-02-02 19:23:55 +00:00
Evan Cheng
fac0fdc6a0 Perform sibcall in some cases when arguments are passes memory. Look for cases 
where callee's arguments are already in the caller's own caller's stack and
they line up perfectly. e.g.

extern int foo(int a, int b, int c);

int bar(int a, int b, int c) {
  return foo(a, b, c);
}

llvm-svn: 95053
 2010-02-02 02:22:50 +00:00
Johnny Chen
cab2ca005d MOVi16 should also be marked as a UnaryDP instruction, i.e., it doesn't have a 
Rn operand.

llvm-svn: 95025
 2010-02-01 23:06:04 +00:00
Evan Cheng
efa391da81 Fix PR6196. GV callee may not be a function. 
llvm-svn: 95017
 2010-02-01 22:40:09 +00:00
Bruno Cardoso Lopes
7099d40968 MulOp is actually a Mips specific node, so do the match using Opcode. This fixes PR6192 
llvm-svn: 94977
 2010-02-01 12:16:39 +00:00
Evan Cheng
dcc1816642 Undo r94946 now all the tests are passing again. 
llvm-svn: 94970
 2010-02-01 02:13:39 +00:00
Bruno Cardoso Lopes
2a49e86448 Fix stack size bug while using o32 abi 
llvm-svn: 94969
 2010-02-01 02:03:24 +00:00
Johnny Chen
15f2bf96d8 For MVNr and MVNs, we need to set Inst{25} = 0 so as not to confuse the decoder. 
llvm-svn: 94955
 2010-01-31 11:22:28 +00:00
Evan Cheng
e86a191862 Change TAILJMP's to be varargs and transfer implicit uses over from TCRETURN's. Otherwise the missing uses can make post-regalloc scheduling do bad things. This fixes 403.gcc. 
llvm-svn: 94950
 2010-01-31 07:28:44 +00:00
Evan Cheng
c3c18b9fe9 Fix a missing check from my last commit. 
llvm-svn: 94949
 2010-01-31 07:27:31 +00:00