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Commit Graph

118981 Commits

Author SHA1 Message Date
Simon Pilgrim
3c101973b3 [X86][AVX] Add support for shuffle decoding of vperm2f128/vperm2i128 with zero'd lanes
The vperm2f128/vperm2i128 shuffle mask decoding was not attempting to deal with shuffles that give zero lanes. This patch fixes this so that the assembly printer can provide shuffle comments.

As this decoder is also used in X86ISelLowering for shuffle combining, I've added an early-out to match existing behaviour. The hope is that we can add zero support in the future, this would allow other ops' decodes (e.g. insertps) to be combined as well.

Differential Revision: http://reviews.llvm.org/D10593

llvm-svn: 241516
2015-07-06 22:46:46 +00:00
Sanjay Patel
6781c4029c [x86] extend machine combiner reassociation optimization to SSE scalar adds
Extend the reassociation optimization of http://reviews.llvm.org/rL240361 (D10460)
to SSE scalar FP SP adds in addition to AVX scalar FP SP adds.

With the 'switch' in place, we can trivially add other opcodes and test cases in
future patches.

Differential Revision: http://reviews.llvm.org/D10975

llvm-svn: 241515
2015-07-06 22:35:29 +00:00
Simon Pilgrim
a825efbf95 [X86][SSE] Vectorized i64 uniform constant SRA shifts
This patch adds vectorization support for uniform constant i64 arithmetic shift right operators.

Differential Revision: http://reviews.llvm.org/D9645

llvm-svn: 241514
2015-07-06 22:35:19 +00:00
JF Bastien
55d9badb10 WebAssembly: add some TODO
Reviewers: sunfish

Subscribers: llvm-commits, jfb

Differential Revision: http://reviews.llvm.org/D10971

llvm-svn: 241513
2015-07-06 21:41:59 +00:00
Rafael Espindola
65d267277b llvm-nm: treat weak undefined as undefined.
This matches the behavior of gnu ld.

llvm-svn: 241512
2015-07-06 21:36:23 +00:00
Reid Kleckner
c447c449e6 [WinEH] Add some test cases I forgot to add to previous commits
llvm-svn: 241510
2015-07-06 21:13:53 +00:00
Reid Kleckner
80b41774f1 [WinEH] Insert the EH code load before the block terminator
The previous code put the load after the terminator, leading to invalid
IR and downstream crashes. This caused http://crbug.com/506446.

llvm-svn: 241509
2015-07-06 21:13:43 +00:00
Simon Pilgrim
385bee8c59 [X86][SSE4A] Shuffle lowering using SSE4A EXTRQ/INSERTQ instructions
This patch adds support for v8i16 and v16i8 shuffle lowering using the immediate versions of the SSE4A EXTRQ and INSERTQ instructions. Although rather limited (they can only act on the lower 64-bits of the source vectors, leave the upper 64-bits of the result vector undefined and don't have VEX encoded variants), the instructions are still useful for the zero extension of any lane (EXTRQ) or inserting a lane into another vector (INSERTQ). Testing demonstrated that it wasn't typically worth it to use these instructions for v2i64 or v4i32 vector shuffles although they are capable of it.

As well as adding specific pattern matching for the shuffles, the patch uses EXTRQ for zero extension cases where SSE41 isn't available and its more efficient than the SSE2 'unpack' default approach. It also adds shuffle decode support for the EXTRQ / INSERTQ cases when the instructions are handling full byte-sized extractions / insertions.

From this foundation, future patches will be able to make use of the instructions for situations that use their ability to extract/insert at the bit level.

Differential Revision: http://reviews.llvm.org/D10146

llvm-svn: 241508
2015-07-06 20:46:41 +00:00
Simon Pilgrim
af8901c21c [X86][SSE] Use the general SMAX/SMIN/UMAX/UMIN opcodes and remove the X86 implementation
With the completion of D9746 there is now a common implementation of integer signed/unsigned min/max nodes, removing the need for the equivalent X86 specific implementations.

This patch removes the old X86ISD nodes, legalizes the relevant SSE2/SSE41/AVX2/AVX512 instructions for the ISD versions and converts the small amount of existing X86 code.

Differential Revision: http://reviews.llvm.org/D10947

llvm-svn: 241506
2015-07-06 20:30:47 +00:00
Quentin Colombet
43040e44bc [TwoAddressInstructionPass] Rename a variable to match the coding style.
Spot by Bruno.

llvm-svn: 241505
2015-07-06 20:12:54 +00:00
Rafael Espindola
fd38a28754 Swap operands instead of using !.
This avoids returning true for A == B.

Thanks to Benjamin Kramer for noticing it.

llvm-svn: 241490
2015-07-06 19:24:40 +00:00
Rafael Espindola
7b0c357367 When sorting by address, undefined symbols go first.
This matches gnu nm.

llvm-svn: 241488
2015-07-06 19:21:04 +00:00
Rafael Espindola
e679aab0ed Reduce code duplication. NFC.
llvm-svn: 241484
2015-07-06 18:48:47 +00:00
Reid Kleckner
9e47912607 [llvm-extract] Drop comdats from declarations
The verifier rejects comdats on declarations.

llvm-svn: 241483
2015-07-06 18:48:02 +00:00
Rafael Espindola
384e9f4564 Fix printing of common symbols.
Printing the symbol size matches the behavior or both gnu nm and freebsd nm.

llvm-svn: 241480
2015-07-06 18:18:44 +00:00
Alex Lorenz
6945ffc637 llc: Add a 'run-pass' option.
This commit adds a 'run-pass' option to llc, which instructs the compiler to run
one specific code generation pass only.

Llc already has the 'start-after' and the 'stop-after' options, and this new
option complements the other two by making it easier to write tests that want
to invoke a single pass only.

Reviewers: Duncan P. N. Exon Smith

Differential Revision: http://reviews.llvm.org/D10776

llvm-svn: 241476
2015-07-06 17:44:26 +00:00
Matt Arsenault
591ddbb960 AMDGPU: Run SIInsertWaits as pre-emit pass
Running this after the scheduler enables scheduling
waits later so other ALU instructions can run while
this would be waiting.

When combined with enabling the post-RA scheduler, this
gives about a ~20% improvement on sgemm.

llvm-svn: 241473
2015-07-06 17:02:20 +00:00
Daniel Sanders
46f5420293 Change the last few internal StringRef triples into Triple objects.
Summary:
This concludes the patch series to eliminate StringRef forms of GNU triples
from the internals of LLVM that began in r239036.

At this point, the StringRef-form of GNU Triples should only be used in the
public API (including IR serialization) and a couple objects that directly
interact with the API (most notably the Module class). The next step is to
replace these Triple objects with the TargetTuple object that will represent
our authoratative/unambiguous internal equivalent to GNU Triples.

Reviewers: rengolin

Subscribers: llvm-commits, jholewinski, ted, rengolin

Differential Revision: http://reviews.llvm.org/D10962

llvm-svn: 241472
2015-07-06 16:56:07 +00:00
Adrian Prantl
95435ae535 DIBuilder: Don't rauw null pointers with empty arrays in finalize().
This makes the IR a little easier to read.

llvm-svn: 241470
2015-07-06 16:36:02 +00:00
Daniel Sanders
cd6495240a Where Triple has a suitable predicate, use it rather than the enum values. NFC.
Reviewers: mcrosier

Subscribers: llvm-commits, rengolin

Differential Revision: http://reviews.llvm.org/D10960

llvm-svn: 241469
2015-07-06 16:33:18 +00:00
Sanjay Patel
a3f313c186 use range-based for loops; NFCI
llvm-svn: 241468
2015-07-06 16:27:35 +00:00
Teresa Johnson
edf145601a Resubmit "Add new EliminateAvailableExternally module pass" (r239480)
This change includes a fix for https://code.google.com/p/chromium/issues/detail?id=499508#c3,
which required updating the visibility for symbols with eliminated definitions.

--Original Commit Message--

Add new EliminateAvailableExternally module pass, which is performed in
O2 compiles just before GlobalDCE, unless we are preparing for LTO.

This pass eliminates available externally globals (turning them into
declarations), regardless of whether they are dead/unreferenced, since
we are guaranteed to have a copy available elsewhere at link time.
This enables additional opportunities for GlobalDCE.

If we are preparing for LTO (e.g. a -flto -c compile), the pass is not
included as we want to preserve available externally functions for possible
link time inlining. The FE indicates whether we are doing an -flto compile
via the new PrepareForLTO flag on the PassManagerBuilder.

llvm-svn: 241466
2015-07-06 16:22:42 +00:00
Adrian Prantl
a6a9ba646e Use an early exit in DIBuilder::finalize() to improve readability.
llvm-svn: 241465
2015-07-06 16:22:12 +00:00
Adrian Prantl
f37db5ed1c Use the correct DIArray types in DICompileUnit::replace*().
Thanks to Yaron Keren for noticing!

llvm-svn: 241464
2015-07-06 16:22:07 +00:00
Sanjay Patel
f258757f92 use range-based for loops; NFCI
llvm-svn: 241463
2015-07-06 16:19:14 +00:00
Matt Arsenault
36294af135 AMDGPU/SI: Add debugging subtarget feature for DS offsets
We don't have a good way to detect most situations where
DS offsets are usable on SI, so add an option to force using
them even if unsafe for debugging performance problems.

llvm-svn: 241462
2015-07-06 16:01:58 +00:00
James Y Knight
528aaa5079 [Sparc] Add more instruction aliases.
These are mostly from the chart in the SparcV8 spec, section "A.3
Synthetic Instructions".

Differential Revision: http://reviews.llvm.org/D9834

llvm-svn: 241461
2015-07-06 16:01:07 +00:00
James Y Knight
91a40832bd [Sparc] Add support for flush instruction.
Differential Revision: http://reviews.llvm.org/D9833

llvm-svn: 241460
2015-07-06 16:01:04 +00:00
Rafael Espindola
912c2c2a57 Simplify. NFC.
llvm-svn: 241458
2015-07-06 15:53:43 +00:00
Rafael Espindola
67f8a419f3 Simplify. NFC.
llvm-svn: 241456
2015-07-06 15:47:43 +00:00
Rafael Espindola
3512edc3a1 Inline function into single use. NFC.
llvm-svn: 241453
2015-07-06 15:36:50 +00:00
Rafael Espindola
94aac821b6 Remove getRelocationAddress.
Originally added in r139314.

Back then it didn't actually get the address, it got whatever value the
relocation used: address or offset.

The values in different object formats are:

* MachO: Always an offset.
* COFF: Always an address, but when talking about the virtual address of
  sections it says: "for simplicity, compilers should set this to zero".
* ELF: An offset for .o files and and address for .so files. In the case of the
  .so, the relocation in not linked to any section (sh_info is 0). We can't
  really compute an offset.

Some API mappings would be:

* Use getAddress for everything. It would be quite cumbersome. To compute the
  address elf has to follow sh_info, which can be corrupted and therefore the
  method has to return an ErrorOr. The address of the section is also the same
  for every relocation in a section, so we shouldn't have to check the error
  and fetch the value for every relocation.

* Use a getValue and make it up to the user to know what it is getting.

* Use a getOffset and:
 * Assert for dynamic ELF objects. That is a very peculiar case and it is
   probably fair to ask any tool that wants to support it to use ELF.h. The
   only tool we have that reads those (llvm-readobj) already does that. The
   only other use case I can think of is a dynamic linker.
 * Check that COFF .obj files have sections with zero virtual address spaces. If
   it turns out that some assembler/compiler produces these, we can change
   COFFObjectFile::getRelocationOffset to subtract it. Given COFF format,
   this can be done without the need for ErrorOr.

The getRelocationAddress method was never implemented for COFF. It also
had exactly one use in a very peculiar case: a shortcut for adding the
section value to a pcrel reloc on MachO.

Given that, I don't expect that there is any use out there of the C API. If
that is not the case, let me know and I will add it back with the implementation
inlined and do a proper deprecation.

llvm-svn: 241450
2015-07-06 14:55:37 +00:00
Chad Rosier
46c71906bc Fix a bug in the A57FPLoadBalancing register tracking/scavenger.
The code in AArch64A57FPLoadBalancing::scavengeRegister() to handle dead defs
was not correctly handling aliased registers.  E.g. if the dead def was of D2,
then S2 was not being marked as unavailable, so it could potentially be used
across a live-range in which it would be clobbered.

Patch by Geoff Berry <gberry@codeaurora.org>!
Phabricator: http://reviews.llvm.org/D10900

llvm-svn: 241449
2015-07-06 14:46:34 +00:00
Rafael Espindola
2c1a53aa22 Check that COFF .obj files have sections with zero virtual address spaces.
When talking about the virtual address of sections the coff spec says:
  ... for simplicity, compilers should set this to zero. Otherwise, it is an
  arbitrary value that is subtracted from offsets during relocation.

We don't currently subtract it, so check that it is zero.

If some producer does create such files, we can change getRelocationOffset
instead.

llvm-svn: 241447
2015-07-06 14:26:07 +00:00
Simon Pilgrim
e9f414f573 [X86][SSE] Added missing stack folding test for SQRTSD and SQRTSS instructions.
llvm-svn: 241445
2015-07-06 14:15:02 +00:00
Asaf Badouh
a51b8d0d5b [X86][AVX512] Multiply Packed Unsigned Integers with Round and Scale
pmulhrsw

review:
http://reviews.llvm.org/D10948

llvm-svn: 241443
2015-07-06 14:03:40 +00:00
Petar Jovanovic
7a79c8b85b [Mips] Add support for MCJIT for MIPS32r6
Add support for resolving MIPS32r6 relocations in MCJIT.

Patch by Vladimir Radosavljevic.

Differential Revision: http://reviews.llvm.org/D10687

llvm-svn: 241442
2015-07-06 12:50:55 +00:00
Rafael Espindola
b31a748216 Fix handling of ELF::R_MIPS_32 on Mips64.
Thanks to Aboud, Amjad for reporting the regression and providing the testcase.

llvm-svn: 241440
2015-07-06 12:18:44 +00:00
Craig Topper
156446ee87 [TableGen] Change a couple methods to return an ArrayRef instead of a const std::vector reference. NFC
llvm-svn: 241430
2015-07-06 06:23:01 +00:00
Rafael Espindola
99641b063a Make this test a bit more interesting.
Before every test was using a section with an address of zero.

llvm-svn: 241427
2015-07-06 02:45:01 +00:00
NAKAMURA Takumi
645b933abd Untabify.
llvm-svn: 241423
2015-07-06 00:48:17 +00:00
Sanjay Patel
5279d4c427 change CHECK to CHECK-LABEL for more precision
llvm-svn: 241422
2015-07-05 23:19:16 +00:00
Sanjay Patel
05f4dbff19 remove unnecessary test specifications
llvm-svn: 241419
2015-07-05 22:37:51 +00:00
Sanjay Patel
113a28da79 minimize test case and remove unnecessary opt passes
llvm-svn: 241418
2015-07-05 22:30:12 +00:00
Sanjay Patel
cec1ae5ae2 remove unnecessary temp variable; NFCI
llvm-svn: 241415
2015-07-05 21:21:47 +00:00
Peter Collingbourne
81c161f9de Verifier: Forbid comdats on linker declarations.
Differential Revision: http://reviews.llvm.org/D10945

llvm-svn: 241414
2015-07-05 20:52:40 +00:00
Peter Collingbourne
f49ef7d3ac IR: Do not consider available_externally linkage to be linker-weak.
From the linker's perspective, an available_externally global is equivalent
to an external declaration (per isDeclarationForLinker()), so it is incorrect
to consider it to be a weak definition.

Also clean up some logic in the dead argument elimination pass and clarify
its comments to better explain how its behavior depends on linkage,
introduce GlobalValue::isStrongDefinitionForLinker() and start using
it throughout the optimizers and backend.

Differential Revision: http://reviews.llvm.org/D10941

llvm-svn: 241413
2015-07-05 20:52:35 +00:00
Sanjay Patel
c3c59efa36 use range-based for loops; NFCI
llvm-svn: 241412
2015-07-05 20:15:21 +00:00
Benjamin Kramer
89b0e53c15 [TargetLowering] StringRefize asm constraint getters.
There is some functional change here because it changes target code from
atoi(3) to StringRef::getAsInteger which has error checking. For valid
constraints there should be no difference.

llvm-svn: 241411
2015-07-05 19:29:18 +00:00
Simon Pilgrim
99be799579 [X86][SSE3] Just use an explicit SSE3 target attribute - not a cpu type.
Merged arch/target into a specific triple - we had i686 and x86_64 targets overriding each other....

llvm-svn: 241410
2015-07-05 19:06:32 +00:00