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Commit Graph

678 Commits

Author SHA1 Message Date
Reid Spencer
4fe8454735 Don't #include DerivedTypes.h in this header. Make adjustments to
compensate. Move a function out of line to TargetLowering.cpp

llvm-svn: 33153
2007-01-12 23:21:42 +00:00
Evan Cheng
a8ed507f15 - Move RTLIB::Libcall enum to a separate file.
- Code clean up.

llvm-svn: 33148
2007-01-12 22:49:32 +00:00
Evan Cheng
3e3e3865b8 Silence a bogus compiler warning.
llvm-svn: 33145
2007-01-12 22:30:07 +00:00
Reid Spencer
373d2bccea For PR1064:
Implement the arbitrary bit-width integer feature. The feature allows
integers of any bitwidth (up to 64) to be defined instead of just 1, 8,
16, 32, and 64 bit integers.

This change does several things:
1. Introduces a new Derived Type, IntegerType, to represent the number of
   bits in an integer. The Type classes SubclassData field is used to
   store the number of bits. This allows 2^23 bits in an integer type.
2. Removes the five integer Type::TypeID values for the 1, 8, 16, 32 and
   64-bit integers. These are replaced with just IntegerType which is not
   a primitive any more.
3. Adjust the rest of LLVM to account for this change.

Note that while this incremental change lays the foundation for arbitrary
bit-width integers, LLVM has not yet been converted to actually deal with
them in any significant way. Most optimization passes, for example, will
still only deal with the byte-width integer types.  Future increments
will rectify this situation.

llvm-svn: 33113
2007-01-12 07:05:14 +00:00
Evan Cheng
032a597692 Store default libgcc routine names and allow them to be redefined by target.
llvm-svn: 33105
2007-01-12 02:11:51 +00:00
Reid Spencer
f3265181e2 Rename BoolTy as Int1Ty. Patch by Sheng Zhou.
llvm-svn: 33076
2007-01-11 18:21:29 +00:00
Evan Cheng
38cb858ee5 - Remove isSetCCExpensive() etc. These are no longer used.
- Add isSelectExpensive() etc. It's used to tell codegen that select is expensive for a given target, avoid using it if possible. Currently it's only
used to expand FCOPYSIGN.

llvm-svn: 32939
2007-01-05 23:31:08 +00:00
Evan Cheng
82d9b2077b Fix naming inconsistency: calleesave -> calleesaved.
llvm-svn: 32821
2007-01-02 21:30:17 +00:00
Evan Cheng
3eb79afad9 Add virtual method spillCalleeSaveRegisters() and restoreCalleeSaveRegisters()
to MRegisterInfo. These allow the target to issue instructions to spill and
restore callee saved registers in case where individual stores / loads aren't
the correct / profitable choice.

llvm-svn: 32820
2007-01-02 20:55:17 +00:00
Reid Spencer
a7eaf62ace For PR950:
Change integer type names for signless integer types

llvm-svn: 32777
2006-12-31 05:23:18 +00:00
Jim Laskey
0b63729c62 Grandchildren are covered by protect.
llvm-svn: 32736
2006-12-21 21:24:35 +00:00
Jim Laskey
80eeff2d0d Changes from Nick Lewycky with a simplified PPCTargetAsmInfo.
llvm-svn: 32735
2006-12-21 20:26:09 +00:00
Bill Wendling
7f6a73eb5c Added an automatic cast to "std::ostream*" etc. from OStream. We then can
rework the hacks that had us passing OStream in. We pass in std::ostream*
instead, check for null, and then dispatch to the correct print() method.

llvm-svn: 32636
2006-12-17 05:15:13 +00:00
Evan Cheng
e0aa279fc8 Silly assertion. Forgot variable_ops instructions can have arbitrary number of
operands.

llvm-svn: 32592
2006-12-15 06:37:08 +00:00
Evan Cheng
7684d815d1 Add getTypeToExpandTo() which recursively walks TransformToType to determine
the intrinsic type to expand to.

llvm-svn: 32558
2006-12-13 20:52:00 +00:00
Evan Cheng
2346bdd8c3 Update comments.
llvm-svn: 32532
2006-12-13 06:12:35 +00:00
Evan Cheng
5c6304ca6e Update comments.
llvm-svn: 32531
2006-12-13 06:09:03 +00:00
Jim Laskey
bd1b9f937b Remove unneeded include.
llvm-svn: 32489
2006-12-12 19:36:53 +00:00
Jim Laskey
b039172d58 Rollback changes to take a different tack.
llvm-svn: 32488
2006-12-12 19:26:50 +00:00
Jim Laskey
8a5cea99ed Honor the command line specification for machine type.
llvm-svn: 32483
2006-12-12 16:07:33 +00:00
Anton Korobeynikov
e76b69846d Cleaned setjmp/longjmp lowering interfaces. Now we're producing right
code (both asm & cbe) for Mingw32 target.
Removed autoconf checks for underscored versions of setjmp/longjmp.

llvm-svn: 32415
2006-12-10 23:12:42 +00:00
Evan Cheng
f1e9ec7225 Added option -soft-float to generate SW fp library calls instead of fp instructions.
llvm-svn: 32393
2006-12-09 02:41:30 +00:00
Evan Cheng
88a55bdd64 Move findTiedToSrcOperand to TargetInstrDescriptor.
llvm-svn: 32366
2006-12-08 18:45:48 +00:00
Evan Cheng
dfec38a575 Use MI's TargetInstrDescriptor.
llvm-svn: 32352
2006-12-08 07:57:56 +00:00
Evan Cheng
3f151090e6 Typo
llvm-svn: 32095
2006-12-01 21:50:17 +00:00
Evan Cheng
d042dac8ab - Add getOperandConstraint() to TargetInstrDescriptor.
- convertToThreeAddress() change to allow single two-address MI to be converted
  into one or more 3-address MIs.

llvm-svn: 32094
2006-12-01 21:46:55 +00:00
Evan Cheng
c5ad9caeff Add weak reference directive.
llvm-svn: 32091
2006-12-01 20:47:11 +00:00
Chris Lattner
d00734a230 add a hook to allow targets to hack on inline asms to lower them to llvm
when they want to.

llvm-svn: 31997
2006-11-29 01:12:32 +00:00
Andrew Lenharth
c51f451af5 Add per-target support for asm translation in the cbe
llvm-svn: 31972
2006-11-28 19:52:20 +00:00
Evan Cheng
6f5962e79f Add opcode to TargetInstrDescriptor.
llvm-svn: 31802
2006-11-17 01:36:01 +00:00
Evan Cheng
c050bb298f Add a mechanism to specify whether a target supports a particular indexed load / store.
llvm-svn: 31597
2006-11-09 18:56:43 +00:00
Evan Cheng
89ee587963 Rename ISD::MemOpAddrMode to ISD::MemIndexedMode
llvm-svn: 31595
2006-11-09 17:55:04 +00:00
Evan Cheng
6b7d127df9 getPostIndexedAddressParts change: passes in load/store instead of its loaded / stored VT.
llvm-svn: 31584
2006-11-09 04:29:46 +00:00
Evan Cheng
8743c67826 Remove M_2_ADDR_FLAG.
llvm-svn: 31583
2006-11-09 02:22:54 +00:00
Evan Cheng
db0add3bcb Added target hook for post-indexed memory ops transformation.
llvm-svn: 31499
2006-11-07 09:04:16 +00:00
Chris Lattner
b6be2b873f Add a new operand flag to mark which operand is the first predicate operand
of an M_PREDICATED instruction.

llvm-svn: 31482
2006-11-06 23:53:08 +00:00
Chris Lattner
d7138e5f2d add a flag so that predicated instructions can be recognized by branch
folding

llvm-svn: 31479
2006-11-06 21:44:17 +00:00
Evan Cheng
466e20fca2 Rename
llvm-svn: 31413
2006-11-03 07:21:16 +00:00
Evan Cheng
9ebbced355 Added a target specific hook to check whether / how a node can be transformed
into a pair of base / offset nodes for pre-indexed load / store ops.

llvm-svn: 31407
2006-11-03 03:04:06 +00:00
Chris Lattner
4cb79a5f9d generalize this api
llvm-svn: 31365
2006-11-02 01:39:10 +00:00
Evan Cheng
1da5ee8485 Rename
llvm-svn: 31364
2006-11-01 23:18:32 +00:00
Evan Cheng
b1ac9f6c12 Added getTiedToSrcOperand() to check for two-address'ness.
llvm-svn: 31360
2006-11-01 23:00:31 +00:00
Evan Cheng
c566892bd5 Add operand constraints to TargetInstrInfo.
llvm-svn: 31333
2006-11-01 00:27:05 +00:00
Chris Lattner
d9afd310a6 Change the prototype for TargetLowering::isOperandValidForConstraint
llvm-svn: 31318
2006-10-31 19:40:43 +00:00
Reid Spencer
e01994f8b1 Don't mislead readers by claiming a variable is defaulted to false when
the default is actually true.

llvm-svn: 31300
2006-10-30 22:46:49 +00:00
Reid Spencer
db06ed9156 Add debug support for X86/ELF targets (Linux). This allows llvm-gcc4
generated object modules to be debugged with gdb. Hopefully this helps
pre-release debugging.

llvm-svn: 31299
2006-10-30 22:32:30 +00:00
Chris Lattner
dcfee77788 add another target hook for branch folding.
llvm-svn: 31262
2006-10-28 17:29:57 +00:00
Evan Cheng
5963dcb6e8 Added CStringSection.
llvm-svn: 31202
2006-10-26 19:16:20 +00:00
Devang Patel
cb480ce29c TargetData is not subclassed. So no need to have virtual method.
llvm-svn: 31173
2006-10-24 20:48:29 +00:00
Devang Patel
0691019e12 Move getPreferredAlignmentLog from AsmPrinter to TargetData
llvm-svn: 31171
2006-10-24 20:32:14 +00:00
Chris Lattner
bc4f0e8b56 update comment
llvm-svn: 31165
2006-10-24 17:41:22 +00:00
Rafael Espindola
b35e4b16ae fix assert comment
llvm-svn: 31154
2006-10-24 14:47:28 +00:00
Chris Lattner
7353b07275 expose DWARF_LABEL opcode# so the branch folder can update debug info properly.
llvm-svn: 31024
2006-10-17 22:41:45 +00:00
Chris Lattner
ea84388ac0 update comment
llvm-svn: 31023
2006-10-17 22:12:15 +00:00
Evan Cheng
fe5bb5dbe6 Merge ISD::TRUNCSTORE to ISD::STORE. Switch to using StoreSDNode.
llvm-svn: 30945
2006-10-13 21:14:26 +00:00
Chris Lattner
b441d8e8ce it is easier to implement these when they are virtual
llvm-svn: 30944
2006-10-13 21:02:27 +00:00
Chris Lattner
520bf168f5 allow branch reversal to fail
llvm-svn: 30943
2006-10-13 20:59:31 +00:00
Chris Lattner
f8eaaded24 replace the existing branch inspection/modification APIs with something more
useful and general.

llvm-svn: 30940
2006-10-13 20:44:01 +00:00
Chris Lattner
63ec35db20 Expose method and ivars for measuring inline asm length properly.
llvm-svn: 30934
2006-10-13 17:50:07 +00:00
Evan Cheng
967d6af1d2 Merging ISD::LOAD and ISD::LOADX. Added LoadSDNode to represent load nodes.
Chain and address ptr remains as operands. SrcValue, extending mode, extending
VT (or rather loaded VT before extension) are now instance variables of
LoadSDNode.

Introduce load / store addressing modes to represent pre- and post-indexed
load and store. Also added an additional operand offset that is only used in
post-indexed mode (i.e. base ptr += offset after load/store).

Added alignment info (not yet used) and isVolatile fields.

llvm-svn: 30843
2006-10-09 20:55:20 +00:00
Chris Lattner
77545e4a28 Add support for targets to declare that they use a GOT
llvm-svn: 30777
2006-10-06 22:46:34 +00:00
Chris Lattner
94d1cfd32d remove JumpTableTextSection
llvm-svn: 30746
2006-10-05 03:14:23 +00:00
Chris Lattner
da8321b52e move getSectionForFunction to AsmPrinter.
llvm-svn: 30734
2006-10-05 02:41:43 +00:00
Chris Lattner
6ba6d0e937 Give TargetAsmInfo a virtual dtor, add a new getSectionForFunction method.
llvm-svn: 30732
2006-10-05 00:35:16 +00:00
Evan Cheng
494e8e6971 Combine ISD::EXTLOAD, ISD::SEXTLOAD, ISD::ZEXTLOAD into ISD::LOADX. Add an
extra operand to LOADX to specify the exact value extension type.

llvm-svn: 30714
2006-10-04 00:56:09 +00:00
Evan Cheng
51144ea51c - Added a hook processFunctionBeforeCalleeSaveScn(). This is called by PEI just
before it determines which callee-save registers are to be spilled. This allows
the target to make changes such as forcing certain physical registers to be
spilled.
- Modified comments. It's important to note the order of registers in the array
returns by getCalleeSaveRegs() determines the order of callee save spill code.

llvm-svn: 30635
2006-09-28 00:07:19 +00:00
Chris Lattner
167aa73273 Add support for targets that want to do something with the llvm.used list,
because they have an aggressive linker that does dead code stripping.

llvm-svn: 30604
2006-09-26 03:38:18 +00:00
Chris Lattner
bab51c66fc order this properly to avoid warnings in TargetAsmInfo.cpp. Add a comment
in a format that matches every other ivars in this class.

llvm-svn: 30603
2006-09-25 22:38:36 +00:00
Andrew Lenharth
58f5a24f0c Add support for other relocation bases to jump tables, as well as custom asm directives
llvm-svn: 30593
2006-09-24 19:45:58 +00:00
Jim Laskey
160a8aa339 1. Remove condition on delete.
2. Protect and outline createTargetAsmInfo.

3. Misc. kruft.

llvm-svn: 30169
2006-09-07 23:39:26 +00:00
Jim Laskey
9da25f6119 Make target asm info a property of the target machine.
llvm-svn: 30162
2006-09-07 22:06:40 +00:00
Jim Laskey
b3cfa98236 Separate target specifc asm properties from asm printers.
llvm-svn: 30127
2006-09-06 18:35:33 +00:00
Duraid Madina
51396ffd3e add setJumpBufSize() and setJumpBufAlignment() to target-lowering.
Call these from your backend to enjoy setjmp/longjmp goodness, see
lib/Target/IA64/IA64ISelLowering.cpp for an example

llvm-svn: 30095
2006-09-04 06:21:35 +00:00
Chris Lattner
33c9ddc91d Completely rearchitect the interface between targets and the pass manager.
This pass:

1. Splits TargetMachine into TargetMachine (generic targets, can be implemented
any way, like the CBE) and LLVMTargetMachine (subclass of TM that is used by
things using libcodegen and other support).
2. Instead of having each target fully populate the passmgr for file or JIT
   output, move all this to common code, and give targets hooks they can
   implement.
3. Commonalize the target population stuff between file emission and JIT
   emission.
4. All (native code) codegen stuff now happens in a FunctionPassManager, which
   paves the way for "fast -O0" stuff in the CFE later, and now LLC could
   lazily stream .bc files from disk to use less memory.
5. There are now many fewer #includes and the targets don't depend on the
   scalar xforms or libanalysis anymore (but codegen does).
6. Changing common code generator pass ordering stuff no longer requires
   touching all targets.
7. The JIT now has the option of "-fast" codegen or normal optimized codegen,
   which is now orthogonal to the fact that JIT'ing is being done.

llvm-svn: 30081
2006-09-04 04:14:57 +00:00
Chris Lattner
2024543fb2 Eliminate target name.
llvm-svn: 30071
2006-09-03 18:44:26 +00:00
Chris Lattner
a6ad752f16 update some comments
llvm-svn: 29853
2006-08-24 00:21:32 +00:00
Chris Lattner
db290f7479 Constify some methods. Patch provided by Anton Vayvod, thanks!
llvm-svn: 29756
2006-08-17 22:00:08 +00:00
Chris Lattner
8dd142b7b7 Doxygenify some methods.
llvm-svn: 29592
2006-08-10 06:00:40 +00:00
Chris Lattner
55dad5c6ac update comment
llvm-svn: 29507
2006-08-03 18:57:28 +00:00
Chris Lattner
0b8dd1f32f remove some more dead sparcv9 support stuff
llvm-svn: 29506
2006-08-03 18:55:44 +00:00
Evan Cheng
4ceeac4159 Resolve BB references with relocation.
llvm-svn: 29351
2006-07-27 18:21:10 +00:00
Evan Cheng
39112023f1 Move synchronizeICache from TargetJITInfo into a static function in JITEmitter.cpp
llvm-svn: 29334
2006-07-27 06:33:55 +00:00
Chris Lattner
b4165c39d7 Rename RelocModel::PIC to PIC_, to avoid conflicts with -DPIC.
llvm-svn: 29307
2006-07-26 21:12:04 +00:00
Evan Cheng
beeb4e5c8c - Refactor the code that resolve basic block references to a TargetJITInfo
method.
- Added synchronizeICache() to TargetJITInfo. It is called after each block
  of code is emitted to flush the icache. This ensures correct execution
  on targets that have separate dcache and icache.
- Added PPC / Mac OS X specific code to do icache flushing.

llvm-svn: 29276
2006-07-25 20:40:54 +00:00
Jim Laskey
a67adda697 Use an enumeration to eliminate data relocations.
llvm-svn: 29249
2006-07-21 20:57:35 +00:00
Evan Cheng
0675bc6539 Make sub- and super- register classes const.
llvm-svn: 29200
2006-07-19 05:58:18 +00:00
Evan Cheng
a6c9288186 Added option -code-model to set code model (only used in 64-bit) mode. Valid
values include small, kernel, medium, large, and default.

llvm-svn: 29009
2006-07-06 01:53:36 +00:00
Evan Cheng
6909286861 Clean up
llvm-svn: 28851
2006-06-17 01:42:20 +00:00
Chris Lattner
c6a5850ceb Simplify the targetdata ctor by not passing in a "targetname" which is always
ignored.

llvm-svn: 28829
2006-06-16 18:21:53 +00:00
Chris Lattner
9fcdb0d7e5 Remove ctor with each piece specifyable (which causes overload ambiguities),
add a new init method.

llvm-svn: 28828
2006-06-16 18:11:26 +00:00
Evan Cheng
276a39d956 Avoid undesirable behavior when assert is not enabled.
llvm-svn: 28793
2006-06-15 08:10:27 +00:00
Evan Cheng
07d8ccec50 Instructions with variable operands (variable_ops) can have a number required
operands. e.g.
def CALL32r : I<0xFF, MRM2r, (ops GR32:$dst, variable_ops),
                "call {*}$dst", [(X86call GR32:$dst)]>;
TableGen should emit operand informations for the "required" operands.

Added a target instruction info flag M_VARIABLE_OPS to indicate the target
instruction may have more operands in addition to the minimum required
operands.

llvm-svn: 28791
2006-06-15 07:22:16 +00:00
Andrew Lenharth
a2bda5b0e1 Start on my todo list
llvm-svn: 28752
2006-06-12 16:07:18 +00:00
Reid Spencer
574d4e6992 For PR786:
Minor tweaks in public headers and a few .cpp files so that LLVM can build
successfully with -pedantic and projects using LLVM with -pedantic don't
get warnings from LLVM. There's still more -pedantic warnings to fix.

llvm-svn: 28453
2006-05-24 19:21:13 +00:00
Evan Cheng
6909147763 -enable-unsafe-fp-math implies -enable-finite-only-fp-math
llvm-svn: 28437
2006-05-23 18:18:46 +00:00
Evan Cheng
86e56c1066 Added option -enable-finite-only-fp-math. When on, the codegen can assume that
FP arithmetic arguments and results are never NaNs or +=Infs. This includes
ignoring parity flag (PF) when checking for FP equality.

llvm-svn: 28432
2006-05-23 06:39:12 +00:00
Owen Anderson
4a78af08aa Make TargetData strings less redundant.
llvm-svn: 28423
2006-05-20 23:28:54 +00:00
Evan Cheng
00c1318055 lib/Target/Target.td
llvm-svn: 28386
2006-05-18 20:42:07 +00:00
Evan Cheng
89f7ea0382 Another typo. Pointed out by Nate Begeman.
llvm-svn: 28353
2006-05-17 18:22:14 +00:00
Evan Cheng
09c4a5d032 Fix a mis-leading comment.
llvm-svn: 28350
2006-05-17 18:08:20 +00:00
Chris Lattner
3e13a7d49e There is now a default impl of this method
llvm-svn: 28336
2006-05-16 22:52:11 +00:00
Andrew Lenharth
14504c85ed Move this code to a common place
llvm-svn: 28329
2006-05-16 17:42:15 +00:00
Chris Lattner
de8ef53351 Improve comments, patch provided by Vladimir Prus!
llvm-svn: 28305
2006-05-15 17:25:05 +00:00
Owen Anderson
1245bd420e Add a method to generate a string representation from a TargetData.
This continues the work on PR 761.

llvm-svn: 28239
2006-05-12 07:01:44 +00:00
Owen Anderson
29e4d70aed Refactor a bunch of includes so that TargetMachine.h doesn't have to include
TargetData.h.  This should make recompiles a bit faster with my current
TargetData tinkering.

llvm-svn: 28238
2006-05-12 06:33:49 +00:00
Owen Anderson
30ffff31f2 Add a new constructor to TargetData that builds a TargetData from its
string representation.

This is part of PR 761.

llvm-svn: 28234
2006-05-12 05:49:47 +00:00
Evan Cheng
0b8e4bca80 Add capability to scheduler to commute nodes for profit.
If a two-address code whose first operand has uses below, it should be commuted
when possible.

llvm-svn: 28230
2006-05-12 01:58:24 +00:00
Evan Cheng
e2cebf972d Also add super- register class info.
llvm-svn: 28222
2006-05-11 07:31:44 +00:00
Evan Cheng
e989b1534a Added sub- register classes information.
llvm-svn: 28196
2006-05-09 06:35:30 +00:00
Chris Lattner
06d617846d Add some new methods for computing sign bit information.
llvm-svn: 28144
2006-05-06 09:26:22 +00:00
Chris Lattner
9f535ef329 Fix this to be a proper copy ctor
llvm-svn: 28111
2006-05-04 21:17:35 +00:00
Owen Anderson
71bc529dfa Refactor TargetMachine, pushing handling of TargetData into the target-specific subclasses. This has one caller-visible change: getTargetData() now returns a pointer instead of a reference.
This fixes PR 759.

llvm-svn: 28074
2006-05-03 01:29:57 +00:00
Chris Lattner
6a2ec2cd3b Remove a bunch of dead stuff, shrinkifying TargetInstrDescriptor significantly.
llvm-svn: 27897
2006-04-20 18:32:02 +00:00
Chris Lattner
1fcd927af4 Remove some obsolete interfaces
llvm-svn: 27896
2006-04-20 18:17:21 +00:00
Evan Cheng
ec4d1668ef Added a virtual method isVectorClearMaskLegal to TLI. It is similar to
isShuffleMaskLegal, used to determine if it makes sense to turn a
"vector clear" (e.g. pand V, <0, -1, 0, -1> to a shuffle of the vector and
a zero vector.

llvm-svn: 27873
2006-04-20 08:54:13 +00:00
Chris Lattner
048bc55352 Provide a default impl of LowerArguments
llvm-svn: 27605
2006-04-12 16:21:12 +00:00
Jim Laskey
54dc261ef6 Use existing information.
llvm-svn: 27574
2006-04-10 23:09:19 +00:00
Jim Laskey
b93bc75add Foundation for call frame information.
llvm-svn: 27491
2006-04-07 16:34:46 +00:00
Chris Lattner
1dc3c03ee7 Move isShuffleLegal from TLI to Legalize.
llvm-svn: 27398
2006-04-04 17:21:22 +00:00
Chris Lattner
9925c6018f Allow targets to have fine grained control over which types various ops get
promoted to, if they desire.

llvm-svn: 27389
2006-04-04 00:25:10 +00:00
Chris Lattner
8e0dfe133c Modify the TargetLowering::getPackedTypeBreakdown method to also return the
unpromoted element type.

llvm-svn: 27273
2006-03-31 00:46:36 +00:00
Chris Lattner
557951b354 Add a method useful for decimating vectors.
llvm-svn: 27269
2006-03-31 00:28:23 +00:00
Jim Laskey
eb38a3e83a Expose base register for DwarfWriter. Refactor code accordingly.
llvm-svn: 27225
2006-03-28 13:48:33 +00:00
Jim Laskey
b4ff5c3e78 Tweak a comment.
llvm-svn: 27066
2006-03-24 16:18:42 +00:00
Jim Laskey
06c78bb995 Clean up some commentary.
llvm-svn: 27064
2006-03-24 10:00:56 +00:00
Jim Laskey
cec9c18c62 Add support to locate local variables in frames (early version.)
llvm-svn: 26994
2006-03-23 18:12:57 +00:00
Chris Lattner
b26a7c8735 Eliminate IntrinsicLowering from TargetMachine.
llvm-svn: 26973
2006-03-23 05:41:41 +00:00
Chris Lattner
3d5ca510c9 remove always-null IntrinsicLowering argument.
llvm-svn: 26971
2006-03-23 05:28:02 +00:00
Evan Cheng
54215cd1ea Added a ValueType operand to isShuffleMaskLegal(). For now, x86 will not do
64-bit vector shuffle.

llvm-svn: 26964
2006-03-22 22:07:06 +00:00
Chris Lattner
a3663c3dbb Add some helper methods
llvm-svn: 26882
2006-03-20 00:55:52 +00:00
Evan Cheng
cad75d9f0c Added a way for TargetLowering to specify what values can be used as the
scale component of the target addressing mode.

llvm-svn: 26802
2006-03-16 21:47:42 +00:00
Evan Cheng
ed013bd937 Add LSR hooks.
llvm-svn: 26740
2006-03-13 23:18:16 +00:00
Evan Cheng
72d4882732 Added getTargetLowering() - returns DAG lowering info.
llvm-svn: 26739
2006-03-13 23:17:42 +00:00
Chris Lattner
c656f75535 custom lowered nodes are legal too
llvm-svn: 26561
2006-03-05 23:49:19 +00:00
Chris Lattner
5fd145d9c4 add a hook to insert a noop
llvm-svn: 26560
2006-03-05 23:48:51 +00:00
Evan Cheng
0c445855f2 Number of NodeTypes now exceeds 128.
llvm-svn: 26503
2006-03-03 06:58:59 +00:00
Chris Lattner
40501a50fe Add interfaces for targets to provide target-specific dag combiner optimizations.
llvm-svn: 26442
2006-03-01 04:52:55 +00:00
Evan Cheng
b8a44ab1dd Missing a cast previously.
llvm-svn: 26434
2006-03-01 00:58:54 +00:00
Chris Lattner
0957a2e87c Add C_Memory operand type
llvm-svn: 26344
2006-02-24 01:10:14 +00:00
Evan Cheng
305141c1ba - Added option -relocation-model to set relocation model. Valid values include static, pic,
dynamic-no-pic, and default.
PPC and x86 default is dynamic-no-pic for Darwin, pic for others.
- Removed options -enable-pic and -ppc-static.

llvm-svn: 26315
2006-02-22 20:19:42 +00:00
Chris Lattner
ed45ad33b7 Make the LLVM headers "-ansi -pedantic -Wno-long-long" clean.
Patch by Martin Partel!

llvm-svn: 26313
2006-02-22 16:23:43 +00:00
Chris Lattner
6bb2c3e9cd split register class handling from explicit physreg handling.
llvm-svn: 26308
2006-02-22 00:56:39 +00:00
Chris Lattner
086fd0f862 expose the set of values types holdable in a regclass to clients
llvm-svn: 26307
2006-02-21 23:51:58 +00:00
Chris Lattner
ed3b59056a Pass in a value type to getRegForInlineAsmConstraint, allowing targets to
select different sets of registers depending on the type requested.

llvm-svn: 26304
2006-02-21 23:10:29 +00:00
Evan Cheng
bba9078fed Move PICEnabled declaration here.
llvm-svn: 26271
2006-02-18 00:06:03 +00:00
Nate Begeman
aef186befc Fix a nit sabre noticed
llvm-svn: 26262
2006-02-17 18:06:19 +00:00
Nate Begeman
0bc71999b9 Rework the SelectionDAG-based implementations of SimplifyDemandedBits
and ComputeMaskedBits to match the new improved versions in instcombine.
Tested against all of multisource/benchmarks on ppc.

llvm-svn: 26238
2006-02-16 21:11:51 +00:00
Evan Cheng
f6c74c0096 Rename maxStoresPerMemSet to maxStoresPerMemset, etc.
llvm-svn: 26174
2006-02-14 08:38:30 +00:00
Chris Lattner
478eb50b79 getConstraintType should be virtual.
llvm-svn: 26041
2006-02-07 20:13:44 +00:00
Chris Lattner
2395722dbd Add some methods for inline asm support.
llvm-svn: 25950
2006-02-04 02:12:09 +00:00
Nate Begeman
2d9838ec9b Add a framework for eliminating instructions that produces undemanded bits.
llvm-svn: 25945
2006-02-03 22:24:05 +00:00
Chris Lattner
6684ba101f Move isLoadFrom/StoreToStackSlot from MRegisterInfo to TargetInstrInfo,
a far more logical place.  Other methods should also be moved if anyone
is interested. :)

llvm-svn: 25912
2006-02-02 20:11:55 +00:00
Chris Lattner
3cbf670f57 add a new isStoreToStackSlot method
llvm-svn: 25909
2006-02-02 19:55:29 +00:00
Chris Lattner
5583b2e227 Clear the OpAction field before setting it. This allows a target to set
an instruction operation action to Expand, then set it to Legal later.

llvm-svn: 25812
2006-01-30 06:09:03 +00:00
Chris Lattner
a1cc69e24e Move MaskedValueIsZero from the DAGCombiner to the TargetLowering interface,
making isMaskedValueZeroForTargetNode simpler, and useable from other parts
of the compiler.

llvm-svn: 25802
2006-01-30 04:08:18 +00:00
Chris Lattner
7f64ff5ce0 Pass the address of the main MaskedValueIsZero function to allow recursion.
llvm-svn: 25797
2006-01-30 03:48:36 +00:00
Chris Lattner
a8ca8f5eb9 Clean up the interface to ValueTypeActions, allowing Legalize to use a copy
of it more cleanly.  Double the size of OpActions, allowing it to hold actions
for any VT.

llvm-svn: 25782
2006-01-29 08:40:37 +00:00
Chris Lattner
2240c0df71 remove this method I just added, now is not the time.
llvm-svn: 25729
2006-01-28 03:43:33 +00:00
Chris Lattner
063c13029b add a new callback
llvm-svn: 25727
2006-01-28 03:37:03 +00:00
Nate Begeman
87c2c0e66b Implement Promote for VAARG, and allow it to be custom promoted for people
who don't want the default behavior (Alpha).

llvm-svn: 25726
2006-01-28 03:14:31 +00:00
Nate Begeman
d2c6fbef4a Remove TLI.LowerReturnTo, and just let targets custom lower ISD::RET for
the same functionality.  This addresses another piece of bug 680.  Next,
on to fixing Alpha VAARG, which I broke last time.

llvm-svn: 25696
2006-01-27 21:09:22 +00:00
Chris Lattner
b234392bc5 Add a common INLINEASM opcode
llvm-svn: 25667
2006-01-26 23:27:02 +00:00
Jeff Cohen
f329a41a66 Improve compatibility with VC2005, patch by Morten Ofstad!
llvm-svn: 25661
2006-01-26 20:41:32 +00:00
Chris Lattner
ab8e0e40f9 Add a method for inline asm support.
llvm-svn: 25656
2006-01-26 20:27:33 +00:00
Nate Begeman
c29fac7fce First part of bug 680:
Remove TLI.LowerVA* and replace it with SDNodes that are lowered the same
way as everything else.

llvm-svn: 25606
2006-01-25 18:21:52 +00:00
Evan Cheng
f4b53efbb2 Add a enum to specify target scheduling preference: SchedulingForLatency or
SchedulingForRegPressure. Added corresponding methods to set / get the value.

llvm-svn: 25598
2006-01-25 09:09:02 +00:00
Chris Lattner
b64d2919c7 Add a new InvalidateStructLayoutInfo method and some comments.
llvm-svn: 25303
2006-01-14 00:06:42 +00:00
Chris Lattner
8fe9dd16fb Provide an interface for Targets to specify their stack pointer register
for llvm.stacksave/restore.

llvm-svn: 25275
2006-01-13 17:47:52 +00:00
Jeff Cohen
8727139340 Oh oh... Unix is case sensitive.
llvm-svn: 24928
2005-12-22 01:46:59 +00:00
Jeff Cohen
8afabfd8f1 Make it compile with VC++.
llvm-svn: 24927
2005-12-22 01:44:51 +00:00
Evan Cheng
822f360f84 Added TargetLowering::isMaskedValueZeroForTargetNode() declaration.
llvm-svn: 24923
2005-12-21 23:15:41 +00:00
Evan Cheng
44e4e6a57f Added a hook to print out names of target specific DAG nodes.
llvm-svn: 24877
2005-12-20 06:22:03 +00:00
Nate Begeman
811a41a87c Support multiple ValueTypes per RegisterClass, needed for upcoming vector
work.  This change has no effect on generated code.

llvm-svn: 24563
2005-12-01 04:51:06 +00:00
Nate Begeman
a1c2df2471 Add the majority of the vector machien value types we expect to support,
and make a few changes to the legalization machinery to support more than
16 types.

llvm-svn: 24511
2005-11-29 05:45:29 +00:00
Nate Begeman
5784fb4adf Teach the type lowering code about turning packed types into vector types.
Next step: generating vector dag nodes, and legalizing them into scalar
code.

llvm-svn: 24404
2005-11-17 21:44:42 +00:00
Chris Lattner
bb448515ae Add a new option to indicate we want the code generator to emit code quickly,
not spending tons of time microoptimizing it.  This is useful for an -O0
style of build.

llvm-svn: 24235
2005-11-08 02:12:47 +00:00
Jeff Cohen
16669485c1 <cassert> no longer required to make VC++ happy.
llvm-svn: 24177
2005-11-04 02:59:16 +00:00
Duraid Madina
feeaabd6f1 change NULL to 0, unbreaks the ppc target when building on ia64
llvm-svn: 24176
2005-11-04 01:45:04 +00:00
Jim Laskey
42681c1d58 1. Remove ranges from itinerary data.
2. Tidy up the subtarget emittined code.

llvm-svn: 24172
2005-11-03 22:47:41 +00:00
Jeff Cohen
ae39880d3a Keep VC++ happy.
llvm-svn: 24148
2005-11-02 04:03:16 +00:00
Jim Laskey
4cb1e29b27 Allow itineraries to be passed through the Target Machine.
llvm-svn: 24139
2005-11-01 20:06:59 +00:00
Jim Laskey
03f8b2a366 Structures used to hold scheduling information.
llvm-svn: 24049
2005-10-27 18:18:05 +00:00
Jim Laskey
b377b32a58 Preparation of supporting scheduling info. Need to find info based on selected
CPU.

llvm-svn: 23974
2005-10-25 15:15:28 +00:00
Chris Lattner
79ea8acebc Move static functions to .cpp file, reduce #includes, pass strings by
const&.

llvm-svn: 23890
2005-10-23 05:25:19 +00:00
Nate Begeman
6c42f509bc Invert the TargetLowering flag that controls divide by consant expansion.
Add a new flag to TargetLowering indicating if the target has really cheap
  signed division by powers of two, make ppc use it.  This will probably go
  away in the future.
Implement some more ISD::SDIV folds in the dag combiner
Remove now dead code in the x86 backend.

llvm-svn: 23853
2005-10-21 00:02:42 +00:00
Nate Begeman
2b0b27775d Enable targets to say that integer divide is expensive, which will trigger
an upcoming optimization in the DAG Combiner.

llvm-svn: 23834
2005-10-20 02:14:14 +00:00
Nate Begeman
ee581735d9 Add the ability to lower return instructions to TargetLowering. This
allows us to lower legal return types to something else, to meet ABI
requirements (such as that i64 be returned in two i32 regs on Darwin/ppc).

llvm-svn: 23802
2005-10-18 23:23:37 +00:00
Chris Lattner
4bb574585f Fix case of path
llvm-svn: 23605
2005-10-03 03:32:39 +00:00
Chris Lattner
3a47224042 This member can be const too
llvm-svn: 23600
2005-10-03 00:21:25 +00:00
Chris Lattner
b19d4e5584 Expose the actual valuetype of each register class
llvm-svn: 23583
2005-10-02 06:23:19 +00:00
Chris Lattner
c744d9398f Rename MRegisterDesc -> TargetRegisterDesc for consistency
llvm-svn: 23564
2005-09-30 17:49:27 +00:00
Chris Lattner
6124aae803 trim down the target info structs now that we have a preferred spill register class for each callee save register
llvm-svn: 23560
2005-09-30 17:35:22 +00:00
Chris Lattner
18454e037b expose a new virtual method
llvm-svn: 23555
2005-09-30 07:06:37 +00:00
Chris Lattner
ec85d13393 Change these methods to take RC's
llvm-svn: 23535
2005-09-30 01:28:14 +00:00
Chris Lattner
62922d5727 Add a new flag for targets where setjmp/longjmp saves/restores the signal mask,
and _setjmp/_longjmp should be used instead (for llvm.setjmp/llvm.longjmp).

llvm-svn: 23479
2005-09-27 22:13:36 +00:00
Chris Lattner
e8cb4e7356 add a new callback
llvm-svn: 23373
2005-09-17 01:02:45 +00:00
Jim Laskey
1f9c40400c Add help support for -mcpu and -mattr.
llvm-svn: 23222
2005-09-02 19:27:43 +00:00
Chris Lattner
49eef12127 Move a bunch of non-deprecated methods above the "deprecated line"
llvm-svn: 23216
2005-09-02 18:16:20 +00:00
Jeff Cohen
930e81f03b Fix VC++ build errors
llvm-svn: 23210
2005-09-02 02:51:42 +00:00
Jim Laskey
f32ef9a37f 1. Use SubtargetFeatures in llc/lli.
2. Propagate feature "string" to all targets.

3. Implement use of SubtargetFeatures in PowerPCTargetSubtarget.

llvm-svn: 23192
2005-09-01 21:38:21 +00:00