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6ca8dc935c
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232 Commits

Author SHA1 Message Date
Bruno Cardoso Lopes
6ca8dc935c Add AVX 256-bit unpack and interleave 
llvm-svn: 108017
 2010-07-09 21:20:35 +00:00
Bruno Cardoso Lopes
3676e24b67 Start the support for AVX instructions with 256-bit %ymm registers. A couple of 
notes:
- The instructions are being added with dummy placeholder patterns using some 256
  specifiers, this is not meant to work now, but since there are some multiclasses
  generic enough to accept them,  when we go for codegen, the stuff will be already
  there.
- Add VEX encoding bits to support YMM
- Add MOVUPS and MOVAPS in the first round
- Use "Y" as suffix for those Instructions: MOVUPSYrr, ...
- All AVX instructions in X86InstrSSE.td will move soon to a new X86InstrAVX
  file.

llvm-svn: 107996
 2010-07-09 18:27:43 +00:00
Chris Lattner
012d7537ee Rework segment prefix emission code to handle segments 
in memory operands at the same type as hard coded segments.
This fixes problems where we'd emit the segment override after
the REX prefix on instructions like:
mov %gs:(%rdi), %rax

This fixes rdar://8127102.  I have several cleanup patches coming
next.

llvm-svn: 107917
 2010-07-08 22:28:12 +00:00
Chris Lattner
6a5db9c9c9 Implement the major chunk of PR7195: support for 'callw' 
in the integrated assembler.  Still some discussion to be
done.

llvm-svn: 107825
 2010-07-07 22:27:31 +00:00
Bruno Cardoso Lopes
b92b51191e Add more assembly opcodes for SSE compare instructions 
llvm-svn: 107823
 2010-07-07 22:24:03 +00:00
Bruno Cardoso Lopes
8d350872d4 Add AVX AES instructions 
llvm-svn: 107798
 2010-07-07 18:24:20 +00:00
Bruno Cardoso Lopes
6222076cd1 Add AVX SSE4.2 instructions 
llvm-svn: 107752
 2010-07-07 03:39:29 +00:00
Bruno Cardoso Lopes
675ebe2dc0 Add AVX SSE4.1 insertps, ptest and movntdqa instructions 
llvm-svn: 107747
 2010-07-07 01:14:56 +00:00
Bruno Cardoso Lopes
fa10461265 Add AVX SSE4.1 extractps and pinsr instructions 
llvm-svn: 107746
 2010-07-07 01:01:13 +00:00
Bruno Cardoso Lopes
54c2f858b3 Add AVX SSE4.1 Extract Integer instructions 
llvm-svn: 107740
 2010-07-07 00:07:24 +00:00
Bruno Cardoso Lopes
b9e1c33054 Add the rest of AVX SSE4.1 packed move with sign/zero extend instructions 
llvm-svn: 107723
 2010-07-06 23:15:17 +00:00
Bruno Cardoso Lopes
0c6ec0b068 Add part of AVX SSE4.1 packed move with sign/zero extend instructions 
llvm-svn: 107720
 2010-07-06 23:01:41 +00:00
Bruno Cardoso Lopes
a0b37e839c Add AVX vblendvpd, vblendvps and vpblendvb instructions 
Update VEX encoding to support those new instructions

llvm-svn: 107715
 2010-07-06 22:36:24 +00:00
Bruno Cardoso Lopes
dc16024895 Add AVX SSE4.1 blend, mpsadbw and vdp 
llvm-svn: 107560
 2010-07-03 01:37:03 +00:00
Bruno Cardoso Lopes
9cbb625579 Add AVX SSE4.1 binop (some forms of packed max,min,mul,pack,cmp) instructions 
llvm-svn: 107558
 2010-07-03 01:15:47 +00:00
Bruno Cardoso Lopes
df02d037e4 Add AVX SSE4.1 Horizontal Minimum and Position instruction 
llvm-svn: 107552
 2010-07-03 00:49:21 +00:00
Bruno Cardoso Lopes
e6b70efcb0 Add AVX SSE4.1 round instructions 
llvm-svn: 107549
 2010-07-03 00:37:44 +00:00
Bruno Cardoso Lopes
4931e183b5 - Add support for the rest of AVX SSE3 instructions 
- Fix VEX prefix to be emitted with 3 bytes whenever VEX_5M
represents a REX equivalent two byte leading opcode

llvm-svn: 107523
 2010-07-02 22:06:54 +00:00
Bruno Cardoso Lopes
511e5f47de Move SSE3 Move patterns to a more appropriate section 
Add AVX SSE3 packed horizontal and & sub instructions

llvm-svn: 107405
 2010-07-01 17:35:02 +00:00
Bruno Cardoso Lopes
0a3048e8b9 Add AVX SSE3 packed addsub instructions 
llvm-svn: 107404
 2010-07-01 17:08:18 +00:00
Bruno Cardoso Lopes
c1abe91367 Add AVX SSE3 replicate and convert instructions 
llvm-svn: 107375
 2010-07-01 02:33:39 +00:00
Bruno Cardoso Lopes
956316a3d7 - Add AVX SSE2 Move doubleword and quadword instructions. 
- Add encode bits for VEX_W
- All 128-bit SSE 1 & SSE2 instructions that are described
  in the .td file now have a AVX encoded form already working.

llvm-svn: 107365
 2010-07-01 01:20:06 +00:00
Bruno Cardoso Lopes
f8855c22be Add AVX SSE2 mask creation and conditional store instructions 
llvm-svn: 107306
 2010-06-30 18:38:10 +00:00
Bruno Cardoso Lopes
3c02702830 Add AVX SSE2 packed integer extract/insert instructions 
llvm-svn: 107293
 2010-06-30 17:03:03 +00:00
Bruno Cardoso Lopes
39594cc5d0 Add AVX SSE2 integer unpack instructions 
llvm-svn: 107246
 2010-06-30 04:06:39 +00:00
Bruno Cardoso Lopes
419f8f29c3 Add AVX SSE2 packed integer shuffle instructions 
llvm-svn: 107245
 2010-06-30 03:47:56 +00:00
Bruno Cardoso Lopes
d9acb34aa2 Add AVX SSE2 pack with saturation integer instructions 
llvm-svn: 107241
 2010-06-30 02:30:25 +00:00
Bruno Cardoso Lopes
c470ba9937 Add AVX SSE2 integer packed compare instructions 
llvm-svn: 107240
 2010-06-30 02:21:09 +00:00
Bruno Cardoso Lopes
cfbebb3921 - Add AVX form of all SSE2 logical instructions 
- Add VEX encoding bits to x86 MRM0r-MRM7r

llvm-svn: 107238
 2010-06-30 01:58:37 +00:00
Bruno Cardoso Lopes
2439877e05 Add *several* AVX integer packed binop instructions 
llvm-svn: 107225
 2010-06-29 23:47:49 +00:00
Bruno Cardoso Lopes
e1b05180de Add AVX ld/st XCSR register. 
Add VEX encoding bits for MRMXm x86 form

llvm-svn: 107204
 2010-06-29 20:35:48 +00:00
Bruno Cardoso Lopes
e60533aa42 Add AVX non-temporal stores 
llvm-svn: 107178
 2010-06-29 18:22:01 +00:00
Bruno Cardoso Lopes
2dca1dd168 Add sqrt, rsqrt and rcp AVX instructions 
llvm-svn: 107166
 2010-06-29 17:26:30 +00:00
Bruno Cardoso Lopes
e4809f15bf Described the missing AVX forms of SSE2 convert instructions 
llvm-svn: 107108
 2010-06-29 00:36:02 +00:00
Bruno Cardoso Lopes
277fcdf1c1 Add AVX convert CVTSS2SI{rr,rm} and CVTDQ2PS{rr,rm} instructions 
llvm-svn: 106917
 2010-06-25 23:47:23 +00:00
Bruno Cardoso Lopes
45109dd6c1 Reapply r106896: 
Add several AVX MOV flavors
Support VEX encoding for MRMDestReg

llvm-svn: 106912
 2010-06-25 23:33:42 +00:00
Bruno Cardoso Lopes
cc4c01f859 revert this now, it's using avx instead of sse :) 
llvm-svn: 106906
 2010-06-25 23:04:29 +00:00
Bruno Cardoso Lopes
04ac570a8d Add several AVX MOV flavors 
Support VEX encoding for MRMDestReg

llvm-svn: 106896
 2010-06-25 22:27:51 +00:00
Bruno Cardoso Lopes
bde2881855 Add some AVX convert instructions 
llvm-svn: 106815
 2010-06-25 00:39:30 +00:00
Bruno Cardoso Lopes
11a236d970 - Add AVX COMI{SS,SD}{rr,rm} and UCOMI{SS,SD}{rr,rm}. 
- Fix a small VEX encoding issue.
- Move compare instructions to their appropriate place.

llvm-svn: 106787
 2010-06-24 20:48:23 +00:00
Chris Lattner
606dc0529b Teach the x86 mc assembler that %dr6 = %db6, this implements 
rdar://8013734

llvm-svn: 106725
 2010-06-24 07:29:18 +00:00
Bruno Cardoso Lopes
633f345ba9 Add AVX CMP{SS,SD}{rr,rm} instructions and encoding testcases 
llvm-svn: 106705
 2010-06-24 00:32:06 +00:00
Bruno Cardoso Lopes
b1bfbacead Add AVX MOVMSK{PS,PD}rr instructions 
llvm-svn: 106683
 2010-06-23 21:30:27 +00:00
Bruno Cardoso Lopes
c6ac26123d Add tests for different AVX cmp opcodes, also teach the x86 asm parser to understand the vcmp instruction 
llvm-svn: 106678
 2010-06-23 21:10:57 +00:00
Bruno Cardoso Lopes
8cfdcf7691 Add AVX SHUF{PS,PD}{rr,rm} instructions 
llvm-svn: 106672
 2010-06-23 20:07:15 +00:00
Nico Weber
04606293a5 Add support for the x86 instructions "pusha" and "popa". 
llvm-svn: 106671
 2010-06-23 20:00:58 +00:00
Bruno Cardoso Lopes
db9027d95d Add AVX compare packed instructions 
llvm-svn: 106600
 2010-06-22 23:37:59 +00:00
Bruno Cardoso Lopes
424b206ad4 Reapply support for AVX unpack and interleave instructions, with 
testcases this time.

llvm-svn: 106593
 2010-06-22 23:02:38 +00:00
Bruno Cardoso Lopes
93ec8dcd01 Add AVX MOV{SS,SD}{rr,rm} instructions 
llvm-svn: 106588
 2010-06-22 22:38:56 +00:00
Eric Christopher
48c062d65b Move a 64-bit test to the 64-bit file. Fixes an llvm-mc assertion 
during test runs.

llvm-svn: 106577
 2010-06-22 21:11:51 +00:00