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Commit Graph

203075 Commits

Author SHA1 Message Date
Eric Astor
7ae8eb3e82 [ms] [llvm-ml] Fix STRUCT field alignment
MASM aligns fields to the _minimum_ of the STRUCT alignment value and the size of the next field.

Reviewed By: thakis

Differential Revision: https://reviews.llvm.org/D86945
2020-09-07 13:58:59 -04:00
Eric Astor
93e5d34daa [ms] [llvm-ml] Add support for bitwise named operators (AND, NOT, OR) in MASM
Add support for expressions of the form '1 or 2', etc.

Reviewed By: thakis

Differential Revision: https://reviews.llvm.org/D86944
2020-09-07 13:57:54 -04:00
Simon Pilgrim
b19ede2649 VPlan.h - remove unnecessary forward declarations. NFCI.
Already defined in includes.
2020-09-07 18:35:06 +01:00
Simon Pilgrim
2a0e71d0ce MipsISelLowering.h - remove CCState/CCValAssign forward declarations. NFCI.
These are already defined in the CallingConvLower.h include.
2020-09-07 18:15:26 +01:00
Simon Pilgrim
54e2cf9073 BTFDebug.h - reduce MachineInstr.h include to forward declaration. NFCI. 2020-09-07 17:51:13 +01:00
Simon Pilgrim
38c8707d93 LeonPasses.h - remove unnecessary includes. NFCI.
Reduce to forward declarations and move includes to LeonPasses.cpp where necessary.
2020-09-07 17:51:12 +01:00
Simon Pilgrim
6c92862767 LeonPasses.h - remove orphan function declarations. NFCI.
The implementations no longer exist.
2020-09-07 17:51:12 +01:00
Sanjay Patel
c688e87b99 [InstCombine] improve folds for icmp with multiply operands (PR47432)
Check for no overflow along with an odd constant before
we lose information by converting to bitwise logic.

https://rise4fun.com/Alive/2Xl

  Pre: C1 != 0
  %mx = mul nsw i8 %x, C1
  %my = mul nsw i8 %y, C1
  %r = icmp eq i8 %mx, %my
  =>
  %r = icmp eq i8 %x, %y

  Name: nuw ne
  Pre: C1 != 0
  %mx = mul nuw i8 %x, C1
  %my = mul nuw i8 %y, C1
  %r = icmp ne i8 %mx, %my
  =>
  %r = icmp ne i8 %x, %y

  Name: odd ne
  Pre: C1 % 2 != 0
  %mx = mul i8 %x, C1
  %my = mul i8 %y, C1
  %r = icmp ne i8 %mx, %my
  =>
  %r = icmp ne i8 %x, %y
2020-09-07 12:40:37 -04:00
Sanjay Patel
1fd12b30bd [InstCombine] move/add tests for icmp with mul operands; NFC 2020-09-07 12:40:37 -04:00
alex-t
c025a25bff [AMDGPU] SILowerControlFlow::optimizeEndCF should remove empty basic block
optimizeEndCF removes EXEC restoring instruction case this instruction is the only one except the branch to the single successor and that successor contains EXEC mask restoring instruction that was lowered from END_CF belonging to IF_ELSE.
As a result of such optimization we get the basic block with the only one instruction that is a branch to the single successor.
In case the control flow can reach such an empty block from S_CBRANCH_EXEZ/EXECNZ it might happen that spill/reload instructions that were inserted later by register allocator are placed under exec == 0 condition and never execute.
Removing empty block solves the problem.

This change require further work to re-implement LIS updates. Recently, LIS is always nullptr in this pass. To enable it we need another patch to fix many places across the codegen.

Reviewed By: rampitec

Differential Revision: https://reviews.llvm.org/D86634
2020-09-07 19:37:27 +03:00
Momchil Velikov
8e2bba4fdc Reduce the number of memory allocations when displaying
a warning about clobbering reserved registers (NFC).

Also address some minor inefficiencies and style issues.

Differential Revision: https://reviews.llvm.org/D86088
2020-09-07 17:04:00 +01:00
Simon Pilgrim
8ac9bb3910 AntiDepBreaker.h - remove unnecessary ScheduleDAG.h include. NFCI. 2020-09-07 16:39:42 +01:00
Simon Pilgrim
358c267440 [Sparc] Add reduced funnel shift test case for PR47303 2020-09-07 16:17:31 +01:00
Simon Pilgrim
9b5af79762 [X86][SSE] Don't use LowerVSETCCWithSUBUS for unsigned compare with +ve operands (PR47448)
We already simplify the unsigned comparisons if we've found the operands are non-negative, but we were still calling LowerVSETCCWithSUBUS which resulted in the PR47448 regressions.
2020-09-07 16:11:40 +01:00
Simon Pilgrim
20ff688262 [X86][SSE] Add test cases for PR47448 2020-09-07 15:57:18 +01:00
Simon Pilgrim
8f66f4b7f0 [X86] Replace UpgradeX86AddSubSatIntrinsics with UpgradeX86BinaryIntrinsics generic helper. NFCI.
Feed the Intrinsic::ID value directly instead of via the IsSigned/IsAddition bool flags.
2020-09-07 15:57:18 +01:00
Sanjay Patel
7f2a42d49c [InstCombine] erase instructions leading up to unreachable
Normal dead code elimination ignores assume intrinsics, so we fail to
delete assumes that are not meaningful (and potentially worse if they
cause conflicts with other assumptions).

The motivating example in https://llvm.org/PR47416 suggests that we
might have problems upstream from here (difference between C and C++),
but this should be a cheap way to make sure we remove more dead code.

Differential Revision: https://reviews.llvm.org/D87149
2020-09-07 10:44:08 -04:00
Sjoerd Meijer
faf7b77d8e Follow up of rG5f1cad4d296a, slightly reduced test case. NFC. 2020-09-07 15:11:10 +01:00
Simon Pilgrim
e1f9ca6993 [X86] Auto upgrade SSE/AVX PABS intrinsics to generic Intrinsic::abs
Minor followup to D87101, we were expanding this to a neg+icmp+select pattern like we were in CGBuiltin
2020-09-07 15:07:26 +01:00
Simon Pilgrim
36ca61598a [X86][SSE] Use llvm.abs.* vector intrinsics instead of old (deprecated) SSE/AVX intrinsics for combine tests
This also allows us to extend testing to SSE2+ targets
2020-09-07 14:27:37 +01:00
Esme-Yi
7e62223ec7 [NFC][PowerPC] Add tests in constants-i64.ll. 2020-09-07 13:14:00 +00:00
Georgii Rymar
cebe3f34e6 [llvm-readobj] - Remove code duplication when printing dynamic relocations. NFCI.
LLVM style code can be simplified to avoid the duplication of logic
related to printing dynamic relocations.

Differential revision: https://reviews.llvm.org/D87089
2020-09-07 16:11:12 +03:00
Daniel Muñoz
cc18f8d9f8 [KillTheDoctor/CMake] Add missing keyword PRIVATE in target_link_libraries
Add PRIVATE keyword in target_link_libraries to prevent CMake Error on Windows.

While trying to compile llvm/clang on Windows, the following CMake error occurred. The reason is a missing PUBLIC/PRIVATE/INTERFACE keyword in target_link_libraries.

`
CMake Error at utils/KillTheDoctor/CMakeLists.txt:5 (target_link_libraries):
  The keyword signature for target_link_libraries has already been used with
  the target "KillTheDoctor".  All uses of target_link_libraries with a
  target must be either all-keyword or all-plain.

  The uses of the keyword signature are here:

   * cmake/modules/AddLLVM.cmake:771 (target_link_libraries)
`

Reviewed By: tambre

Differential Revision: https://reviews.llvm.org/D87203
2020-09-07 16:08:55 +03:00
Simon Pilgrim
2611027a65 [X86][SSE] Move llvm.x86.ssse3.pabs.*.128 intrinsics to ssse3-intrinsics-x86-upgrade.ll
These have been auto upgraded for some time so this is just a tidyup.
2020-09-07 13:54:12 +01:00
Simon Pilgrim
2a377c9521 [X86] Update SSE/AVX ABS intrinsics to emit llvm.abs.* (PR46851)
We're now getting close to having the necessary analysis/combines etc. for the new generic llvm.abs.* intrinsics.

This patch updates the SSE/AVX ABS vector intrinsics to emit the generic equivalents instead of the icmp+sub+select code pattern.

Differential Revision: https://reviews.llvm.org/D87101
2020-09-07 13:54:12 +01:00
LLVM GN Syncbot
beb0cd66c2 [gn build] Port 23f700c785a 2020-09-07 12:51:23 +00:00
Georgii Rymar
9a2f89a341 [llvm-readobj/elf] - Generalize the code for printing dynamic relocations. NFCI.
Currently we have 2 large `printDynamicRelocations` methods that
have a very similar code for GNU/LLVM styles.

This patch removes the duplication and renames them to `printDynamicReloc`
for consistency.

Differential revision: https://reviews.llvm.org/D87087
2020-09-07 15:36:51 +03:00
Simon Pilgrim
9a57b8dde1 MachineStableHash.h - remove MachineInstr.h include. NFC.
Use forward declarations and move the include to MachineStableHash.cpp
2020-09-07 13:33:48 +01:00
Simon Wallis
63f9b9c858 [SelectionDAG] memcpy expansion of const volatile struct ignores const zero
In getMemcpyLoadsAndStores(), a memcpy where the source is a zero constant is expanded to a MemOp::Set instead of a MemOp::Copy, even when the memcpy is volatile.
This is incorrect.

The fix is to add a check for volatile, and expand to MemOp::Copy in the volatile case.

Reviewed By: chill

Differential Revision: https://reviews.llvm.org/D87134
2020-09-07 13:22:09 +01:00
Sanjay Patel
2beb2ca87b [InstCombine] add test with more unreachable insts; NFC
Goes with D87149
2020-09-07 08:19:43 -04:00
Sanjay Patel
9e71816984 [InstCombine] give a name to an intermediate value for easier tracking; NFC
As noted in PR47430, we probably want to conditionally include 'nsw'
here anyway, so we are going to need to fill out the optional args.
2020-09-07 08:19:42 -04:00
Simon Pilgrim
60f05bdb77 LegalizeTypes.h - remove orphan SplitVSETCC declaration. NFCI.
The implementation no longer exists
2020-09-07 13:11:49 +01:00
Georgii Rymar
3bb0607fee [llvm-readobj/elf] - Introduce Relocation<ELFT> helper.
It removes templating for Elf_Rel[a] handling that we
introduced earlier and introduces a helper class instead.

It was briefly discussed in D87087, which showed,
why having templates is probably not ideal for the generalization
of dumpers code.

Differential revision: https://reviews.llvm.org/D87141
2020-09-07 15:08:05 +03:00
Simon Pilgrim
c25887b4c4 X86AvoidStoreForwardingBlocks.cpp - use unsigned for Opcode values. NFCI.
Fixes clang-tidy cppcoreguidelines-narrowing-conversions warnings.
2020-09-07 12:56:27 +01:00
Simon Pilgrim
950a62206e [X86][AVX] Use lowerShuffleWithPERMV in shuffle combining to support non-VLX targets
lowerShuffleWithPERMV allows us to use the ZMM variants for 128/256-bit variable shuffles on non-VLX AVX512 targets.

This is another step towards shuffle combining through between vector widths - we still end up with an annoying regression (combine_vpermilvar_vperm2f128_zero_8f32) but we're going in the right direction....
2020-09-07 12:50:50 +01:00
Xing GUO
8a5f7ba413 [obj2yaml] Add support for dumping the .debug_str section.
This patch adds support for dumping the .debug_str section to obj2yaml.

Reviewed By: jhenderson

Differential Revision: https://reviews.llvm.org/D86867
2020-09-07 19:46:56 +08:00
Sam Parker
70e9782c55 [SCEV] Refactor isHighCostExpansionHelper
To enable the cost of constants, the helper function has been
reorganised:
- A struct has been introduced to hold SCEV operand information so
  that we know the user of the operand, as well as the operand index.
  The Worklist now uses instead instead of a bare SCEV.
- The costing of each SCEV, and collection of its operands, is now
  performed in a helper function.

Differential Revision: https://reviews.llvm.org/D86050
2020-09-07 11:57:46 +01:00
LLVM GN Syncbot
5630b34856 [gn build] Port 0478720157f 2020-09-07 10:32:22 +00:00
LLVM GN Syncbot
a671af10f0 [gn build] Port 81aa66f65f5 2020-09-07 10:25:26 +00:00
Benjamin Kramer
f3d58580a1 [X86] Unbreak the build after 22fa6b20d92e 2020-09-07 12:24:30 +02:00
Simon Pilgrim
1db7a4fa9e [X86] getFauxShuffleMask - handle insert_subvector(zero, sub, C)
Directly use SM_SentinelZero elements if we're (widening)inserting into a zero vector.
2020-09-07 11:10:40 +01:00
Simon Pilgrim
437ebe246f [X86][AVX] Add extra vperm2f128+vpermilvar combine coverage
The existing test /should/ reduce to a vmovaps (concat xmm with zero upper).
2020-09-07 10:58:53 +01:00
Simon Pilgrim
4fee922db4 [X86] Use Register instead of unsigned. NFCI.
Fixes llvm-prefer-register-over-unsigned clang-tidy warnings.
2020-09-07 10:49:29 +01:00
Esme-Yi
67a9609ddc [NFC][PowerPC] Add tests for mul with big constants. 2020-09-07 09:45:47 +00:00
Simon Pilgrim
bd029710f2 [X86] Use Register instead of unsigned. NFCI.
Fixes llvm-prefer-register-over-unsigned clang-tidy warnings.
2020-09-07 10:38:09 +01:00
Simon Pilgrim
c1e4cc6249 [X86] Use Register instead of unsigned. NFCI.
Fixes llvm-prefer-register-over-unsigned clang-tidy warning.
2020-09-07 10:38:08 +01:00
Sam Parker
7c4a7cb063 [SimplifyCFG] Consider cost of combining predicates.
Modify FoldBranchToCommonDest to consider the cost of inserting
instructions when attempting to combine predicates to fold blocks.
The threshold can be controlled via a new option:
-simplifycfg-branch-fold-threshold which defaults to '2' to allow
the insertion of a not and another logical operator.

Differential Revision: https://reviews.llvm.org/D86526
2020-09-07 10:04:50 +01:00
Jay Foad
a04922a28f [GlobalISel] Extend not_cmp_fold to work on conditional expressions
Differential Revision: https://reviews.llvm.org/D86709
2020-09-07 09:31:08 +01:00
Sam Parker
c37b434c46 [ARM][CostModel] CodeSize costs for i1 arith ops
When optimising for size, make the cost of i1 logical operations
relatively expensive so that optimisations don't try to combine
predicates.

Differential Revision: https://reviews.llvm.org/D86525
2020-09-07 09:27:18 +01:00
Xing GUO
5f500e98a4 [DWARFYAML] Make the debug_addr section optional.
This patch makes the debug_addr section optional. When an empty
debug_addr section is specified, yaml2obj only emits a section header
for it.

Reviewed By: jhenderson

Differential Revision: https://reviews.llvm.org/D87205
2020-09-07 16:17:18 +08:00