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70 Commits

Author SHA1 Message Date
Chris Lattner
155420f59f finish up support for callw: PR7195 
llvm-svn: 107826
 2010-07-07 22:35:13 +00:00
Chris Lattner
6a5db9c9c9 Implement the major chunk of PR7195: support for 'callw' 
in the integrated assembler.  Still some discussion to be
done.

llvm-svn: 107825
 2010-07-07 22:27:31 +00:00
Bruno Cardoso Lopes
af8968696a Fix comment from previous patch 
llvm-svn: 107717
 2010-07-06 22:38:32 +00:00
Bruno Cardoso Lopes
a0b37e839c Add AVX vblendvpd, vblendvps and vpblendvb instructions 
Update VEX encoding to support those new instructions

llvm-svn: 107715
 2010-07-06 22:36:24 +00:00
Chris Lattner
1e38d7d66d indentation 
llvm-svn: 107599
 2010-07-04 22:56:10 +00:00
Bruno Cardoso Lopes
4931e183b5 - Add support for the rest of AVX SSE3 instructions 
- Fix VEX prefix to be emitted with 3 bytes whenever VEX_5M
represents a REX equivalent two byte leading opcode

llvm-svn: 107523
 2010-07-02 22:06:54 +00:00
Bruno Cardoso Lopes
956316a3d7 - Add AVX SSE2 Move doubleword and quadword instructions. 
- Add encode bits for VEX_W
- All 128-bit SSE 1 & SSE2 instructions that are described
  in the .td file now have a AVX encoded form already working.

llvm-svn: 107365
 2010-07-01 01:20:06 +00:00
Bruno Cardoso Lopes
cfbebb3921 - Add AVX form of all SSE2 logical instructions 
- Add VEX encoding bits to x86 MRM0r-MRM7r

llvm-svn: 107238
 2010-06-30 01:58:37 +00:00
Bruno Cardoso Lopes
e1b05180de Add AVX ld/st XCSR register. 
Add VEX encoding bits for MRMXm x86 form

llvm-svn: 107204
 2010-06-29 20:35:48 +00:00
Bruno Cardoso Lopes
45109dd6c1 Reapply r106896: 
Add several AVX MOV flavors
Support VEX encoding for MRMDestReg

llvm-svn: 106912
 2010-06-25 23:33:42 +00:00
Bruno Cardoso Lopes
cc4c01f859 revert this now, it's using avx instead of sse :) 
llvm-svn: 106906
 2010-06-25 23:04:29 +00:00
Bruno Cardoso Lopes
04ac570a8d Add several AVX MOV flavors 
Support VEX encoding for MRMDestReg

llvm-svn: 106896
 2010-06-25 22:27:51 +00:00
Bruno Cardoso Lopes
11a236d970 - Add AVX COMI{SS,SD}{rr,rm} and UCOMI{SS,SD}{rr,rm}. 
- Fix a small VEX encoding issue.
- Move compare instructions to their appropriate place.

llvm-svn: 106787
 2010-06-24 20:48:23 +00:00
Bruno Cardoso Lopes
93ec8dcd01 Add AVX MOV{SS,SD}{rr,rm} instructions 
llvm-svn: 106588
 2010-06-22 22:38:56 +00:00
Chris Lattner
def4def8f9 rip out dead code. 
llvm-svn: 106365
 2010-06-19 00:34:14 +00:00
Chris Lattner
ed5a217085 fix rdar://7873482 by teaching the instruction encoder to emit 
segment prefixes.  Daniel wrote most of this patch.

llvm-svn: 106364
 2010-06-19 00:34:00 +00:00
Bruno Cardoso Lopes
df3435eb33 More AVX: {ADD,SUB,MUL,DIV}{PD,PS}rr 
Handle OpSize TSFlag for AVX

llvm-svn: 105869
 2010-06-12 01:23:26 +00:00
Bruno Cardoso Lopes
df2629b4db Add some comments about REX fields 
llvm-svn: 105860
 2010-06-12 00:03:52 +00:00
Bruno Cardoso Lopes
69141fd639 More AVX instructions ({ADD,SUB,MUL,DIV}{SS,SD}rm) 
Introduce the VEX_X field

llvm-svn: 105859
 2010-06-11 23:50:47 +00:00
Eric Christopher
3cb51e059d Split out these asserts so it's more apparent why we're not assembling 
that rip-relative address when executing in 32-bit mode.

llvm-svn: 105656
 2010-06-08 22:57:33 +00:00
Bruno Cardoso Lopes
255fda615d Reapply r105521, this time appending "LLU" to 64 bit 
immediates to avoid breaking the build.

llvm-svn: 105652
 2010-06-08 22:51:23 +00:00
Chris Lattner
33d0622cdc revert r105521, which is breaking the buildbots with stuff like this: 
In file included from X86InstrInfo.cpp:16:
X86GenInstrInfo.inc:2789: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2790: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2792: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2793: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2808: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2809: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2816: error: integer constant is too large for 'long' type
X86GenInstrInfo.inc:2817: error: integer constant is too large for 'long' type

llvm-svn: 105524
 2010-06-05 04:17:30 +00:00
Bruno Cardoso Lopes
b05131d907 Initial AVX support for some instructions. No patterns matched 
yet, only assembly encoding support.

llvm-svn: 105521
 2010-06-05 03:53:24 +00:00
Daniel Dunbar
7252b48af1 MCCodeEmitter: Add target independent fixup flag for is-pc-relative. 
llvm-svn: 98954
 2010-03-19 10:43:23 +00:00
Daniel Dunbar
1a50b05aff X86MCCodeEmitter: Fix two minor issues with reloc_riprel_4byte_movq_load, we 
were missing it on some movq instructions and were not including the appropriate
PCrel bias.

llvm-svn: 98880
 2010-03-18 21:53:54 +00:00
Chris Lattner
bf3e096258 fix an x86-64 encoding bug Daniel found. 
llvm-svn: 98855
 2010-03-18 20:04:36 +00:00
Chris Lattner
45ab55ccec add a special relocation type for movq loads for object 
files that produce special relocation types where the 
linker changes movq's into lea's.

llvm-svn: 98839
 2010-03-18 18:10:56 +00:00
Chris Lattner
b29b154904 make pcrel immediate values relative to the start of the field, 
not the end of the field, fixing rdar://7651978

llvm-svn: 96330
 2010-02-16 05:03:17 +00:00
Chris Lattner
b9c4a15ad5 teach the encoder to handle pseudo instructions like FP_REG_KILL, 
encoding them into nothing.

llvm-svn: 96110
 2010-02-13 19:16:53 +00:00
Daniel Dunbar
1581cae46f X86: Move extended MCFixupKinds into X86FixupKinds.h 
llvm-svn: 96088
 2010-02-13 09:27:52 +00:00
Chris Lattner
8530ba626c add encoder support and tests for rdtscp 
llvm-svn: 96076
 2010-02-13 03:42:24 +00:00
Chris Lattner
5b01ab848c remove special cases for vmlaunch, vmresume, vmxoff, and swapgs 
fix swapgs to be spelled right.

llvm-svn: 96058
 2010-02-13 00:41:14 +00:00
Chris Lattner
1d25e3978d Remove special cases for [LM]FENCE, MONITOR and MWAIT from 
encoder and decoder by using new MRM_ forms.

llvm-svn: 96048
 2010-02-12 23:54:57 +00:00
Chris Lattner
4170bb81da implement the rest of correct x86-64 encoder support for 
rip-relative addresses, and add a testcase.

llvm-svn: 96040
 2010-02-12 23:24:09 +00:00
Chris Lattner
946403d05f give MCCodeEmitters access to the current MCContext. 
llvm-svn: 96038
 2010-02-12 23:12:47 +00:00
Chris Lattner
e90d092fd7 implement infrastructure to support fixups for rip-rel 
addressing.  This isn't complete because I need an MCContext
to generate new MCExprs.

llvm-svn: 96036
 2010-02-12 23:00:36 +00:00
Chris Lattner
0a7654c7c9 pull the rip-relative addressing mode case up early. 
llvm-svn: 96031
 2010-02-12 22:47:55 +00:00
Chris Lattner
3df1321651 fixme resolved! 
llvm-svn: 96029
 2010-02-12 22:39:06 +00:00
Chris Lattner
1e01ac75bc start producing reloc_pcrel_4byte/reloc_pcrel_1byte for calls. 
llvm-svn: 96028
 2010-02-12 22:36:47 +00:00
Chris Lattner
c3dbd2e2fc add a bunch of mod/rm encoding types for fixed mod/rm bytes. 
This will work better for the disassembler for modeling things
like lfence/monitor/vmcall etc.

llvm-svn: 95960
 2010-02-12 02:06:33 +00:00
Chris Lattner
9307e00dc0 fix the encodings of monitor and mwait, which were completely 
busted in both encoders.  I'm not bothering to fix it in the
old one at this point.

llvm-svn: 95947
 2010-02-12 01:06:22 +00:00
Chris Lattner
144a1b7a24 add a new MCInstPrinter::getOpcodeName interface, when it is 
implemented, llvm-mc --show-inst now uses it to print the
instruction opcode as well as the number.

llvm-svn: 95929
 2010-02-11 22:39:10 +00:00
Chris Lattner
b82b965968 make getFixupKindInfo return a const reference, allowing 
the tables to be const.  Teach MCCodeEmitter to handle
the target-indep kinds so that we don't crash on them.

llvm-svn: 95924
 2010-02-11 21:27:18 +00:00
Chris Lattner
a0e0de6974 switch to target-indep fixups for 1/2/4/8 byte data. 
llvm-svn: 95920
 2010-02-11 21:17:54 +00:00
Chris Lattner
d69e1c1bb2 refactor the conditional jump instructions in the .td file to 
use a multipattern that generates both the 1-byte and 4-byte 
versions from the same defm

llvm-svn: 95901
 2010-02-11 19:25:55 +00:00
Chris Lattner
83ee8edc66 dont' call getX86RegNum on X86::RIP, it doesn't like that. This 
fixes the remaining x86-64 jit failures afaik.

llvm-svn: 95867
 2010-02-11 08:45:56 +00:00
Chris Lattner
c279bf31b7 fix a really nasty bug I introduced in r95693: r12 (and r12d, 
r12b, etc) also encodes to a R/M value of 4, which is just
as illegal as ESP/RSP for the non-sib version an address.

This fixes x86-64 jit miscompilations of a bunch of programs.

llvm-svn: 95866
 2010-02-11 08:41:21 +00:00
Chris Lattner
53d91ce3e1 Add and commonize encoder support for all immediates. 
Stub out some dummy fixups to make things work.

We can now emit fixups like this:
	subl	$20, %esp               ## encoding: [0x83,0xec,A]
                                        ##   fixup A - offset: 2, value: 20, kind: fixup_1byte_imm

Emitting $20 as a single-byte fixup to be later resolved
by the assembler is ridiculous of course (vs just emitting
the byte) but this is a failure of the matcher, which 
should be producing an imm of 20, not an MCExpr of 20.

llvm-svn: 95860
 2010-02-11 07:06:31 +00:00
Chris Lattner
2e2935e175 generalize EmitDisplacementField to work with any size 
and rename it to EmitImmediate.

llvm-svn: 95859
 2010-02-11 06:54:23 +00:00
Chris Lattner
1fe88248f8 eliminate the dead IsPCRel argument. 
llvm-svn: 95858
 2010-02-11 06:51:36 +00:00