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Commit Graph

161611 Commits

Author SHA1 Message Date
Vitaly Buka
8f9c81d411 Object: Fix handling of @@@ in .symver directive
Summary:
name@@@nodename is going to be replaced with name@@nodename if symbols is
defined in the assembled file, or name@nodename if undefined.
https://sourceware.org/binutils/docs/as/Symver.html

Fixes PR36623

Reviewers: pcc, espindola

Subscribers: mehdi_amini, hiraditya

Differential Revision: https://reviews.llvm.org/D44274

llvm-svn: 327930
2018-03-20 00:45:03 +00:00
Vitaly Buka
9b457ddc7a Object: Move attribute calculation into RecordStreamer. NFC
Summary: Preparation for D44274

Reviewers: pcc, espindola

Subscribers: hiraditya

Differential Revision: https://reviews.llvm.org/D44276

llvm-svn: 327928
2018-03-20 00:38:33 +00:00
Aaron Smith
5591305835 [SelectionDAG] Transfer DbgValues when integer operations are promoted
Summary:
DbgValue nodes were not transferred when integer DAG nodes were promoted. For example, if an i32 add node was promoted to an i64 add node by DAGTypeLegalizer::PromoteIntegerResult(), its DbgValue node was not transferred to the new node. The simple fix is to update SetPromotedInteger() to transfer DbgValues. 

Add AArch64/dbg-value-i8.ll to test this change and fix ARM/debug-info-d16-reg.ll which had the wrong DILocalVariable nodes with arg numbers even though they are not for function parameters.

Patch by Se Jong Oh!

Reviewers: vsk, JDevlieghere, aprantl

Reviewed By: JDevlieghere

Subscribers: javed.absar, kristof.beyls, llvm-commits

Tags: #debug-info

Differential Revision: https://reviews.llvm.org/D44546

llvm-svn: 327919
2018-03-19 22:58:50 +00:00
Jessica Paquette
9f81b4f011 [MachineOutliner] AArch64: Emit CFI instructions when outlining calls
When outlining calls, the outliner needs to update CFI to ensure that, say,
exception handling works. This commit adds that functionality and adds a test
just for call outlining.

Call outlining stuff in machine-outliner.mir should be moved into
machine-outliner-calls.mir in a later commit.

llvm-svn: 327917
2018-03-19 22:48:40 +00:00
Craig Topper
de357a78c0 [DAGCombiner] Fix type in comment. NFC
llvm-svn: 327916
2018-03-19 22:25:26 +00:00
Craig Topper
5998cbf859 [X86] Simplify the AVX512 code in LowerTruncate a little.
We don't need to create an ISD::TRUNCATE node to return, we started with one and can return it. Also remove the call to getExtendInVec, the result is just going to be a getNode of that value passed in.

llvm-svn: 327914
2018-03-19 21:58:02 +00:00
Serge Guelton
83a9aec0c9 Accept any filepath in llvm_check_source_file_list
Cmake function llvm_check_source_file_list currently only accepts paths
relative to current CMAKE_SOURCE_DIR or relative to argument SOURCE_DIR.

Extend it to accept any path, including absolute ones.

Differential revision: https://reviews.llvm.org/D44625

llvm-svn: 327912
2018-03-19 21:35:30 +00:00
Aaron Smith
5c0f9f19d0 [PDB] Add a method to get the full path of the source file for PDBSymbolCompiland
Summary:
Redefine PDBSymbolCompiland::getSourceFileName() to return the filename (w/o directory) of the source file that is used to compile the compiland. This is because the result returned previously is ambiguous. It could be the filename, relative path or full path of the source file. 

Move the implementation of SymbolFilePDB::GetSourceFileNameForPDBCompiland() into a new method PDBSymbolCompiland::getSourceFileFullPath(). 

Reviewers: zturner, rnk, llvm-commits

Reviewed By: zturner

Differential Revision: https://reviews.llvm.org/D44458

llvm-svn: 327910
2018-03-19 21:20:04 +00:00
Aaron Smith
0e87a89fed [PDB] Add exclusive methods to derived symbol class
Summary: This commit adds two methods to the PDBSymboFunc class used in parsing symbols. getLineNumbers() is used to determine a Function symbol's declaration and getCompilandId() is used to initialize the SymbolContext field sc.comp_unit.

Reviewers: zturner, rnk, llvm-commits

Reviewed By: zturner

Differential Revision: https://reviews.llvm.org/D44457

llvm-svn: 327909
2018-03-19 21:18:39 +00:00
Krzysztof Parzyszek
862ceda9fb [Hexagon] Add REQUIRES: asserts to test/CodeGen/Hexagon/v6vec_inc1.ll
llvm-svn: 327907
2018-03-19 21:05:21 +00:00
Zachary Turner
2cfd5cbb88 Revert "Support embedding natvis files in PDBs."
This is causing a test failure on a certain bot, so I'm removing
this temporarily until we can figure out the source of the error.

llvm-svn: 327903
2018-03-19 20:41:59 +00:00
Zachary Turner
f88ac21b92 Remove an unused private variable.
llvm-svn: 327900
2018-03-19 20:22:48 +00:00
Craig Topper
ce1651efff [X86] Replace a couple calls to getExtendInVec with getNode and the appropriate target independent EXTEND_VECTOR_INREG opcode.
llvm-svn: 327899
2018-03-19 20:20:22 +00:00
Nirav Dave
3fdc3ca230 [DAG, X86] Revert r327197 "Revert r327170, r327171, r327172"
Reland ISel cycle checking improvements after simplifying node id
invariant traversal and correcting typo.

llvm-svn: 327898
2018-03-19 20:19:46 +00:00
Martin Storsjo
1a347f2b7a [ARM, AArch64] Check the no-stack-arg-probe attribute for dynamic stack probes
This extends the use of this attribute on ARM and AArch64 from
SVN r325900 (where it was only checked for fixed stack
allocations on ARM/AArch64, but for all stack allocations on X86).

This also adds a testcase for the existing use of disabling the
fixed stack probe with the attribute on ARM and AArch64.

Differential Revision: https://reviews.llvm.org/D44291

llvm-svn: 327897
2018-03-19 20:06:50 +00:00
Alina Sbirlea
6ae9c3d0ac Add cast to Type*, fix failure from r327894.
llvm-svn: 327896
2018-03-19 20:05:01 +00:00
Zachary Turner
17645664c0 Support embedding natvis files in PDBs.
Natvis is a debug language supported by Visual Studio for
specifying custom visualizers.  The /NATVIS option is an
undocumented link.exe flag which will take a .natvis file
and "inject" it into the PDB.  This way, you can ship the
debug visualizers for a program along with the PDB, which
is very useful for postmortem debugging.

This is implemented by adding a new "named stream" to the
PDB with a special name of /src/files/<natvis file name>
and simply copying the contents of the xml into this file.

Additionally, we need to emit a single stream named
/src/headerblock which contains a hash table of embedded
files to records describing them.

This patch adds this functionality, including the /NATVIS
option to lld-link.

Differential Revision: https://reviews.llvm.org/D44328

llvm-svn: 327895
2018-03-19 19:53:51 +00:00
Alina Sbirlea
bc91970d07 Make ConstantDataArray::get constructor templated. Will support signed integers.
Summary: Make ConstantDataArray::get() constructors a single templated one.

Reviewers: timshen, rsmith

Subscribers: sanjoy, llvm-commits, jlebar

Differential Revision: https://reviews.llvm.org/D44337

llvm-svn: 327894
2018-03-19 19:49:28 +00:00
Sanjay Patel
9ca7fe46eb [AMDGPU] change test to avoid NaN math
llvm-svn: 327891
2018-03-19 19:26:22 +00:00
Sanjay Patel
b966d65c36 [AMDGPU] adjust tests to be nan-free
As suggested in D44521 - bitcast to integer for the math,
so we preserve the intent of these tests when NaN math
gets folded away.

llvm-svn: 327890
2018-03-19 19:23:53 +00:00
Lei Huang
956bafdb3a [Power9]Legalize and emit code for quad-precision copySign/abs/nabs/neg/sqrt
Legalize and emit code for quad-precision floating point operations:

  * xscpsgnqp
  * xsabsqp
  * xsnabsqp
  * xsnegqp
  * xssqrtqp

Differential Revision: https://reviews.llvm.org/D44530

llvm-svn: 327889
2018-03-19 19:22:52 +00:00
Andrea Di Biagio
66c09621c6 [llvm-mca] Remove unused method from ResourceManager. NFC
llvm-svn: 327888
2018-03-19 19:14:06 +00:00
Andrea Di Biagio
06ba64d31f [llvm-mca] Simplify code. NFC
llvm-svn: 327886
2018-03-19 19:09:38 +00:00
Krzysztof Parzyszek
4128f44745 [Hexagon] Add a few more lit tests
llvm-svn: 327884
2018-03-19 19:03:18 +00:00
Craig Topper
529d8fd672 [X86] Add JMP16r and JMP32r to Sandybridge scheduler model.
Fixes PR36010

llvm-svn: 327883
2018-03-19 19:00:37 +00:00
Craig Topper
8293fcc5fd [X86] Remove OUT32rr/OUT8rr/OUT32ri/OUT8ri from Sandybridge scheduler model.
PR35590 was already filed for this information being wrong. It's probably better to default to WriteSystem behavior instead of using something completely wrong.

llvm-svn: 327882
2018-03-19 19:00:35 +00:00
Craig Topper
dcdeb0cfef [X86] Add JCXZ/JECXZ to Sandybridge/Haswell/Broadwell/Skylake scheduler models.
JRCXZ was already present, but not the others.

We never codegen this instruction so this doesn't affect much just trying to get them all into a single generated scheduler class in the output.

llvm-svn: 327881
2018-03-19 19:00:32 +00:00
Craig Topper
69f36550a3 [X86] Correct regular expression in Zen scheduler model that was excluding JECXZ instruction.
The regex was looking for JECXZ_32 or JECXZ_64, but their is just one instruction called JECXZ. They used to exist as separate instructions, but were merged over 3 years ago.

llvm-svn: 327880
2018-03-19 19:00:29 +00:00
Craig Topper
87d6c90ec4 [X86] Correct the SchedRW on (V)MOVAPSrr_REV and similar to match their non _REV counterparts.
llvm-svn: 327879
2018-03-19 19:00:26 +00:00
Lei Huang
fd43dae530 [PowerPC][Power9]Legalize and emit code for quad-precision add/div/mul/sub
Legalize and emit code for quad-precision floating point operations:

  * xsaddqp
  * xssubqp
  * xsdivqp
  * xsmulqp

Differential Revision: https://reviews.llvm.org/D44506

llvm-svn: 327878
2018-03-19 18:52:20 +00:00
Nemanja Ivanovic
3ba3c2e680 [PowerPC] Make AddrSpaceCast noop
PowerPC targets do not use address spaces. As a result, we can get selection
failures with address space casts. This patch makes those casts noops.

Patch by Valentin Churavy.

Differential revision: https://reviews.llvm.org/D43781

llvm-svn: 327877
2018-03-19 18:50:02 +00:00
Craig Topper
58094170aa [X86] Add the rest of the TEST with immediate instructions to the scheduler models to match their 8-bit counterpart.
llvm-svn: 327874
2018-03-19 17:58:41 +00:00
Craig Topper
2523e00d42 [X86] Add MOV16ri*/MOV32ri*/MOV64ri* to scheduler models to match MOV8ri. Correct SchedRW and itinerary for MOV32ri64.
llvm-svn: 327872
2018-03-19 17:46:59 +00:00
Craig Topper
4d1399fbdd [X86] Remove sse41 specific code from lowering v16i8 multiply
With the SRAs removed from the SSE2 code in D44267, then there doesn't appear to be any advantage to the sse41 code. The punpcklbw instruction and pmovsx seem to have the same latency and throughput on most CPUs. And the SSE41 code requires moving the upper 64-bits into the lower 64-bit before the sign extend can be done. The unpckhbw in sse2 code can do better than that.

llvm-svn: 327869
2018-03-19 17:31:41 +00:00
Craig Topper
317ad91d5e [X86] Make the multiply and divide itineraries more consistent.
Sometimes we used the same itinerary for MEM and REG forms, but that seems inconsistent with our usual usage.

We also used the MUL8 itinerary for MULX32/64 which was also weird.

The test changes are because we were using IIC_IMUL32_RR and IIC_IMUL64_RR instead of IIC_IMUL32_REG/IIC_IMUL64_REG for the 32 and 64 bit multiplies that produce double width result.

llvm-svn: 327866
2018-03-19 16:38:33 +00:00
Zaara Syeda
bdc01ca7dc Revert [MachineLICM] This reverts commit rL327856
Failing build bots. Revert the commit now.

llvm-svn: 327864
2018-03-19 16:19:44 +00:00
Matt Davis
4c46b250c7 [CodeGen] Avoid handling DBG_VALUE in the LivePhysRegs (addUses,removeDefs,stepForward)
Summary:
This patch prevents DBG_VALUE instructions from influencing
LivePhysRegs::stepBackwards and stepForwards.  In at least one case,
specifically branch folding, the stepBackwards logic was having an
influence on code generation.  The result was that certain code
compiled with '-g -O2' would differ from that compiled with '-O2'
alone. It seems that the original logic, accounting for DBG_VALUE,
was influencing the placement of an IMPLICIT_DEF which had a later
impact on how blocks were processed in branch folding.

Reviewers: kparzysz, MatzeB

Reviewed By: kparzysz

Subscribers: bjope, llvm-commits

Tags: #debug-info

Differential Revision: https://reviews.llvm.org/D43850

llvm-svn: 327862
2018-03-19 16:06:40 +00:00
Erik Pilkington
9b1a3d5592 [demangler] Recopy the demangler from libcxxabi.
Some significant work has gone into libcxxabi's copy of this file:
  - Uses an AST to represent mangled names.
  - Support/bugfixes for many C++ features.
  - Uses LLVM coding style.

llvm-svn: 327859
2018-03-19 15:18:23 +00:00
Sanjay Patel
f963761d1b [InstCombine] canonicalize fcmp+select to fabs
This is complicated by -0.0 and nan. This is based on the DAG patterns 
as shown in D44091. I'm hoping that we can just remove those DAG folds 
and always rely on IR canonicalization to handle the matching to fabs.

We would still need to delete the broken code from DAGCombiner to fix 
PR36600:
https://bugs.llvm.org/show_bug.cgi?id=36600

Differential Revision: https://reviews.llvm.org/D44550

llvm-svn: 327858
2018-03-19 15:14:30 +00:00
Zaara Syeda
d43edba6bf [MachineLICM] Add functions to MachineLICM to hoist invariant stores
This patch adds functions to allow MachineLICM to hoist invariant stores.
Currently, MachineLICM does not hoist any store instructions, however
when storing the same value to a constant spot on the stack, the store
instruction should be considered invariant and be hoisted. The function
isInvariantStore iterates each operand of the store instruction and checks
that each register operand satisfies isCallerPreservedPhysReg. The store
may be fed by a copy, which is hoisted by isCopyFeedingInvariantStore.
This patch also adds the PowerPC changes needed to consider the stack
register as caller preserved.

Differential Revision: https://reviews.llvm.org/D40196

llvm-svn: 327856
2018-03-19 14:52:25 +00:00
Simon Pilgrim
907a58b45b [X86] Generalize schedule classes to support multiple stages
Currently the WriteResPair style multi-classes take a single pipeline stage and latency, this patch generalizes this to make it easier to create complex schedules with ResourceCycles and NumMicroOps be overriden from their defaults.

This has already been done for the Jaguar scheduler to remove a number of custom schedule classes and adding it to the other x86 targets will make it much tidier as we add additional classes in the future to try and replace so many custom cases.

I've converted some instructions but a lot of the models need a bit of cleanup after the patch has been committed - memory latencies not being consistent, the class not actually being used when we could remove some/all customs, etc. I'd prefer to keep this as NFC as possible so later patches can be smaller and target specific.

Differential Revision: https://reviews.llvm.org/D44612

llvm-svn: 327855
2018-03-19 14:46:07 +00:00
Sanjay Patel
a9dc47becd [x86] put nops into the WriteNop class and customize for Jaguar
1. Given that we already have a classification bucket with 'nop' in the name, 
   that's where 'nop' belongs. Right now, it's only used for prefix bytes and 'pause'.
2. Make the latency of this class '1' for Jaguar to tell the scheduler (and presumably 
   llvm-mca) how to model the resource requirements better even though a nop has no 
   dependencies.

Differential Revision: https://reviews.llvm.org/D44608

llvm-svn: 327853
2018-03-19 14:26:50 +00:00
Ilya Biryukov
213a1ffda4 Changed createTemporaryFile without FD to actually create a file.
Summary:
This commit changes semantics of createUniqueFile and
createTemporaryFile variants that do not return file descriptors.
Previously they only checked if files exist, therefore being subject
to race conditions. Now they will create an empty file to avoid them.

Functions that do not create a file are now called
getPotentiallyUniqueTempFileName and getPotentiallyUniqueFileName.

Reviewers: klimek, bkramer, krasimir, JDevlieghere, espindola

Reviewed By: klimek

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D36827

llvm-svn: 327851
2018-03-19 14:19:58 +00:00
Nicolai Haehnle
cd1f0648bf TableGen: Explicitly forbid self-references to field members
Summary:
Otherwise, patterns like in the test case produce cryptic error
messages about fields being resolved incompletely.

Change-Id: I713c0191f00fe140ad698675803ab1f8823dc5bd

Reviewers: arsenm, craig.topper, tra, MartinO

Subscribers: wdng, llvm-commits

Differential Revision: https://reviews.llvm.org/D44476

llvm-svn: 327850
2018-03-19 14:14:28 +00:00
Nicolai Haehnle
a64a4772e8 TableGen: Check the dynamic type of !cast<Rec>(string)
Summary:
The docs already claim that this happens, but so far it hasn't. As a
consequence, existing TableGen files get this wrong a lot, but luckily
the fixes are all reasonably straightforward.

To make this work with all the existing forms of self-references (since
the true type of a record is only built up over time), the lookup of
self-references in !cast is delayed until the final resolving step.

Change-Id: If5923a72a252ba2fbc81a889d59775df0ef31164

Reviewers: arsenm, craig.topper, tra, MartinO

Subscribers: wdng, javed.absar, llvm-commits

Differential Revision: https://reviews.llvm.org/D44475

llvm-svn: 327849
2018-03-19 14:14:20 +00:00
Nicolai Haehnle
74a4d54f41 TableGen: Explicitly test some cases of self-references and !cast errors
Summary:
These are cases of self-references that exist today in practice. Let's
add tests for them to avoid regressions.

The self-references in PPCInstrInfo.td can be expressed in a simpler
way. Allowing this type of self-reference while at the same time
consistently doing late-resolve even for self-references is problematic
because there are references to fields that aren't in any class. Since
there's no need for this type of self-reference anyway, let's just
remove it.

Change-Id: I914e0b3e1ae7adae33855fac409b536879bc3f62

Reviewers: arsenm, craig.topper, tra, MartinO

Subscribers: nemanjai, wdng, kbarton, llvm-commits

Differential Revision: https://reviews.llvm.org/D44474

llvm-svn: 327848
2018-03-19 14:14:10 +00:00
Nicolai Haehnle
663e769575 TableGen: Only fold when some operand made resolve progress
Summary:
Make sure that we always fold immediately, so there's no point in
attempting to re-fold when nothing changes.

Change-Id: I069e1989455b6f2ca8606152f6adc1a5e817f1c8

Reviewers: arsenm, craig.topper, tra, MartinO

Subscribers: wdng, llvm-commits

Differential Revision: https://reviews.llvm.org/D44198

llvm-svn: 327847
2018-03-19 14:14:04 +00:00
Nicolai Haehnle
770efdd23a TableGen: Remove OpInit::Fold
Summary:
Virtual dispatch is not actually used anywhere.

Change-Id: I9829c5c59920ea27fb9bc17f1442156a3bb09a65

Reviewers: arsenm, craig.topper, tra, MartinO

Subscribers: wdng, llvm-commits

Differential Revision: https://reviews.llvm.org/D44197

llvm-svn: 327846
2018-03-19 14:13:59 +00:00
Nicolai Haehnle
a79d70d75f TableGen: Move GenStrConcat to a helper function in BinOpInit
Summary:
Make it accessible for more users.

Change-Id: Ib05f09ba14e7942ced5d2f24b205efa285e40cd5

Reviewers: arsenm, craig.topper, tra, MartinO

Subscribers: wdng, llvm-commits

Differential Revision: https://reviews.llvm.org/D44196

llvm-svn: 327845
2018-03-19 14:13:54 +00:00
Nicolai Haehnle
ddd47aadb0 TableGen: Remove the cast-from-string-to-variable-reference feature
Summary:
Cast-from-string for records isn't going away, but cast-from-string for
variables is a pretty dodgy feature to have, especially when referencing
template arguments. It's doubtful that this ever worked in a reliable
way, and nobody seems to be using it, so let's get rid of it and get
some related cleanups.

Change-Id: I395ac8a43fef4cf98e611f2f552300d21e99b66a

Reviewers: arsenm, craig.topper, tra, MartinO

Subscribers: wdng, llvm-commits

Differential Revision: https://reviews.llvm.org/D44195

llvm-svn: 327844
2018-03-19 14:13:37 +00:00