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52 Commits

Author SHA1 Message Date
Jyotsna Verma
a3587dd6bb Hexagon: Use multiclass for Jump instructions. 
llvm-svn: 180885
 2013-05-01 21:37:34 +00:00
Jyotsna Verma
4a5d195942 Hexagon: Use multiclass for combine and STri[bhwd]_shl_V4 instructions. 
llvm-svn: 180145
 2013-04-23 21:17:40 +00:00
Jyotsna Verma
d985cbcb4e Hexagon: Define relations for GP-relative instructions. 
No functionality change.

llvm-svn: 180144
 2013-04-23 21:05:55 +00:00
Jyotsna Verma
20903a7aba Hexagon: Remove duplicate instructions to handle global/immediate values 
for absolute/absolute-set addressing modes.

llvm-svn: 180120
 2013-04-23 17:11:46 +00:00
Jyotsna Verma
f365070e16 Hexagon: Set isPredicatedNew flag on predicate new instructions. 
llvm-svn: 179388
 2013-04-12 18:01:06 +00:00
Jyotsna Verma
a7ba594fa9 Hexagon: Set isPredicatedFlase flag for all the instructions with negated predication. 
llvm-svn: 179387
 2013-04-12 17:46:52 +00:00
Jyotsna Verma
8a524534a6 Hexagon: Use multiclass for gp-relative instructions. 
Remove noV4T gp-relative instructions.

llvm-svn: 178246
 2013-03-28 16:25:57 +00:00
Jyotsna Verma
665c66e6ea Hexagon: Use multiclass for aslh, asrh, sxtb, sxth, zxtb and zxth. 
llvm-svn: 178032
 2013-03-26 15:43:57 +00:00
Jyotsna Verma
fa7dec4e5b Hexagon: Add and enable memops setbit, clrbit, &,|,+,- for byte, short, and word. 
llvm-svn: 177747
 2013-03-22 18:41:34 +00:00
Jyotsna Verma
6ba1f8e0d8 Hexagon: Add patterns for zero extended loads from i1->i64. 
llvm-svn: 176689
 2013-03-08 14:15:15 +00:00
Jyotsna Verma
c3d8f08545 Hexagon: Add support to lower block address. 
llvm-svn: 176637
 2013-03-07 19:10:28 +00:00
Jyotsna Verma
e27b88fb08 reverting patch 176508. 
llvm-svn: 176513
 2013-03-05 20:29:23 +00:00
Jyotsna Verma
ef3cf2b345 Hexagon: Add support for lowering block address. 
llvm-svn: 176508
 2013-03-05 19:37:46 +00:00
Jyotsna Verma
483fcc523c Hexagon: Set appropriate TSFlags to the loads/stores with global address to 
support constant extension.

This patch doesn't introduce any functionality changes.

llvm-svn: 175280
 2013-02-15 17:52:07 +00:00
Jyotsna Verma
38aab141d7 Hexagon: Use multiclass for absolute addressing mode loads. 
This patch doesn't introduce any functionality changes.

llvm-svn: 175187
 2013-02-14 18:15:29 +00:00
Jyotsna Verma
a382dbb48f Hexagon: Use absolute addressing mode loads/stores for global+offset 
instead of redefining separate instructions for them.

llvm-svn: 175086
 2013-02-13 21:38:46 +00:00
Jyotsna Verma
31124b1816 Hexagon: Use TFR_cond with cmpb.[eq,gt,gtu] to handle 
zext( set[ne,eq,gt,ugt] (...) ) type of dag patterns.

llvm-svn: 174429
 2013-02-05 19:20:45 +00:00
Jyotsna Verma
774837ab41 Hexagon: Use multiclass for absolute addressing mode stores. 
llvm-svn: 174412
 2013-02-05 18:15:34 +00:00
Jyotsna Verma
56ef42a2ac Hexagon: Add V4 compare instructions. Enable relationship mapping 
for the existing instructions.

llvm-svn: 174389
 2013-02-05 16:42:24 +00:00
Jyotsna Verma
e97a68f8b5 Hexagon: Add V4 combine instructions and some more Def Pats for V2. 
llvm-svn: 174331
 2013-02-04 15:52:56 +00:00
Jyotsna Verma
460af8cdc9 Replace LDriu*[bhdw]_indexed_V4 instructions with "def Pats". 
llvm-svn: 174193
 2013-02-01 16:36:16 +00:00
Jyotsna Verma
3896fefde4 Add appropriate TSFlags to the instructions that must be always extended. 
llvm-svn: 174186
 2013-02-01 15:54:43 +00:00
Jyotsna Verma
189807572e Use multiclass for post-increment store instructions. 
llvm-svn: 173816
 2013-01-29 18:42:41 +00:00
Jyotsna Verma
e8debd87f4 Add constant extender support for MInst type instructions. 
llvm-svn: 173813
 2013-01-29 18:18:50 +00:00
Craig Topper
8451536658 Remove more unnecessary # operators with nothing to paste proceeding them. 
llvm-svn: 171702
 2013-01-07 06:14:20 +00:00
Craig Topper
d8d638d017 Remove # from the beginning and end of def names. The # is a paste operator and should only be used with something to paste on either side. 
llvm-svn: 171697
 2013-01-07 05:45:56 +00:00
Jyotsna Verma
d2eb3f84fd Add constant extender support to GP-relative load/store instructions. 
llvm-svn: 170672
 2012-12-20 06:52:46 +00:00
Jyotsna Verma
cb321ae6c7 Add TSFlags to ALU32 type instructions for constant-extender/Relationship maps. 
llvm-svn: 170671
 2012-12-20 06:45:39 +00:00
Jyotsna Verma
7fb1e065a0 Use multiclass for new-value store instructions with MEMri operand. 
llvm-svn: 169814
 2012-12-11 05:12:25 +00:00
Jyotsna Verma
9995a62d05 Define new-value store instructions with base+immediate addressing mode 
using multiclass.

llvm-svn: 169432
 2012-12-05 22:02:56 +00:00
Jyotsna Verma
c8d145f6f6 Use multiclass to define store instructions with base+immediate offset 
addressing mode and immediate stored value.

llvm-svn: 169408
 2012-12-05 19:32:03 +00:00
Jyotsna Verma
52d66f1d1e Define store instructions with base+register offset addressing mode 
using multiclass.

llvm-svn: 169314
 2012-12-04 21:58:25 +00:00
Jyotsna Verma
ec3f676ca1 Add patterns to define 'combine', 'tstbit', 'ct0/cl0' (count trailing/leading zeros) 
instructions.

llvm-svn: 169287
 2012-12-04 18:05:01 +00:00
Jyotsna Verma
e17db34a1c Define store instructions with base+immediate offset addressing mode 
using multiclass.

llvm-svn: 169168
 2012-12-03 22:26:28 +00:00
Jyotsna Verma
9baa0ebf94 Use multiclass for the store instructions with MEMri operand. 
llvm-svn: 168983
 2012-11-30 06:10:22 +00:00
Jyotsna Verma
9ec526d755 Use multiclass for the load instructions with 'base + register offset' 
addressing mode.

llvm-svn: 168976
 2012-11-30 04:19:09 +00:00
Jyotsna Verma
5aa884e1c7 Removing some unused instruction definitions from the Hexagon backend. 
llvm-svn: 168388
 2012-11-20 22:14:23 +00:00
Jyotsna Verma
a472ef54f3 Added multiclass for post-increment load instructions. 
llvm-svn: 167974
 2012-11-14 20:38:48 +00:00
Jakob Stoklund Olesen
b8af245a15 Remove variable_ops from call instructions in most targets. 
Call instructions are no longer required to be variadic, and
variable_ops should only be used for instructions that encode a variable
number of arguments, like the ARM stm/ldm instructions.

llvm-svn: 160189
 2012-07-13 20:44:29 +00:00
Brendon Cahoon
8b14ad918f Revert 156634 upon request until code improvement changes are made. 
llvm-svn: 156775
 2012-05-14 19:35:42 +00:00
Brendon Cahoon
90dddafa44 Hexagon constant extender support. 
Patch by Jyotsna Verma.

llvm-svn: 156634
 2012-05-11 19:56:59 +00:00
Sirish Pande
94592d3685 Update load/store instruction patterns in Hexagon V4. 
llvm-svn: 156411
 2012-05-08 19:50:20 +00:00
Sirish Pande
450a68c937 Extensions of Hexagon V4 instructions. 
This adds new instructions for Hexagon V4 architecture.

llvm-svn: 156071
 2012-05-03 16:18:50 +00:00
Chandler Carruth
9460759e4f Revert r155365, r155366, and r155367. All three of these have regression 
test suite failures. The failures occur at each stage, and only get
worse, so I'm reverting all of them.

Please resubmit these patches, one at a time, after verifying that the
regression test suite passes. Never submit a patch without running the
regression test suite.

llvm-svn: 155372
 2012-04-23 18:25:57 +00:00
Sirish Pande
2230f1957e Support for Hexagon VLIW Packetizer. 
llvm-svn: 155365
 2012-04-23 17:49:20 +00:00
Chandler Carruth
090e90a242 This reverts a long string of commits to the Hexagon backend. These 
commits have had several major issues pointed out in review, and those
issues are not being addressed in a timely fashion. Furthermore, this
was all committed leading up to the v3.1 branch, and we don't need piles
of code with outstanding issues in the branch.

It is possible that not all of these commits were necessary to revert to
get us back to a green state, but I'm going to let the Hexagon
maintainer sort that out. They can recommit, in order, after addressing
the feedback.

Reverted commits, with some notes:

Primary commit r154616: HexagonPacketizer
  - There are lots of review comments here. This is the primary reason
    for reverting. In particular, it introduced large amount of warnings
    due to a bad construct in tablegen.
  - Follow-up commits that should be folded back into this when
    reposting:
    - r154622: CMake fixes
    - r154660: Fix numerous build warnings in release builds.
  - Please don't resubmit this until the three commits above are
    included, and the issues in review addressed.

Primary commit r154695: Pass to replace transfer/copy ...
  - Reverted to minimize merge conflicts. I'm not aware of specific
    issues with this patch.

Primary commit r154703: New Value Jump.
  - Primarily reverted due to merge conflicts.
  - Follow-up commits that should be folded back into this when
    reposting:
    - r154703: Remove iostream usage
    - r154758: Fix CMake builds
    - r154759: Fix build warnings in release builds
  - Please incorporate these fixes and and review feedback before
    resubmitting.

Primary commit r154829: Hexagon V5 (floating point) support.
  - Primarily reverted due to merge conflicts.
  - Follow-up commits that should be folded back into this when
    reposting:
    - r154841: Remove unused variable (fixing build warnings)

There are also accompanying Clang commits that will be reverted for
consistency.

llvm-svn: 155047
 2012-04-18 21:31:19 +00:00
Sirish Pande
ff74c0b4e8 HexagonPacketizer patch. 
llvm-svn: 154616
 2012-04-12 21:06:38 +00:00
Sirish Pande
23474e10dd Optimize redundant sign extends and negation of predicates. 
llvm-svn: 150606
 2012-02-15 18:52:27 +00:00
Eric Christopher
559b3c028e Revert "Optimize redundant sign extends and negation of predicates" 
as it's breaking the build.

This reverts commit 11241abca5e2a313412fed594bb9d9fa2a2057fb.

llvm-svn: 150604
 2012-02-15 18:32:25 +00:00
Sirish Pande
7c661be429 Optimize redundant sign extends and negation of predicates 
llvm-svn: 150601
 2012-02-15 18:22:18 +00:00