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6029 Commits

Author SHA1 Message Date
Evan Cheng
ca5eaf4020 Avoid getting into an infinite loop when -disable-x86-shuffle-opti is specified. 
llvm-svn: 30974
 2006-10-16 06:36:00 +00:00
Evan Cheng
c73547a71d SelectScalarSSELoad should call CanBeFoldedBy as well. 
llvm-svn: 30973
 2006-10-16 06:34:55 +00:00
Anton Korobeynikov
61d88967b9 Align stack size to DWORD boundary 
llvm-svn: 30964
 2006-10-14 20:53:35 +00:00
Rafael Espindola
c426cede28 expand ISD::BRCOND 
llvm-svn: 30963
 2006-10-14 17:59:54 +00:00
Rafael Espindola
38c602f658 fix some fp condition codes 
use non trapping comparison instructions

llvm-svn: 30962
 2006-10-14 13:42:53 +00:00
Evan Cheng
6c8de88f88 Corrected load folding check. We need to start from the root of the sub-dag 
being matched and ensure there isn't a non-direct path to the load (i.e. a
path that goes out of the sub-dag.)

llvm-svn: 30958
 2006-10-14 08:33:25 +00:00
Chris Lattner
b90d66b7da implement branch inspection/modification methods. 
llvm-svn: 30946
 2006-10-13 21:21:17 +00:00
Evan Cheng
fe5bb5dbe6 Merge ISD::TRUNCSTORE to ISD::STORE. Switch to using StoreSDNode. 
llvm-svn: 30945
 2006-10-13 21:14:26 +00:00
Chris Lattner
bea7a9de50 remove some dead code 
llvm-svn: 30938
 2006-10-13 20:40:42 +00:00
Chris Lattner
b22754853b add note 
llvm-svn: 30937
 2006-10-13 20:20:58 +00:00
Chris Lattner
14f18d4896 set isBarrier correctly 
llvm-svn: 30936
 2006-10-13 19:10:34 +00:00
Chris Lattner
a3f4e611a4 Correctly handle instruction separators. 
llvm-svn: 30935
 2006-10-13 17:56:02 +00:00
Chris Lattner
63ec35db20 Expose method and ivars for measuring inline asm length properly. 
llvm-svn: 30934
 2006-10-13 17:50:07 +00:00
Rafael Espindola
1f85e7a2a1 add FNEGS and FNEGD 
llvm-svn: 30932
 2006-10-13 17:37:35 +00:00
Rafael Espindola
042e61af25 add SBCS and SUBS 
llvm-svn: 30930
 2006-10-13 17:19:20 +00:00
Rafael Espindola
24d7976d1d implement calls to functions that return long 
llvm-svn: 30929
 2006-10-13 16:47:22 +00:00
Rafael Espindola
bd50a4d757 implement unordered floating point compares 
llvm-svn: 30928
 2006-10-13 13:14:59 +00:00
Chris Lattner
9777da8fb7 add a note 
llvm-svn: 30921
 2006-10-12 22:01:26 +00:00
Evan Cheng
76d365ac84 Doh. This wasn't causing problems by luck. 
llvm-svn: 30914
 2006-10-12 19:13:59 +00:00
Evan Cheng
d07e2f081a Some X86ISD::CMP were created with wrong ValueType's. 
llvm-svn: 30913
 2006-10-12 19:12:56 +00:00
Chris Lattner
b7ff3d59f7 mark call adjustments as modifying the SP 
llvm-svn: 30911
 2006-10-12 18:00:26 +00:00
Chris Lattner
80790cad34 adjcallstack up/down clobbers the sp 
llvm-svn: 30910
 2006-10-12 18:00:14 +00:00
Chris Lattner
e7ea164744 adjcallstackup/down clobbers the stack pointer 
llvm-svn: 30909
 2006-10-12 17:57:58 +00:00
Chris Lattner
e4e8893807 mark adjcallstack up/down as clobbering and using the SP 
llvm-svn: 30908
 2006-10-12 17:56:34 +00:00
Chris Lattner
b25677f5ca Move the Imp tblgen class from the X86 backend to common code. 
llvm-svn: 30907
 2006-10-12 17:49:27 +00:00
Chris Lattner
a678c5bac1 Mark ADJCALLSTACKUP/DOWN as clobbering ESP so that virtregmap will notice 
that it can't assume ESP is unmodified across the instrs.

llvm-svn: 30905
 2006-10-12 17:42:56 +00:00
Chris Lattner
fde6859201 fix compilation failure of smg2000 
llvm-svn: 30900
 2006-10-12 03:55:48 +00:00
Chris Lattner
502246c4a6 Fold "zero extending vector loads" now that evan added the chain manip stuff. 
This compiles both tests in X86/vec_ss_load_fold.ll into:

_test1:
        movss 4(%esp), %xmm0
        subss LCPI1_0, %xmm0
        mulss LCPI1_1, %xmm0
        minss LCPI1_2, %xmm0
        xorps %xmm1, %xmm1
        maxss %xmm1, %xmm0
        cvttss2si %xmm0, %eax
        andl $65535, %eax
        ret

instead of:

_test1:
        movss LCPI1_0, %xmm0
        movss 4(%esp), %xmm1
        subss %xmm0, %xmm1
        movss LCPI1_1, %xmm0
        mulss %xmm0, %xmm1
        movss LCPI1_2, %xmm0
        minss %xmm0, %xmm1
        xorps %xmm0, %xmm0
        maxss %xmm0, %xmm1
        cvttss2si %xmm1, %eax
        andl $65535, %eax
        ret

llvm-svn: 30894
 2006-10-11 22:09:58 +00:00
Evan Cheng
95140c9c64 ComplexPatterns sse_load_f32 and sse_load_f64 returns in / out chain operands. 
llvm-svn: 30892
 2006-10-11 21:06:01 +00:00
Evan Cheng
ca66f49574 Add properties to ComplexPattern. 
llvm-svn: 30891
 2006-10-11 21:03:53 +00:00
Andrew Lenharth
55db991b47 Reduce the amount of state in the lowering code and drop old pattern ISel functions 
llvm-svn: 30881
 2006-10-11 16:24:51 +00:00
Evan Cheng
9b31a4d4ed Naming consistency. 
llvm-svn: 30878
 2006-10-11 07:10:22 +00:00
Chris Lattner
b9c1ea6dcc Use cute tblgen tricks to make zap handling more powerful. Specifically, 
when the dag combiner simplifies an and mask, notice this and allow those bits
to be missing from the zap mask.

This compiles Alpha/zapnot4.ll into:

        sll $16,3,$0
        zapnot $0,3,$0
        ret $31,($26),1

instead of:

        ldah $0,1($31)
        lda $0,-8($0)
        sll $16,3,$1
        and $1,$0,$0
        ret $31,($26),1

It would be *really* nice to replace the hunk of code in the
AlphaISelDAGToDAG.cpp file that matches (and (srl (x, C), c2) into
(SRL (ZAPNOTi)) with a similar pattern, but I've spent enough time poking
at alpha.  Make andrew will do this.

llvm-svn: 30875
 2006-10-11 05:13:56 +00:00
Andrew Lenharth
4b783303e5 Jimptables working again on alpha. 
As a bonus, use the GOT node instead of the AlphaISD::GOT for internal stuff.

llvm-svn: 30873
 2006-10-11 04:29:42 +00:00
Chris Lattner
95a8905db2 Remove dead/redundant instructions. These are handled by ZAPNOTi 
llvm-svn: 30872
 2006-10-11 04:12:39 +00:00
Andrew Lenharth
7a79f1df15 This entry is done. switched to the gcc way of doing things. 
llvm-svn: 30867
 2006-10-11 01:48:03 +00:00
Chris Lattner
4be8276d27 This has apparently been fixed 
llvm-svn: 30864
 2006-10-11 01:44:46 +00:00
Rafael Espindola
46e7aceb1d uint <-> double conversion 
llvm-svn: 30862
 2006-10-10 20:38:57 +00:00
Rafael Espindola
0112351e9a add fp sub 
llvm-svn: 30859
 2006-10-10 19:35:01 +00:00
Rafael Espindola
27d68a3c22 add double <-> int conversion 
llvm-svn: 30858
 2006-10-10 18:55:14 +00:00
Rafael Espindola
413aa20bc8 compare doubles 
llvm-svn: 30856
 2006-10-10 16:33:47 +00:00
Rafael Espindola
b0719f1374 initial support for fp compares. Unordered compares not implemented yet 
llvm-svn: 30854
 2006-10-10 12:56:00 +00:00
Evan Cheng
b2998e15f2 More isel time load folding checking for nodes that produce flag values. 
See comment in CanBeFoldedBy() for detailed explanation.

llvm-svn: 30851
 2006-10-10 01:46:56 +00:00
Evan Cheng
d1a37cb9dc Don't go too crazy with these AddComplexity. Try matching shufps with load 
folding first.

llvm-svn: 30848
 2006-10-09 21:42:15 +00:00
Evan Cheng
8f6c6b19e6 Don't convert to MOVLP if using shufps etc. may allow load folding. 
llvm-svn: 30847
 2006-10-09 21:39:25 +00:00
Evan Cheng
d22f3dd3ed Reflects ISD::LOAD / ISD::LOADX / LoadSDNode changes. 
llvm-svn: 30844
 2006-10-09 20:57:25 +00:00
Rafael Espindola
bae07b25d6 add float -> double and double -> float conversion 
llvm-svn: 30835
 2006-10-09 17:50:29 +00:00
Rafael Espindola
f917f096e2 add ADDS and ADCS 
llvm-svn: 30830
 2006-10-09 17:18:28 +00:00
Rafael Espindola
319b5e9c95 expand ISD::SELECT 
llvm-svn: 30829
 2006-10-09 16:28:33 +00:00
Rafael Espindola
fed11f040c add a note 
llvm-svn: 30828
 2006-10-09 14:18:33 +00:00
Rafael Espindola
aaeadcb6f5 expand ISD::EXTLOAD 
llvm-svn: 30827
 2006-10-09 14:13:40 +00:00
Rafael Espindola
1e16a7e972 most ARM targets are little endian 
llvm-svn: 30826
 2006-10-09 14:12:15 +00:00
Chris Lattner
3cd1d08ac6 completely disable folding of loads into scalar sse instructions and provide 
a framework for doing it right.  This fixes
CodeGen/X86/2006-10-07-ScalarSSEMiscompile.ll.

Once X86DAGToDAGISel::SelectScalarSSELoad is implemented right, this task
will be done.

llvm-svn: 30817
 2006-10-07 21:55:32 +00:00
Chris Lattner
a51aea84b8 convert packed FP add/sub/mul/div to use a multiclass. 
llvm-svn: 30815
 2006-10-07 21:17:13 +00:00
Chris Lattner
da75127cea one multiclass now defines all 8 variants of binary-scalar-sse-fp operations. 
llvm-svn: 30814
 2006-10-07 20:55:57 +00:00
Chris Lattner
8ce6993f53 Switch ADD/MUL/DIV/SUB scalarsse fp ops to a multiclass 
llvm-svn: 30813
 2006-10-07 20:35:44 +00:00
Chris Lattner
ec39f5bcd5 Random acts of shrinkage 
llvm-svn: 30812
 2006-10-07 19:49:05 +00:00
Chris Lattner
8e3aa16298 Convert pand/por/pxor to use multiclass 
llvm-svn: 30811
 2006-10-07 19:37:30 +00:00
Chris Lattner
33aecdebfc Convert some more instructions over to use a new multiclass. 
Fix a bug where the asmstring for PSUBQrm was wrong.

llvm-svn: 30810
 2006-10-07 19:34:33 +00:00
Chris Lattner
260659336a Fix a bug where PADDQrm printed paddd instead of paddq. 
llvm-svn: 30809
 2006-10-07 19:15:46 +00:00
Chris Lattner
0122bfac98 Add multiclass for SSE2 instructions that correspond to simple binops. 
llvm-svn: 30808
 2006-10-07 19:14:49 +00:00
Chris Lattner
db12d69657 rename: 
PDI_binop_rm -> PDI_binop_rm_int
  PDI_binop_rmi -> PDI_binop_rmi_int

to make it clear that these are for use with intrinsics.

llvm-svn: 30807
 2006-10-07 19:02:31 +00:00
Chris Lattner
36709eed45 Convert saturating PADD/PSUB's to use a multiclass 
llvm-svn: 30806
 2006-10-07 18:48:46 +00:00
Chris Lattner
d5d4378010 Convert PAVG*, PMADDWD, and PMUL* to use multiclasses. 
llvm-svn: 30805
 2006-10-07 18:39:00 +00:00
Chris Lattner
753ec9950a Fix typo in packsswb instr definition, where the load had the wrong type. 
This allows us to use the multiclass for other packs.

llvm-svn: 30804
 2006-10-07 18:23:58 +00:00
Rafael Espindola
38e9e2e01d implement FUITOS and FUITOD 
llvm-svn: 30803
 2006-10-07 14:24:52 +00:00
Rafael Espindola
90a24709fb implement FLDD 
llvm-svn: 30802
 2006-10-07 14:03:39 +00:00
Rafael Espindola
b8ce0f8bbd implement fadds, faddd, fmuls and fmuld 
llvm-svn: 30801
 2006-10-07 13:46:42 +00:00
Chris Lattner
59bf33e5e4 handle pmin/pmax with multiclasses 
llvm-svn: 30800
 2006-10-07 07:49:33 +00:00
Chris Lattner
2177d324c5 simplify pack and shift intrinsics with multiclasses 
llvm-svn: 30797
 2006-10-07 07:06:17 +00:00
Chris Lattner
31eb3af1a8 Use a multiclass to simplify 'SSE2 Integer comparison' 
llvm-svn: 30796
 2006-10-07 06:47:08 +00:00
Chris Lattner
7cde5d8820 move class defns close to uses to make it easier to read 
llvm-svn: 30795
 2006-10-07 06:33:36 +00:00
Chris Lattner
2842be4e37 simplify horizontal op definitions 
llvm-svn: 30794
 2006-10-07 06:31:41 +00:00
Chris Lattner
b3b659492b remove more unneeded type info 
llvm-svn: 30793
 2006-10-07 06:27:03 +00:00
Chris Lattner
8a2d78d3cf remove unneeded definitions and type info 
llvm-svn: 30792
 2006-10-07 06:19:41 +00:00
Chris Lattner
a75da38d99 remove some unneeded type info 
llvm-svn: 30791
 2006-10-07 06:17:43 +00:00
Chris Lattner
d704b454b9 simplify patterns by merging in operand info 
llvm-svn: 30790
 2006-10-07 05:50:25 +00:00
Chris Lattner
bf6419cef6 Factor operands into packed unary classes 
llvm-svn: 30789
 2006-10-07 05:47:20 +00:00
Chris Lattner
06c9aa41f1 remove dead/duplicate instructions 
llvm-svn: 30788
 2006-10-07 05:41:52 +00:00
Chris Lattner
72b130720d Pull operand info up into parent class for scalar sse intrinsics. 
llvm-svn: 30787
 2006-10-07 05:26:13 +00:00
Chris Lattner
cf13d058a3 convert the sole sd unary intrinsic to a multiclass for consistency 
llvm-svn: 30786
 2006-10-07 05:19:31 +00:00
Chris Lattner
67ea3292d2 pull operand string into the multiclass 
llvm-svn: 30785
 2006-10-07 05:13:26 +00:00
Chris Lattner
e234302d01 Remove RSQRTSS[rm] RCPSS[rm], which are dead. 
Introduce SS_IntUnary, a multiclass to replace SS_Int[rm].

llvm-svn: 30784
 2006-10-07 05:09:48 +00:00
Chris Lattner
22137d1891 eliminate redundancy 
llvm-svn: 30783
 2006-10-07 04:52:09 +00:00
Chris Lattner
f5b9b4a4b2 Set the jt section 
llvm-svn: 30781
 2006-10-06 22:52:33 +00:00
Chris Lattner
2ca01febcf Alpha uses a got 
llvm-svn: 30778
 2006-10-06 22:46:51 +00:00
Rafael Espindola
a96c205e12 add optional input flag to FMRRD 
llvm-svn: 30774
 2006-10-06 20:33:26 +00:00
Rafael Espindola
54301ca490 add support for calling functions that return double 
llvm-svn: 30771
 2006-10-06 19:10:05 +00:00
Evan Cheng
6d15f83d46 80 col violation. 
llvm-svn: 30770
 2006-10-06 18:57:51 +00:00
Chris Lattner
399106d8f8 ugly codegen 
llvm-svn: 30769
 2006-10-06 17:39:34 +00:00
Rafael Espindola
d870b158b3 fix some bugs affecting functions with no arguments 
llvm-svn: 30767
 2006-10-06 17:26:30 +00:00
Rafael Espindola
f35563ff66 fix the stack alignment 
llvm-svn: 30766
 2006-10-06 14:29:47 +00:00
Rafael Espindola
f679bdf121 add support for calling functions that have double arguments 
llvm-svn: 30765
 2006-10-06 12:50:22 +00:00
Evan Cheng
9ce3d493f0 Still need to support -mcpu=<> or cross compilation will fail. Doh. 
llvm-svn: 30764
 2006-10-06 09:17:41 +00:00
Evan Cheng
6fc0ae2136 Do away with CPU feature list. Just use CPUID to detect MMX, SSE, SSE2, SSE3, and 64-bit support. 
llvm-svn: 30763
 2006-10-06 08:21:07 +00:00
Evan Cheng
35a3337e1d It appears the inline asm in GetCpuIDAndInfo() may clobbers some registers if it isn't inlined (at < -O3). Force it to be inlined. 
llvm-svn: 30762
 2006-10-06 07:50:56 +00:00
Evan Cheng
275825195a Make use of getStore(). 
llvm-svn: 30759
 2006-10-05 23:01:46 +00:00
Rafael Espindola
2e4743b6d1 use a const ref for passing the vector to ArgumentLayout 
llvm-svn: 30756
 2006-10-05 17:46:48 +00:00
Rafael Espindola
f0e4950ef4 implement a ArgumentLayout class to factor code common to LowerFORMAL_ARGUMENTS and LowerCALL 
implement FMDRR
add support for f64 function arguments

llvm-svn: 30754
 2006-10-05 16:48:49 +00:00
Chris Lattner
7f98896c02 Lower some min/max idioms to minss/maxss when unsafe fp math is enabled. 
llvm-svn: 30748
 2006-10-05 04:11:26 +00:00