1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-20 19:42:54 +02:00
Commit Graph

478 Commits

Author SHA1 Message Date
Bruno Cardoso Lopes
df02d037e4 Add AVX SSE4.1 Horizontal Minimum and Position instruction
llvm-svn: 107552
2010-07-03 00:49:21 +00:00
Bruno Cardoso Lopes
e6b70efcb0 Add AVX SSE4.1 round instructions
llvm-svn: 107549
2010-07-03 00:37:44 +00:00
Bruno Cardoso Lopes
473863e456 Simple refactoring of SSE4.1 instructions, making room for the AVX forms
llvm-svn: 107540
2010-07-02 23:27:59 +00:00
Bruno Cardoso Lopes
4931e183b5 - Add support for the rest of AVX SSE3 instructions
- Fix VEX prefix to be emitted with 3 bytes whenever VEX_5M
represents a REX equivalent two byte leading opcode

llvm-svn: 107523
2010-07-02 22:06:54 +00:00
Bruno Cardoso Lopes
c5670fcb23 Shrink down SSE3 code by more multiclass refactoring
llvm-svn: 107448
2010-07-01 23:10:49 +00:00
Bruno Cardoso Lopes
c215186088 Shrink down SSE3 code by some multiclass refactoring - 1st part
llvm-svn: 107438
2010-07-01 22:33:18 +00:00
Bruno Cardoso Lopes
511e5f47de Move SSE3 Move patterns to a more appropriate section
Add AVX SSE3 packed horizontal and & sub instructions

llvm-svn: 107405
2010-07-01 17:35:02 +00:00
Bruno Cardoso Lopes
0a3048e8b9 Add AVX SSE3 packed addsub instructions
llvm-svn: 107404
2010-07-01 17:08:18 +00:00
Bruno Cardoso Lopes
c1abe91367 Add AVX SSE3 replicate and convert instructions
llvm-svn: 107375
2010-07-01 02:33:39 +00:00
Bruno Cardoso Lopes
956316a3d7 - Add AVX SSE2 Move doubleword and quadword instructions.
- Add encode bits for VEX_W
- All 128-bit SSE 1 & SSE2 instructions that are described
  in the .td file now have a AVX encoded form already working.

llvm-svn: 107365
2010-07-01 01:20:06 +00:00
Bruno Cardoso Lopes
7ae1ebd3b4 Move MOVD/MODQ code around, creating sections for each of them
llvm-svn: 107308
2010-06-30 18:49:10 +00:00
Bruno Cardoso Lopes
f8855c22be Add AVX SSE2 mask creation and conditional store instructions
llvm-svn: 107306
2010-06-30 18:38:10 +00:00
Bruno Cardoso Lopes
6c468039a2 Fix a bug introduced in r107211 where instructions with memory operands are declared as commutable
llvm-svn: 107300
2010-06-30 18:06:01 +00:00
Bruno Cardoso Lopes
3c02702830 Add AVX SSE2 packed integer extract/insert instructions
llvm-svn: 107293
2010-06-30 17:03:03 +00:00
Bruno Cardoso Lopes
39594cc5d0 Add AVX SSE2 integer unpack instructions
llvm-svn: 107246
2010-06-30 04:06:39 +00:00
Bruno Cardoso Lopes
419f8f29c3 Add AVX SSE2 packed integer shuffle instructions
llvm-svn: 107245
2010-06-30 03:47:56 +00:00
Bruno Cardoso Lopes
c2f5cd2389 Small refactoring of SSE2 packed integer shuffle instructions
llvm-svn: 107243
2010-06-30 03:29:36 +00:00
Bruno Cardoso Lopes
d9acb34aa2 Add AVX SSE2 pack with saturation integer instructions
llvm-svn: 107241
2010-06-30 02:30:25 +00:00
Bruno Cardoso Lopes
c470ba9937 Add AVX SSE2 integer packed compare instructions
llvm-svn: 107240
2010-06-30 02:21:09 +00:00
Bruno Cardoso Lopes
cfbebb3921 - Add AVX form of all SSE2 logical instructions
- Add VEX encoding bits to x86 MRM0r-MRM7r

llvm-svn: 107238
2010-06-30 01:58:37 +00:00
Bruno Cardoso Lopes
2439877e05 Add *several* AVX integer packed binop instructions
llvm-svn: 107225
2010-06-29 23:47:49 +00:00
Bruno Cardoso Lopes
b80121d316 Move SSE2 Packed Integer instructions around, and create specific sections for each of them
llvm-svn: 107211
2010-06-29 22:12:16 +00:00
Bruno Cardoso Lopes
45e0ab4762 Add AVX Move Aligned/Unaligned packed integers
llvm-svn: 107206
2010-06-29 21:25:12 +00:00
Bruno Cardoso Lopes
e1b05180de Add AVX ld/st XCSR register.
Add VEX encoding bits for MRMXm x86 form

llvm-svn: 107204
2010-06-29 20:35:48 +00:00
Bruno Cardoso Lopes
e60533aa42 Add AVX non-temporal stores
llvm-svn: 107178
2010-06-29 18:22:01 +00:00
Bruno Cardoso Lopes
4731169504 Move non-temporal movs to their own section
llvm-svn: 107168
2010-06-29 17:42:37 +00:00
Bruno Cardoso Lopes
2dca1dd168 Add sqrt, rsqrt and rcp AVX instructions
llvm-svn: 107166
2010-06-29 17:26:30 +00:00
Bruno Cardoso Lopes
1fe3ed0e67 Refactoring of arithmetic instruction classes with unary operator
llvm-svn: 107116
2010-06-29 01:33:09 +00:00
Bruno Cardoso Lopes
e4809f15bf Described the missing AVX forms of SSE2 convert instructions
llvm-svn: 107108
2010-06-29 00:36:02 +00:00
Bruno Cardoso Lopes
277fcdf1c1 Add AVX convert CVTSS2SI{rr,rm} and CVTDQ2PS{rr,rm} instructions
llvm-svn: 106917
2010-06-25 23:47:23 +00:00
Bruno Cardoso Lopes
45109dd6c1 Reapply r106896:
Add several AVX MOV flavors
Support VEX encoding for MRMDestReg

llvm-svn: 106912
2010-06-25 23:33:42 +00:00
Bruno Cardoso Lopes
cc4c01f859 revert this now, it's using avx instead of sse :)
llvm-svn: 106906
2010-06-25 23:04:29 +00:00
Bruno Cardoso Lopes
04ac570a8d Add several AVX MOV flavors
Support VEX encoding for MRMDestReg

llvm-svn: 106896
2010-06-25 22:27:51 +00:00
Dan Gohman
388f198fe5 pcmpeqd and friends are Commutable.
llvm-svn: 106886
2010-06-25 21:05:35 +00:00
Bruno Cardoso Lopes
72ca75e10f Move the last piece of SSE2 convert instructions to the Convert Instructions section
llvm-svn: 106877
2010-06-25 20:29:27 +00:00
Bruno Cardoso Lopes
fc7bfafe52 More SSE refactoring, this time with different types of MOVs
llvm-svn: 106876
2010-06-25 20:22:12 +00:00
Bruno Cardoso Lopes
0db2df31f4 Refactoring of more SSE conversion instructions. Also add some AVX instrinsics Int_V... placeholders
llvm-svn: 106867
2010-06-25 18:06:22 +00:00
Bruno Cardoso Lopes
bde2881855 Add some AVX convert instructions
llvm-svn: 106815
2010-06-25 00:39:30 +00:00
Bruno Cardoso Lopes
4663112339 Refactoring of SSE convert intrinsics
llvm-svn: 106808
2010-06-24 23:37:07 +00:00
Bruno Cardoso Lopes
bacc90a80d Refactoring of SSE conversion instructions
llvm-svn: 106804
2010-06-24 22:22:21 +00:00
Bruno Cardoso Lopes
84ce865fea Refactor SSE cmp intrinsics and declare the same for AVX
llvm-svn: 106796
2010-06-24 22:04:40 +00:00
Bruno Cardoso Lopes
11a236d970 - Add AVX COMI{SS,SD}{rr,rm} and UCOMI{SS,SD}{rr,rm}.
- Fix a small VEX encoding issue.
- Move compare instructions to their appropriate place.

llvm-svn: 106787
2010-06-24 20:48:23 +00:00
Bruno Cardoso Lopes
633f345ba9 Add AVX CMP{SS,SD}{rr,rm} instructions and encoding testcases
llvm-svn: 106705
2010-06-24 00:32:06 +00:00
Bruno Cardoso Lopes
5aea735b46 Move SSE and AVX shuffle, unpack and compare code to more appropriate places
llvm-svn: 106702
2010-06-24 00:15:50 +00:00
Bruno Cardoso Lopes
b1bfbacead Add AVX MOVMSK{PS,PD}rr instructions
llvm-svn: 106683
2010-06-23 21:30:27 +00:00
Bruno Cardoso Lopes
8cfdcf7691 Add AVX SHUF{PS,PD}{rr,rm} instructions
llvm-svn: 106672
2010-06-23 20:07:15 +00:00
Bruno Cardoso Lopes
db9027d95d Add AVX compare packed instructions
llvm-svn: 106600
2010-06-22 23:37:59 +00:00
Bruno Cardoso Lopes
424b206ad4 Reapply support for AVX unpack and interleave instructions, with
testcases this time.

llvm-svn: 106593
2010-06-22 23:02:38 +00:00
Bruno Cardoso Lopes
93ec8dcd01 Add AVX MOV{SS,SD}{rr,rm} instructions
llvm-svn: 106588
2010-06-22 22:38:56 +00:00
Bruno Cardoso Lopes
2cf78d18d5 Reorganize logical and arithmetic SSE 1 & 2 instructions
llvm-svn: 106557
2010-06-22 18:17:40 +00:00