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7304 Commits

Author SHA1 Message Date
Evan Cheng
8eff719058 tBcc is not a barrier. 
llvm-svn: 37516
 2007-06-08 09:13:23 +00:00
Evan Cheng
9f23724d53 Stupid cut-n-paste bug caused me soooo much grief. Why wasn't there a compilation warning? I blame it on the FE folks. 
llvm-svn: 37484
 2007-06-07 01:37:54 +00:00
Evan Cheng
7b433a2954 Mark these instructions clobbersPred. They modify the condition code register. 
llvm-svn: 37468
 2007-06-06 10:17:05 +00:00
Evan Cheng
055d2fc508 Added clobbersPred. 
llvm-svn: 37466
 2007-06-06 10:15:28 +00:00
Bruno Cardoso Lopes
709699b8d3 Initial Mips support, here we go! =) 
- Modifications from the last patch included
  (issues pointed by Evan Cheng are now fixed).
- Added more MipsI instructions.
- Added more patterns to match branch instructions.

llvm-svn: 37461
 2007-06-06 07:42:06 +00:00
Evan Cheng
886c1f49ca Print predicate of the second instruction of the two-piece constant MI. 
llvm-svn: 37437
 2007-06-05 18:55:18 +00:00
Evan Cheng
820e352652 PIC label asm printing cosmetic changes. 
llvm-svn: 37434
 2007-06-05 07:36:38 +00:00
Evan Cheng
fdfe615197 Misuse of hasExternalLinkage(), should be checking isDeclaration(). 
llvm-svn: 37419
 2007-06-04 18:54:57 +00:00
Chris Lattner
8a38eebb69 update this entry, now that Anton implemented shift/and lowering for 
switches.  There is one really easy isel thing here with tst we are not
getting.

llvm-svn: 37400
 2007-06-02 18:45:14 +00:00
Evan Cheng
8a52b80cdf Opcode modifier s comes after condition code. e.g. addlts, not addslt. 
llvm-svn: 37388
 2007-06-01 20:51:29 +00:00
Evan Cheng
8589b95a33 Set ARM ifcvt duplication limit to 3 for now. 
llvm-svn: 37385
 2007-06-01 08:28:59 +00:00
Evan Cheng
c2fec89f4a Make jumptable non-predicable for now. 
llvm-svn: 37381
 2007-06-01 00:56:15 +00:00
Chris Lattner
72e07238ba Fix the asmprinter so that a globalvalue can specify an explicit alignment 
smaller than the preferred alignment, but so that the target can actually
specify a minimum alignment if needed.  This fixes some objc protocol
failures Devang tracked down.

llvm-svn: 37373
 2007-05-31 18:57:45 +00:00
Evan Cheng
3672d15956 For VFP2 fldm, fstm instructions, the condition code is printed after the address mode and size specifier. e.g. fstmiaseq, not fstmeqias. 
llvm-svn: 37351
 2007-05-29 23:34:19 +00:00
Evan Cheng
5df14b3451 For ldrb, strh, etc., the condition code is before the width specifier. e.g. streqh, not strheq. 
llvm-svn: 37349
 2007-05-29 23:32:06 +00:00
Evan Cheng
ff31eed2be Add missing const qualifiers. 
llvm-svn: 37342
 2007-05-29 18:42:18 +00:00
Evan Cheng
d8b25a2091 Add missing const qualifiers. 
llvm-svn: 37341
 2007-05-29 18:35:22 +00:00
Nicolas Geoffray
fff14eecb5 Implementation of compilation callback in PPC ELF32 
llvm-svn: 37340
 2007-05-29 16:33:18 +00:00
Dan Gohman
1b1932dda5 Add explicit qualification for namespace MVT members. 
llvm-svn: 37320
 2007-05-24 14:33:05 +00:00
Evan Cheng
80122ab529 Hooks for predication support. 
llvm-svn: 37308
 2007-05-23 07:22:05 +00:00
Evan Cheng
9f763bd3fd Rename a parameter. 
llvm-svn: 37307
 2007-05-23 07:21:11 +00:00
Dale Johannesen
738f94210c name change requested by review of previous patch 
llvm-svn: 37289
 2007-05-22 18:31:04 +00:00
Dale Johannesen
fe0fe14411 Make tail merging the default, except on powerPC. There was no prior art 
for a target-dependent default with a command-line override; this way
should be generally usable.

llvm-svn: 37285
 2007-05-22 17:14:46 +00:00
Bill Wendling
26eb9fb1e0 We only need to specify the most-implied feature for an architecture. 
llvm-svn: 37275
 2007-05-22 05:15:37 +00:00
Evan Cheng
f448047ec2 Fix some -march=thumb regressions. tBR_JTr is not predicable. 
llvm-svn: 37272
 2007-05-21 23:17:32 +00:00
Dale Johannesen
f01566b705 Use AXI3 not AXI2 for appropriate PIC PC-relative loads and stores. Cosmetic. 
llvm-svn: 37271
 2007-05-21 22:42:04 +00:00
Dale Johannesen
8f484d16b0 Add some patterns for PIC PC-relative loads and stores. 
llvm-svn: 37269
 2007-05-21 22:14:33 +00:00
Evan Cheng
d173398eee BlockHasNoFallThrough() now returns true if block ends with a return instruction; AnalyzeBranch() should ignore predicated instructionsd. 
llvm-svn: 37268
 2007-05-21 18:56:31 +00:00
Evan Cheng
3f386274c0 BlockHasNoFallThrough() now returns true if block ends with a return instruction. 
llvm-svn: 37266
 2007-05-21 18:44:17 +00:00
Dan Gohman
875f6bde73 Apply this patch: 
http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20070514/049845.html

llvm-svn: 37240
 2007-05-18 23:21:46 +00:00
Chris Lattner
a7834d79a0 add a note 
llvm-svn: 37239
 2007-05-18 20:18:14 +00:00
Dan Gohman
ec87afe526 Use MVT::FIRST_VECTOR_VALUETYPE and MVT::LAST_VECTOR_VALUETYPE. 
llvm-svn: 37234
 2007-05-18 18:44:07 +00:00
Evan Cheng
e875732104 Mark calls non-predicable for now. Need to ensure it's the last instruction in the if-converted block or make sure it preserve condition code. 
llvm-svn: 37199
 2007-05-18 01:53:54 +00:00
Evan Cheng
03349b0344 Silence some compilation warnings. 
llvm-svn: 37197
 2007-05-18 01:19:57 +00:00
Evan Cheng
2fc338fac1 Set ARM if-conversion block size threshold to 10 instructions for now. 
llvm-svn: 37194
 2007-05-18 00:19:34 +00:00
Evan Cheng
90b0ff05f6 RemoveBranch() and InsertBranch() now returns number of instructions deleted / inserted. 
llvm-svn: 37193
 2007-05-18 00:18:17 +00:00
Evan Cheng
234aab208a RemoveBranch() and InsertBranch() now returns number of instructions deleted / inserted. 
llvm-svn: 37192
 2007-05-18 00:05:48 +00:00
Dale Johannesen
f66c6b85f1 More effective breakdown of memcpy into repeated load/store. These are now 
in the order lod;lod;lod;sto;sto;sto which means the load-store optimizer
has a better chance of producing ldm/stm.  Ideally you would get cooperation
from the RA as well but this is not there yet.

llvm-svn: 37179
 2007-05-17 21:31:21 +00:00
Evan Cheng
1b4af5f975 Fix a bogus check that prevented folding VECTOR_SHUFFLE to UNDEF; add an optimization to fold VECTOR_SHUFFLE to a zero vector. 
llvm-svn: 37173
 2007-05-17 18:45:50 +00:00
Evan Cheng
9c4e69e6e5 Added missing patterns for UNPCKH* and PUNPCKH*. 
llvm-svn: 37172
 2007-05-17 18:44:37 +00:00
Chris Lattner
9a53871650 This is the correct fix for PR1427. This fixes mmx-shuffle.ll and doesn't 
cause other regressions.

llvm-svn: 37160
 2007-05-17 17:13:13 +00:00
Anton Korobeynikov
375cafc275 Revert patch for PR1427. It breaks almost all vector tests. 
llvm-svn: 37159
 2007-05-17 07:50:14 +00:00
Chris Lattner
a18b7d76b3 add support for 128-bit add/sub on ppc64 
llvm-svn: 37158
 2007-05-17 06:52:46 +00:00
Chris Lattner
307a29e831 add support for 128-bit integer add/sub 
llvm-svn: 37154
 2007-05-17 06:35:11 +00:00
Chris Lattner
f65fe1d931 Fix PR1427 and test/CodeGen/X86/mmx-shuffle.ll 
llvm-svn: 37141
 2007-05-17 03:29:42 +00:00
Evan Cheng
dc9e574073 Remove. Not needed. 
llvm-svn: 37139
 2007-05-17 00:11:35 +00:00
Evan Cheng
4fa2db30d9 Default implementation of TargetInstrInfo::getBlockSize(). 
llvm-svn: 37138
 2007-05-16 23:53:44 +00:00
Evan Cheng
b09bf9914f ARM::tB is also predicable. 
llvm-svn: 37125
 2007-05-16 21:53:43 +00:00
Evan Cheng
973f4a19cb PredicateInstruction returns true if the operation was successful. 
llvm-svn: 37124
 2007-05-16 21:53:07 +00:00
Evan Cheng
30f3168b7b Add default implementation of PredicateInstruction(). 
llvm-svn: 37123
 2007-05-16 21:20:37 +00:00
Evan Cheng
48f230dcb0 Move if-conversion after all passes that may use register scavenger. 
llvm-svn: 37120
 2007-05-16 20:52:46 +00:00
Evan Cheng
f7a017dfa7 Removed isPredicable(). 
llvm-svn: 37119
 2007-05-16 20:50:23 +00:00
Evan Cheng
d3f1a259db Make ARM::B isPredicable; Make Bcc and MOVCC condition option a normal operand so they are not predicable. 
llvm-svn: 37118
 2007-05-16 20:50:01 +00:00
Evan Cheng
0aced52f41 Added isPredicable bit to class Instruction. 
llvm-svn: 37117
 2007-05-16 20:47:01 +00:00
Evan Cheng
6943cefdcd Conditional branch is not a barrier. 
llvm-svn: 37103
 2007-05-16 07:45:54 +00:00
Chris Lattner
e67947b38f implement the missing maskmovq mmx intrinsic that akor hit. 
llvm-svn: 37100
 2007-05-16 06:08:17 +00:00
Evan Cheng
c149ee9f00 Fix comment. 
llvm-svn: 37098
 2007-05-16 05:14:06 +00:00
Evan Cheng
34928ae31f Hooks for predication support. 
llvm-svn: 37093
 2007-05-16 02:01:49 +00:00
Chris Lattner
4861b958f1 fix some subtle inline asm selection issues 
llvm-svn: 37067
 2007-05-15 01:31:05 +00:00
Evan Cheng
9f0ffdf4b3 Add PredicateOperand to all ARM instructions that have the condition field. 
llvm-svn: 37066
 2007-05-15 01:29:07 +00:00
Chris Lattner
ce20a357f1 fix subtle bugs in inline asm operand selection 
llvm-svn: 37065
 2007-05-15 01:28:08 +00:00
Lauro Ramos Venancio
c9c5da3939 Fix previous patch. GOTOFF can be used only when the symbol has internal 
linkage or hidden visibility.

llvm-svn: 37055
 2007-05-14 23:20:21 +00:00
Lauro Ramos Venancio
3ff817509f Optimize PIC implementation. GOTOFF can be used when the symbol is defined 
and used in the same module.

llvm-svn: 37044
 2007-05-14 18:46:23 +00:00
Lauro Ramos Venancio
c6d71fb584 Enable aliases on arm-linux. 
llvm-svn: 37042
 2007-05-14 18:32:56 +00:00
Chris Lattner
ecc23415ad Fix PR1413 
llvm-svn: 37023
 2007-05-13 22:19:27 +00:00
Anton Korobeynikov
7daaf71b29 More DWARF-related things cleanup: 
1. Fix PR1380
2. Apply Duncan's patch from PR1410
3. Insert workaround for "one personality function per module" as noted in PR1414
4. Emit correct debug frames for x86/linux. This partly fixes DebugInfo/2006-11-06-StackTrace.cpp: stack trace is
shown correctly, but arguments for function on top of stack are displayed incorrectly.

llvm-svn: 37015
 2007-05-12 22:36:25 +00:00
Chris Lattner
96e9e88590 add some notes 
llvm-svn: 36965
 2007-05-10 00:08:04 +00:00
Evan Cheng
73abcaa525 Switch BCC, MOVCCr, etc. to PredicateOperand. 
llvm-svn: 36948
 2007-05-08 21:08:43 +00:00
Evan Cheng
4dd52e052f PredicateOperand can be used as a normal operand for isel. 
llvm-svn: 36947
 2007-05-08 21:06:08 +00:00
Evan Cheng
6a0b99b9f8 R0 is a sub-register of X0, etc. 
llvm-svn: 36939
 2007-05-08 17:03:51 +00:00
Lauro Ramos Venancio
4f648c68cd Fix PR1390 in a better way. 
llvm-svn: 36916
 2007-05-07 23:15:16 +00:00
Evan Cheng
a949d165ee This is no longer needed after enabling the DAG combiner xform. 
llvm-svn: 36909
 2007-05-07 21:29:41 +00:00
Chris Lattner
50214d1447 add this back 
llvm-svn: 36892
 2007-05-06 20:31:17 +00:00
Anton Korobeynikov
dda2087b65 Update MSIL BE. This patch fixes most weird glitches outlined in 
README.txt. Patch by Roman Samoilov!

llvm-svn: 36890
 2007-05-06 20:13:33 +00:00
Bill Wendling
88e78f8bdb 3DNowA implies 3DNow. 64-bit implies SSE1, SSE2, and I assume MMX. 
llvm-svn: 36860
 2007-05-06 07:56:19 +00:00
Nate Begeman
f496eb7607 Reference correct header 
llvm-svn: 36834
 2007-05-06 04:00:55 +00:00
Lauro Ramos Venancio
236cf4a51b Fix PR1390. 
Don't spill extra register to align the stack.

llvm-svn: 36814
 2007-05-05 23:44:41 +00:00
Chris Lattner
272510387e add a note 
llvm-svn: 36811
 2007-05-05 22:44:08 +00:00
Chris Lattner
0074283b61 the mason example is implemented. Move some examples out of llvm/test, 
upgrade the syntax of some other examples.

llvm-svn: 36806
 2007-05-05 22:29:06 +00:00
Chris Lattner
a13a7d375c implement anyextend from i1 -> i64 
llvm-svn: 36802
 2007-05-05 22:17:00 +00:00
Chris Lattner
9f8e81f9d3 move CodeGen/X86/overlap-add.ll here. 
llvm-svn: 36799
 2007-05-05 22:10:24 +00:00
Anton Korobeynikov
ce48606d7a Emit sections/directives in the proper order. This fixes PR1376. Also, 
some small cleanup was made.

llvm-svn: 36780
 2007-05-05 09:04:50 +00:00
Lauro Ramos Venancio
4e4a4e36dd Add a processor. 
llvm-svn: 36765
 2007-05-04 22:16:30 +00:00
Bill Wendling
dc82c5a195 Add an "implies" field to features. This indicates that, if the current 
feature is set, then the features in the implied list should be set also.
The opposite is also enforced: if a feature in the implied list isn't set,
then the feature that owns that implies list shouldn't be set either.

llvm-svn: 36756
 2007-05-04 20:38:40 +00:00
Evan Cheng
658a4fc56f On Mac OS X, GV requires an extra load only when relocation-model is non-static. 
llvm-svn: 36718
 2007-05-04 00:26:58 +00:00
Evan Cheng
8e5e87a16b Should never see an indexed load / store with zero offset. 
llvm-svn: 36714
 2007-05-03 23:30:36 +00:00
Dale Johannesen
d28d0bac2a Evan's patch to avoid FPreg->intreg copy for cvt; store to mem 
llvm-svn: 36693
 2007-05-03 20:54:42 +00:00
Lauro Ramos Venancio
1d84c031a0 Debug support for arm-linux. 
Patch by Raul Herbster.

llvm-svn: 36690
 2007-05-03 20:28:35 +00:00
Dan Gohman
fd25a9d9a3 Indent the .text, .data, and .bss directives in assembly output, so that 
they are consistent with the other directives.

llvm-svn: 36687
 2007-05-03 18:46:30 +00:00
Chris Lattner
60cd08c23e Fix two classes of bugs: 
1. x86 backend rejected (&gv+c) for the 'i' constraint when in static mode.
  2. the matcher didn't correctly reject and accept some global addresses.
     the right predicate is GVRequiresExtraLoad, not "relomodel = pic".

llvm-svn: 36670
 2007-05-03 16:52:29 +00:00
Chris Lattner
5d81bf937b add support for printing offset from global 
llvm-svn: 36669
 2007-05-03 16:42:23 +00:00
Chris Lattner
e980180c9d revert accidental commit 
llvm-svn: 36668
 2007-05-03 16:40:25 +00:00
Chris Lattner
4dd59a2bfb add support for printing offset of global 
llvm-svn: 36667
 2007-05-03 16:39:48 +00:00
Dan Gohman
a97ce790d0 Sets the section names for fixed-size constants and use the mergeable 
flag for ELF on x86 so that duplicate constants can be eliminated by
the linker. This matches what GCC does with its -fmerge-constants
option, which is enabled at most -O levels.

llvm-svn: 36666
 2007-05-03 16:38:57 +00:00
Chris Lattner
ee99a109d7 revert reid's patch to fix these failures: 
test/CodeGen/CBackend/2007-01-08-ParamAttr-ICmp.ll for PR1099 [DEJAGNU]
Applications/SPASS/SPASS [CBE]
Regression/C/2004-03-15-IndirectGoto [CBE]

llvm-svn: 36664
 2007-05-03 02:57:13 +00:00
Evan Cheng
550881463d Typo. It's checking if V is multiple of 4, not multiple of 3. :-) 
llvm-svn: 36663
 2007-05-03 02:00:18 +00:00
Devang Patel
cd45427a87 Drop 'const' 
llvm-svn: 36662
 2007-05-03 01:11:54 +00:00
Chris Lattner
844e3a4191 match a reassociated form of fnmul. This implements CodeGen/ARM/fnmul.ll 
llvm-svn: 36660
 2007-05-03 00:32:00 +00:00
Chris Lattner
0b2b0185a0 expose HonorSignDependentRoundingFPMathOption to .td files 
llvm-svn: 36658
 2007-05-03 00:27:11 +00:00
Chris Lattner
a3d01187b7 Add a new option. 
llvm-svn: 36657
 2007-05-03 00:16:07 +00:00
Bill Wendling
5a84dca7df Non-algorithmic change. Moved definitions around into separate sections 
for SSE1, SSE2, SSE3, and SSSE3.

llvm-svn: 36656
 2007-05-02 23:11:52 +00:00
Bill Wendling
18b8948839 Update. 
llvm-svn: 36653
 2007-05-02 21:42:20 +00:00
Devang Patel
8ee9065162 Use 'static const char' instead of 'static const int'. 
Due to darwin gcc bug, one version of darwin linker coalesces
static const int, which defauts PassID based pass identification.

llvm-svn: 36652
 2007-05-02 21:39:20 +00:00
Lauro Ramos Venancio
57d03e112b Fix build error. 
llvm-svn: 36648
 2007-05-02 20:37:47 +00:00
Anton Korobeynikov
44aa4c588b Emit correct register move information in eh frames for X86. This allows Shootout-C++/except to pass on x86/linux 
with non-llvm-compiled (e.g. "native") unwind runtime.

llvm-svn: 36647
 2007-05-02 19:53:33 +00:00
Anton Korobeynikov
d1bf4af988 Emit correct DWARF reg # for RA (return address) register 
llvm-svn: 36646
 2007-05-02 08:46:03 +00:00
Reid Spencer
10804f3fcb Make sign extension work correctly for unusual bit widths. 
llvm-svn: 36635
 2007-05-02 02:17:41 +00:00
Dale Johannesen
2a293b718e Add some support for (Darwin) code-generating directives in getInlineAsmLength. 
Support is incomplete, but more accurate than gcc's.

llvm-svn: 36634
 2007-05-02 01:02:40 +00:00
Anton Korobeynikov
6e6bfcaf4d Fix couple of bugs connected with eh info: 
1. Correct output offsets on Linux
2. Fix "style" of personality function. It shouldn't be indirect.

llvm-svn: 36633
 2007-05-01 22:23:12 +00:00
Devang Patel
38a66bc82e Do not use typeinfo to identify pass in pass manager. 
llvm-svn: 36632
 2007-05-01 21:15:47 +00:00
Evan Cheng
01853831d2 Doh. PC displacement is between the constantpool and the add instruction. 
llvm-svn: 36630
 2007-05-01 20:27:19 +00:00
Anton Korobeynikov
f808ab1e97 Use correct PC symbol 
llvm-svn: 36628
 2007-05-01 10:19:31 +00:00
Anton Korobeynikov
82d11e006a Adjust correct EH-related sections 
llvm-svn: 36627
 2007-05-01 10:16:06 +00:00
Evan Cheng
e47ec4d104 eliminateFrameIndex() change. 
llvm-svn: 36626
 2007-05-01 09:13:03 +00:00
Nate Begeman
767ee95d29 llvm bug #1350, parts 1, 2, and 3. 
llvm-svn: 36618
 2007-05-01 05:57:02 +00:00
Evan Cheng
248de25fb5 Under normal circumstances, when a frame pointer is not required, we reserve 
argument space for call sites in the function immediately on entry to the
current function. This eliminates the need for add/sub sp brackets around call
sites. However, this is not always a good idea. If the "call frame" is large and
the target load / store instructions have small immediate field to encode sp
offset, this can cause poor codegen. In the worst case, this can make it
impossible to scavenge a register if the reserved spill slot is pushed too far
apart from sp / fp.

llvm-svn: 36607
 2007-05-01 00:52:08 +00:00
Dale Johannesen
d6f582af9d Remove item: thumb padding in constant islands 
llvm-svn: 36586
 2007-04-30 00:32:06 +00:00
Dale Johannesen
3fe0bbd6fb remove unused variable 
llvm-svn: 36585
 2007-04-30 00:30:48 +00:00
Lauro Ramos Venancio
727156d5f0 Enable protected visibility on ARM. 
llvm-svn: 36583
 2007-04-30 00:23:51 +00:00
Dale Johannesen
7c3b78cf98 Rewrite of Thumb constant islands handling (exact allowance for padding 
around islands and jump tables).

llvm-svn: 36573
 2007-04-29 19:19:30 +00:00
Dale Johannesen
1ee5f128f6 Make ARM-specific version of getInlineAsmLength 
llvm-svn: 36572
 2007-04-29 19:17:45 +00:00
Anton Korobeynikov
3d95e52ea2 Implement protected visibility. This partly implements PR1363. Linker 
should be taught to deal with protected symbols.

llvm-svn: 36565
 2007-04-29 18:35:00 +00:00
Dale Johannesen
0a4acbf6ac change per review 
llvm-svn: 36519
 2007-04-28 00:36:37 +00:00
Dale Johannesen
74feb7979a Prevent Thumb code from generating ARM instructions 
llvm-svn: 36518
 2007-04-27 22:17:18 +00:00
Lauro Ramos Venancio
54544c8835 add parenthesis. 
llvm-svn: 36514
 2007-04-27 20:10:08 +00:00
Evan Cheng
5f4f03b9b9 Doh. ARM::LEApcrel is a single instruction MI. 
llvm-svn: 36513
 2007-04-27 18:27:13 +00:00
Lauro Ramos Venancio
f9641d332a In Thumb mode, the frame register must be R7. 
llvm-svn: 36512
 2007-04-27 17:58:03 +00:00
Lauro Ramos Venancio
f385b56870 ARM TLS: implement "general dynamic", "initial exec" and "local exec" models. 
llvm-svn: 36506
 2007-04-27 13:54:47 +00:00
Evan Cheng
a1593a9ec6 Darwin runtime library does not have these. 
llvm-svn: 36505
 2007-04-27 08:15:43 +00:00
Evan Cheng
2da659afa3 Special handling of LEApcrel and tLEApcrel. 
llvm-svn: 36504
 2007-04-27 08:14:15 +00:00
Evan Cheng
75ed5c5cb2 Back out previous check-in. Incorrect. 
llvm-svn: 36503
 2007-04-27 07:50:02 +00:00
Evan Cheng
b54f757b65 tLEApcrel is a AddrModeTs, i.e. pc relative. 
llvm-svn: 36502
 2007-04-27 07:37:22 +00:00
Dan Gohman
6cd8e14d68 Fix PR1339 and CodeGen/X86/dollar-name.ll 
llvm-svn: 36495
 2007-04-26 21:07:05 +00:00
Bill Wendling
d380bc565b Have MMX registers clobbered in x86-64 too. 
llvm-svn: 36494
 2007-04-26 21:06:48 +00:00
Evan Cheng
eff332e3e1 Rename findRegisterUseOperand to findRegisterUseOperandIdx to avoid confusion. 
llvm-svn: 36483
 2007-04-26 19:00:32 +00:00
Evan Cheng
c6fa6cb4c5 Fix for PR1348. If stack inc / dec amount is > 32-bits, issue a series of add / sub instructions. 
llvm-svn: 36456
 2007-04-26 01:09:28 +00:00
Evan Cheng
7f44e880dc Match MachineFunction::UsedPhysRegs changes. 
llvm-svn: 36452
 2007-04-25 22:13:27 +00:00
Bill Wendling
552e4ff1be Add SSSE3 as a feature of Core2. Add MMX registers to the list of registers 
clobbered by a call.

llvm-svn: 36448
 2007-04-25 21:31:48 +00:00
Chris Lattner
fd730d86e3 do the multiplication as signed, so that 2*-2 == -4 instead of 4294967292 
when promoted to 64-bits

llvm-svn: 36442
 2007-04-25 17:23:53 +00:00
Lauro Ramos Venancio
d922b8ca9b remember to emit weak reference in one more case. 
llvm-svn: 36438
 2007-04-25 14:50:40 +00:00
Anton Korobeynikov
25dc9a61cb Implement aliases. This fixes PR1017 and it's dependent bugs. CFE part 
will follow.

llvm-svn: 36435
 2007-04-25 14:27:10 +00:00
Evan Cheng
de9468373e Relex assertions to account for additional implicit def / use operands. 
llvm-svn: 36430
 2007-04-25 07:12:14 +00:00
Chris Lattner
ca7480e8cb support for >4G stack frames 
llvm-svn: 36425
 2007-04-25 04:30:24 +00:00
Chris Lattner
452294cb99 support >4G stack frames 
llvm-svn: 36423
 2007-04-25 04:25:10 +00:00
Chris Lattner
583fd8343e Fix PR1351 and CodeGen/PowerPC/2007-04-24-InlineAsm-I-Modifier.ll 
llvm-svn: 36410
 2007-04-24 22:51:03 +00:00
Bill Wendling
8127d9ce82 Update. 
llvm-svn: 36407
 2007-04-24 21:20:03 +00:00
Bill Wendling
54134a37e0 Add the PADDQ to the list. 
llvm-svn: 36406
 2007-04-24 21:19:14 +00:00
Bill Wendling
498c102df6 Add the final MMX instructions. Correct a few wrong patterns. 
llvm-svn: 36405
 2007-04-24 21:18:37 +00:00
Bill Wendling
fed8496c6b Remove some invalid instructions from this check. 
llvm-svn: 36404
 2007-04-24 21:17:46 +00:00
Bill Wendling
6856e741fa Support for the special case of a vector with the canonical form: 
vector_shuffle v1, v2, <2, 6, 3, 7>

I.e.

         vector_shuffle v, undef, <2, 2, 3, 3>

MMX only has a shuffle for v4i16 vectors. It needs to use the unpackh for
this type of operation.

llvm-svn: 36403
 2007-04-24 21:16:55 +00:00
Dale Johannesen
5f27e8bcc4 Make Thumb funcs containing islands 4-byte aligned. Fix bugs maintaining 
BBOffsets and BBSizes when adjusting conditional branches.

llvm-svn: 36372
 2007-04-23 20:09:04 +00:00
Dale Johannesen
f7d3443fa7 add Align field, and use when generating function alignment 
llvm-svn: 36371
 2007-04-23 20:07:25 +00:00
Dale Johannesen
9dce0dffd1 add isThumb (unused as yet) 
llvm-svn: 36370
 2007-04-23 20:04:35 +00:00
Dale Johannesen
b51e8d6592 Fix generic getInlineAsmLength 
llvm-svn: 36369
 2007-04-23 20:00:17 +00:00
Lauro Ramos Venancio
b75c6c5cbc X86 TLS: optimize the implementation of "local exec" model. 
llvm-svn: 36359
 2007-04-23 01:28:10 +00:00
Lauro Ramos Venancio
b1a101f0e7 X86 TLS: fix and optimize the implementation of "initial exec" model. 
llvm-svn: 36355
 2007-04-22 22:50:52 +00:00
Christopher Lamb
4bc6053376 Support alignment queries for degenerate (length 1) vectors. 
llvm-svn: 36352
 2007-04-22 21:54:13 +00:00
Lauro Ramos Venancio
f8b49e5ee0 Implement PIC for arm-linux. 
llvm-svn: 36324
 2007-04-22 00:04:12 +00:00
Lauro Ramos Venancio
3b60b9546e X86 TLS: Implement review feedback. 
llvm-svn: 36318
 2007-04-21 20:56:26 +00:00
Jeff Cohen
2afa206eb3 Comment out usage of write() for now. 
llvm-svn: 36287
 2007-04-20 22:40:10 +00:00
Lauro Ramos Venancio
bc32d90b46 Implement "general dynamic", "initial exec" and "local exec" TLS models for 
X86 32 bits.

llvm-svn: 36283
 2007-04-20 21:38:10 +00:00
Evan Cheng
20c6a03b60 Specify S registers as D registers' sub-registers. 
llvm-svn: 36280
 2007-04-20 21:20:10 +00:00
Evan Cheng
a7f94abf95 Specify sub-register relations. e.g. RAX: [EAX], EAX: [AX], AX: [AL,AH]. 
llvm-svn: 36279
 2007-04-20 21:15:21 +00:00
Evan Cheng
842e2c48a0 Add sub-registers sets. 
llvm-svn: 36278
 2007-04-20 21:13:46 +00:00
Chris Lattner
f7ac47b4e2 add a crazy idea 
llvm-svn: 36273
 2007-04-20 20:18:43 +00:00
Jeff Cohen
a2a6fab9b5 Make Microsoft assembler and linker happy. 
llvm-svn: 36265
 2007-04-20 00:33:54 +00:00
Chris Lattner
4741020380 Fix a message, patch by Christopher Lamb. 
llvm-svn: 36264
 2007-04-19 18:42:38 +00:00
Lauro Ramos Venancio
5e0a3ef555 Fix a bug in getFrameRegister. 
Reported by Raul Herbster.

llvm-svn: 36262
 2007-04-19 14:09:38 +00:00
Dan Gohman
bdb94669ba Fix the spelling of the prefetchnta instruction. 
llvm-svn: 36256
 2007-04-18 14:09:14 +00:00
Evan Cheng
fe5856c4f3 Oops. Didn't mean to check in a quick hack. 
llvm-svn: 36227
 2007-04-17 23:33:39 +00:00
Chris Lattner
87296c2580 dag combiner just got better at pruning bits. This fixes CodeGen/ARM/rev.ll 
llvm-svn: 36222
 2007-04-17 22:39:58 +00:00
Evan Cheng
023342b277 Change getAllocatableSet() so it returns allocatable registers for a specific register class. 
llvm-svn: 36215
 2007-04-17 20:23:34 +00:00
Anton Korobeynikov
60de2ce283 Add comment 
llvm-svn: 36213
 2007-04-17 19:34:00 +00:00
Chris Lattner
af5c203dbd add a note 
llvm-svn: 36203
 2007-04-17 18:03:00 +00:00
Chris Lattner
c7109ece27 rename X86FunctionInfo to X86MachineFunctionInfo to match the header file 
it is defined in.

llvm-svn: 36196
 2007-04-17 17:21:52 +00:00
Anton Korobeynikov
9bc4b792bf Implemented correct stack probing on mingw/cygwin for dynamic alloca's. 
Also, fixed static case in presence of eax livin. This fixes PR331

PS: Why don't we still have push/pop instructions? :)
llvm-svn: 36195
 2007-04-17 09:20:00 +00:00
Andrew Lenharth
c894d4e3ce Use this nifty Constraints thing and fix the inverted conditional moves 
llvm-svn: 36191
 2007-04-17 04:07:59 +00:00
Chris Lattner
be225f5300 SSE4 is apparently public now. 
llvm-svn: 36185
 2007-04-17 00:02:37 +00:00
Jeff Cohen
279c95b9a7 In the event that some really old non-Intel or -AMD CPU is encountered... 
llvm-svn: 36177
 2007-04-16 21:59:44 +00:00
Jeff Cohen
e6b60c9525 Before assuming that the original code didn't work for Athlon64, the person who 
replaced it with a FIXME should have determined what did work.  Then he would have
realized that the code was in fact correct, and would have avoided breaking it.

llvm-svn: 36173
 2007-04-16 21:48:58 +00:00
Anton Korobeynikov
f3e62a428a Removed tabs everywhere except autogenerated & external files. Add make 
target for tabs checking.

llvm-svn: 36146
 2007-04-16 18:10:23 +00:00
Reid Spencer
969393b105 For PR1336: 
Subtarget option names must be given in lower case in order to be
recognized. Fixes test/CodeGen/Alpha/ctlz.ll

llvm-svn: 36125
 2007-04-16 14:06:19 +00:00
Chris Lattner
6fbfbf6622 add a note 
llvm-svn: 36028
 2007-04-14 23:06:09 +00:00
Jeff Cohen
3ffd34cac6 Silence VC++ warning. 
llvm-svn: 35975
 2007-04-13 22:52:03 +00:00
Chris Lattner
e7cab7b7a4 arm has r+r*s and r+i addr modes, but no r+i+r*s addr modes. 
llvm-svn: 35962
 2007-04-13 06:50:55 +00:00
Reid Spencer
d31093d340 Implement review feedback .. don't double search a set. 
llvm-svn: 35957
 2007-04-12 21:57:15 +00:00
Reid Spencer
0325471d3c Provide support for intrinsics that lower themselves to a function body. 
This can happen for intrinsics that are overloaded.  In such cases it is
necessary to emit a function prototype before the body of the function
that calls the intrinsic and to ensure we don't emit it multiple times.

llvm-svn: 35954
 2007-04-12 21:00:45 +00:00
Lauro Ramos Venancio
6c5f53f6ac Implement Thread Local Storage (TLS) in CBackend. 
llvm-svn: 35951
 2007-04-12 18:42:08 +00:00
Chris Lattner
2b6b79b896 Fix mmx paddq, add support for the 'y' register class, though it isn't tested. 
llvm-svn: 35940
 2007-04-12 04:14:49 +00:00
Chris Lattner
b97b122176 Fix CodeGen/X86/2007-03-24-InlineAsmPModifier.ll 
llvm-svn: 35926
 2007-04-11 22:29:46 +00:00
Chris Lattner
e9a9a3f172 Fix incorrect fall-throughs in addr mode code. This fixes CodeGen/ARM/arm-negative-stride.ll 
llvm-svn: 35909
 2007-04-11 16:17:12 +00:00
Chris Lattner
b7448f6187 done 
llvm-svn: 35884
 2007-04-11 05:34:00 +00:00
Reid Spencer
2792e203c5 For PR1146: 
Put the parameter attributes in their own ParamAttr name space. Adjust the
rest of llvm as a result.

llvm-svn: 35877
 2007-04-11 02:44:20 +00:00
Bill Wendling
3b1189afbf Add support for our first SSSE3 instruction "pmulhrsw". 
llvm-svn: 35869
 2007-04-10 22:10:25 +00:00
Chris Lattner
60f3ece40f new micro optzn 
llvm-svn: 35867
 2007-04-10 21:14:01 +00:00
Chris Lattner
3bbd376057 restore support for negative strides 
llvm-svn: 35859
 2007-04-10 03:48:29 +00:00
Chris Lattner
98199016ae remove dead target hooks 
llvm-svn: 35846
 2007-04-09 23:33:39 +00:00
Chris Lattner
3f9ff05309 remove some dead hooks 
llvm-svn: 35845
 2007-04-09 23:31:19 +00:00
Chris Lattner
ae6e2c0ee5 remove some dead target hooks, subsumed by isLegalAddressingMode 
llvm-svn: 35840
 2007-04-09 22:27:04 +00:00
Chris Lattner
b4ef9c8be3 Fix a bug in PPCTargetLowering::isLegalAddressingMode, scales other than 0/1/2 
are always unsupported.

llvm-svn: 35835
 2007-04-09 22:10:05 +00:00
Jeff Cohen
f489bef844 When the number of elements is zero, don't malloc 32GB on 64-bit systems. 
Fixes unexpected failures on FreeBSD/amd64 of:
  CFrontend/2005-09-24-BitFieldCrash.c:
  CFrontend/2007-02-04-EmptyStruct.c:
  CFrontend/2007-03-26-ZeroWidthBitfield.c:
  CodeGen/Generic/2005-10-18-ZeroSizeStackObject.ll:

llvm-svn: 35828
 2007-04-09 19:26:30 +00:00
Reid Spencer
2660b8dccb For PR1146: 
Adapt handling of parameter attributes to use the new ParamAttrsList class.

llvm-svn: 35814
 2007-04-09 06:17:21 +00:00
Chris Lattner
de148c7887 move a bunch of register constraints from being handled by 
getRegClassForInlineAsmConstraint to being handled by
getRegForInlineAsmConstraint.  This allows us to let the llvm register allocator
allocate, which gives us better code.  For example, X86/2007-01-29-InlineAsm-ir.ll
used to compile to:

_run_init_process:
        subl $4, %esp
        movl %ebx, (%esp)
        xorl %ebx, %ebx
        movl $11, %eax
        movl %ebx, %ecx
        movl %ebx, %edx
        # InlineAsm Start
        push %ebx ; movl %ebx,%ebx ; int $0x80 ; pop %ebx
        # InlineAsm End

Now we get:
_run_init_process:
        xorl %ecx, %ecx
        movl $11, %eax
        movl %ecx, %edx
        # InlineAsm Start
        push %ebx ; movl %ecx,%ebx ; int $0x80 ; pop %ebx
        # InlineAsm End

llvm-svn: 35804
 2007-04-09 05:49:22 +00:00
Chris Lattner
b940a717ac implement support for CodeGen/X86/inline-asm-x-scalar.ll:test3 - i32/i64 values 
used with x constraints.

llvm-svn: 35803
 2007-04-09 05:31:48 +00:00
Chris Lattner
e2d3bf8ecf implement CodeGen/X86/inline-asm-x-scalar.ll 
llvm-svn: 35799
 2007-04-09 05:11:28 +00:00
Reid Spencer
a72beea861 Squelch a warning about mismatch between sign of constant and sign of return 
type.

llvm-svn: 35674
 2007-04-04 22:07:24 +00:00
Evan Cheng
44488cb676 Implement inline asm modifier P. 
llvm-svn: 35640
 2007-04-04 00:13:29 +00:00
Evan Cheng
d5956e4409 Typo. 
llvm-svn: 35639
 2007-04-04 00:06:07 +00:00
Bill Wendling
a4aa65bc38 Adding more MMX instructions. 
llvm-svn: 35638
 2007-04-03 23:48:32 +00:00
Chris Lattner
78271f0596 make a new missing features section 
llvm-svn: 35637
 2007-04-03 23:41:34 +00:00
Evan Cheng
2cd9df6983 Remove unused constant pool entries. 
llvm-svn: 35635
 2007-04-03 23:39:48 +00:00
Bill Wendling
ff2c460267 Updated 
llvm-svn: 35634
 2007-04-03 23:37:20 +00:00
Evan Cheng
db15aa24f9 Fixed a bug that causes codegen of noop like add r0, r0, #0. 
llvm-svn: 35627
 2007-04-03 21:31:21 +00:00
Nicolas Geoffray
681a87d9e8 Starting implementation of the ELF32 ABI specification of varargs handling. 
LowerVASTART emits the right code if the subtarget is ELF32, the other intrinsics
(VAARG, VACOPY and VAEND) are not yet implemented.

llvm-svn: 35625
 2007-04-03 13:59:52 +00:00
Nicolas Geoffray
5897c064a6 The PPC64 ELF ABI is "intended to use the same structure layout and calling convention rules 
as the 64-bit PowerOpen ABI" (Reference http://www.linux-foundation.org/spec/ELF/ppc64/).
Change all ELF tests to ELF32.

llvm-svn: 35624
 2007-04-03 12:35:28 +00:00
Nicolas Geoffray
45c3620d12 Addition to the previous commit for getCalleeSavedRegClasses: 
"The ELF ABI specifies F1-F8 registers as argument registers for double, not
F1-F10. This affects only ELF, not MachO."

llvm-svn: 35623
 2007-04-03 10:57:49 +00:00
Nicolas Geoffray
b7c0895529 The ELF ABI specifies F1-F8 registers as argument registers for double, not 
F1-F10. This affects only ELF, not MachO.

llvm-svn: 35622
 2007-04-03 10:27:07 +00:00
Evan Cheng
16696f0ad8 Inverted logic. 
llvm-svn: 35619
 2007-04-03 06:44:25 +00:00
Bill Wendling
a2eabd50c0 Changed to new MMX_ recipes. 
llvm-svn: 35617
 2007-04-03 06:18:31 +00:00
Bill Wendling
ca2124e5a9 Add FEMMS and ADDQ. Renamed MMX recipes to prepend the MMX_ to them. 
llvm-svn: 35616
 2007-04-03 06:00:37 +00:00
Chris Lattner
4d702a890c Arm supports negative strides as well, add them. This lets us compile: 
CodeGen/ARM/arm-negative-stride.ll to:

LBB1_2: @bb
        str r1, [r3, -r0, lsl #2]
        add r0, r0, #1
        cmp r0, r2
        bne LBB1_2      @bb

llvm-svn: 35609
 2007-04-03 00:13:57 +00:00
Dale Johannesen
e1c3dc7c78 fix off by 1 error in displacement computation 
llvm-svn: 35602
 2007-04-02 20:31:06 +00:00
Chris Lattner
726d461daf fix the CodeGen/ARM/2007-03-13-InstrSched.ll regression: allow IV's with scales 
to be folded into non-store instructions.

llvm-svn: 35601
 2007-04-02 18:51:18 +00:00
Chris Lattner
ff9caac83e add support for the 'w' inline asm register class. 
llvm-svn: 35598
 2007-04-02 17:24:08 +00:00
Chris Lattner
dbce9ef4b8 Fix a bug which caused us to never be able to use signed comparisons for 
equality comparisons of a constant.  This allows us to codegen the 'sintzero'
loop in PR1288 as:

LBB1_1: ;cond_next
        li r4, 0
        addi r2, r2, 1
        stw r4, 0(r3)
        addi r3, r3, 4
        cmpwi cr0, r2, -1
        bne cr0, LBB1_1 ;cond_next

instead of:

LBB1_1: ;cond_next
        addi r2, r2, 1
        li r4, 0
        xoris r5, r2, 65535
        stw r4, 0(r3)
        addi r3, r3, 4
        cmplwi cr0, r5, 65535
        bne cr0, LBB1_1 ;cond_next

This implements CodeGen/PowerPC/compare-simm.ll, and also cuts 74
instructions out of kc++.

llvm-svn: 35590
 2007-04-02 05:59:42 +00:00
Lauro Ramos Venancio
7e21418680 - Divides the comparisons in two types: comparisons that only use N and Z 
flags (ARMISD::CMPNZ) and comparisons that use all flags (ARMISD::CMP).
- Defines the instructions: TST, TEQ (ARM) and TST (Thumb).

llvm-svn: 35573
 2007-04-02 01:30:03 +00:00
Chris Lattner
4fb170e47b fix breakage from last night, simplify code. 
llvm-svn: 35560
 2007-04-01 20:49:36 +00:00
Evan Cheng
949a34fbad Add i16 address mode. 
llvm-svn: 35551
 2007-04-01 08:06:46 +00:00
Andrew Lenharth
ff1ff37be9 Readme 
llvm-svn: 35533
 2007-03-31 15:05:44 +00:00
Anton Korobeynikov
db09256c9f Consistency with native compilers 
llvm-svn: 35532
 2007-03-31 13:11:52 +00:00
Bill Wendling
8f16f4bf9c Fix comment. 
llvm-svn: 35531
 2007-03-31 09:36:12 +00:00
Chris Lattner
cea5e599ed add a note 
llvm-svn: 35530
 2007-03-31 07:06:25 +00:00
Bill Wendling
0cba5d3c15 Match GCC's MMX calling convention. 
llvm-svn: 35523
 2007-03-31 01:03:53 +00:00
Chris Lattner
c0405a348d implement the new addressing mode description hook. 
llvm-svn: 35521
 2007-03-30 23:15:24 +00:00
Bill Wendling
503f3e41f6 Add MMX calling conventions. 
llvm-svn: 35489
 2007-03-30 00:35:22 +00:00
Evan Cheng
526a67c09b New entry. 
llvm-svn: 35480
 2007-03-29 21:40:13 +00:00
Evan Cheng
3a6b488265 Can't re-materialize mov r, imm in thumb since mov would clobber the condition code. 
llvm-svn: 35479
 2007-03-29 21:38:31 +00:00
Jeff Cohen
67dbe2064f MS C does have inlining after all, just uses _inline instead of inline. 
llvm-svn: 35467
 2007-03-29 17:42:21 +00:00
Evan Cheng
bde0409264 Add support for hidden visibility to darwin/arm. 
llvm-svn: 35448
 2007-03-29 07:49:34 +00:00
Jeff Cohen
9193778f39 Fix C Backend to generate code that works with Microsoft C for the benefit of 
front ends that do not depend on the GCC runtime (someday...).

llvm-svn: 35441
 2007-03-28 23:08:37 +00:00
Bill Wendling
0549ae5cdb Made this into a bug report: PR1286 
llvm-svn: 35439
 2007-03-28 19:07:34 +00:00
Anton Korobeynikov
1a8740c88b Oops :) 
llvm-svn: 35438
 2007-03-28 18:38:33 +00:00
Anton Korobeynikov
d59c4e54c7 Don't allow MatchAddress recurse too much. This trims exponential 
behaviour in some cases.

llvm-svn: 35437
 2007-03-28 18:36:33 +00:00
Chris Lattner
a710f7442c add a note 
llvm-svn: 35435
 2007-03-28 18:17:19 +00:00
Chris Lattner
26a37bfd6a Compile CodeGen/X86/lea-3.ll:test2 to: 
_test3:
        leaq (,%rdi,4), %rax
        orq %rdi, %rax
        ret

instead of:
_test2:
        movq %rdi, %rax
        shlq $2, %rax
        orq %rdi, %rax
        ret

llvm-svn: 35434
 2007-03-28 18:12:31 +00:00
Chris Lattner
1f18012438 Dan pointed out that this is done, remove it! 
llvm-svn: 35430
 2007-03-28 17:26:52 +00:00
Scott Michel
ae7090641f First test check-in. 
llvm-svn: 35429
 2007-03-28 17:04:43 +00:00
Evan Cheng
a55449c051 Remove isLegalAddressImmediate. 
llvm-svn: 35406
 2007-03-28 01:53:55 +00:00
Bill Wendling
e8eccb1684 Remove cruft I put in there... 
llvm-svn: 35394
 2007-03-28 01:02:54 +00:00
Chris Lattner
9f59529c61 Fix a problem building llvm-gcc on amd64-unknown-freebsd6.2, due to the 
system assembler not groking legal instructions like "leal (,%esi,8), %ecx".

llvm-svn: 35393
 2007-03-28 00:58:40 +00:00