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1875 Commits

Author SHA1 Message Date
Chris Lattner
9fbe5b6a51 Fix two bugs in my patch earlier today that broke int->fp conversion on X86. 
llvm-svn: 23522
 2005-09-29 06:44:39 +00:00
Jeff Cohen
e070c04df0 Silence VC++ redeclaration warnings. 
llvm-svn: 23516
 2005-09-29 01:59:49 +00:00
Chris Lattner
61f3785147 Add FP versions of the binary operators, keeping the int and fp worlds seperate. 
Though I have done extensive testing, it is possible that this will break
things in configs I can't test.  Please let me know if this causes a problem
and I'll fix it ASAP.

llvm-svn: 23504
 2005-09-28 22:28:18 +00:00
Chris Lattner
4655e9de38 If the target prefers it, use _setjmp/_longjmp should be used instead of setjmp/longjmp for llvm.setjmp/llvm.longjmp. 
llvm-svn: 23481
 2005-09-27 22:15:53 +00:00
Jim Laskey
5a82322c66 Remove some redundancies. 
llvm-svn: 23469
 2005-09-27 17:32:45 +00:00
Jim Laskey
22a1f0f44b Addition of a simple two pass scheduler. This version is currently hacked up 
for testing and will require target machine info to do a proper scheduling.
The simple scheduler can be turned on using -sched=simple (defaults
to -sched=none)

llvm-svn: 23455
 2005-09-26 21:57:04 +00:00
Chris Lattner
be817baed9 Turn (X^C1) == C2 into X == C1^C2 iff X&~C1 = 0 (and move a function) 
This happens all the time on PPC for bool values, e.g. eliminating a xori
in inverted-bool-compares.ll.

This should be added to the dag combiner as well.

llvm-svn: 23403
 2005-09-23 00:55:52 +00:00
Chris Lattner
288e5b0a7d Expose the LiveInterval interfaces as public headers. 
llvm-svn: 23400
 2005-09-21 04:19:09 +00:00
Nate Begeman
236df45f1b Stub out the rest of the DAG Combiner. Just need to fill in the 
select_cc bits and then wrap it in a convenience function for  use with
regular select.

llvm-svn: 23389
 2005-09-19 22:34:01 +00:00
Chris Lattner
59dd979162 Teach the local spiller to turn stack slot loads into register-register copies 
when possible, avoiding the load (and avoiding the copy if the value is already
in the right register).

This patch came about when I noticed code like the following being generated:

  store R17 -> [SS1]
  ...blah...
  R4 = load [SS1]

This was causing an LSU reject on the G5.  This problem was due to the register
allocator folding spill code into a reg-reg copy (producing the load), which
prevented the spiller from being able to rewrite the load into a copy, despite
the fact that the value was already available in a register.  In the case
above, we now rip out the R4 load and replace it with a R4 = R17 copy.

This speeds up several programs on X86 (which spills a lot :) ), e.g.
smg2k from 22.39->20.60s, povray from 12.93->12.66s, 168.wupwise from
68.54->53.83s (!), 197.parser from 7.33->6.62s (!), etc.  This may have a larger
impact in some cases on the G5 (by avoiding LSU rejects), though it probably
won't trigger as often (less spilling in general).

Targets that implement folding of loads/stores into copies should implement
the isLoadFromStackSlot hook to get this.

llvm-svn: 23388
 2005-09-19 06:56:21 +00:00
Nate Begeman
d733cf7e8b More DAG combining. Still need the branch instructions, and select_cc 
llvm-svn: 23371
 2005-09-16 00:54:12 +00:00
Chris Lattner
49669dd169 If a function has liveins, and if the target requested that they be plopped 
into particular vregs, emit copies into the entry MBB.

llvm-svn: 23331
 2005-09-13 19:30:54 +00:00
Chris Lattner
38fb15db44 Allow targets to say they don't support truncstore i1 (which includes a mask 
when storing to an 8-bit memory location), as most don't.

llvm-svn: 23303
 2005-09-10 00:20:18 +00:00
Chris Lattner
52a8cb35e6 Add a missing #include, patch courtesy of Baptiste Lepilleur. 
llvm-svn: 23302
 2005-09-09 23:53:39 +00:00
Chris Lattner
cae9229d6e Fix a problem duraid encountered on itanium where this folding: 
select (x < y), 1, 0 -> (x < y) incorrectly: the setcc returns i1 but the
select returned i32.  Add the zero extend as needed.

llvm-svn: 23301
 2005-09-09 23:00:07 +00:00
Chris Lattner
85884e9b8a Fix a crash viewing dags that have target nodes in them 
llvm-svn: 23300
 2005-09-09 22:35:03 +00:00
Chris Lattner
e7610bc599 Use continue in the use-processing loop to make it clear what the early exits 
are, simplify logic, and cause things to not be nested as deeply.  This also
uses MRI->areAliases instead of an explicit loop.

No functionality change, just code cleanup.

llvm-svn: 23296
 2005-09-09 20:29:51 +00:00
Nate Begeman
8422b3637e Last round of 2-node folds from SD.cpp. Will move on to 3 node ops such 
as setcc and select next.

llvm-svn: 23295
 2005-09-09 19:49:52 +00:00
Chris Lattner
fc17fe0e6d remove debugging code *slaps head* 
llvm-svn: 23294
 2005-09-09 19:19:20 +00:00
Chris Lattner
8d8506f8e2 When spilling a live range that is used multiple times by one instruction, 
only add a reload live range once for the instruction.  This is one step
towards fixing a regalloc pessimization that Nate notice, but is later undone
by the spiller (so no code is changed).

llvm-svn: 23293
 2005-09-09 19:17:47 +00:00
Nate Begeman
1675c67c62 Move yet more folds over to the dag combiner from sd.cpp 
llvm-svn: 23278
 2005-09-08 20:18:10 +00:00
Nate Begeman
c0f764ada4 Another round of dag combiner changes. This fixes some missing XOR folds 
as well as fixing how we replace old values with new values.

llvm-svn: 23260
 2005-09-07 23:25:52 +00:00
Chris Lattner
b3516c123f Fix a bug that Tzu-Chien Chiu noticed: live interval analysis does NOT 
preserve livevar

llvm-svn: 23259
 2005-09-07 17:34:39 +00:00
Nate Begeman
e8db0c961a Implement a common missing fold, (add (add x, c1), c2) -> (add x, c1+c2). 
This restores all of stanford to being identical with and without the dag
combiner with the add folding turned off in sd.cpp.

llvm-svn: 23258
 2005-09-07 16:09:19 +00:00
Chris Lattner
482f71733a Fix a bug nate ran into with replacealluseswith. In the recursive cse case, 
we were losing a node, causing an assertion to fail.  Now we eagerly delete
discovered CSE's, and provide an optional vector to keep track of these
discovered equivalences.

llvm-svn: 23255
 2005-09-07 05:37:01 +00:00
Nate Begeman
143dc2039d Add an option to the DAG Combiner to enable it for beta runs, and turn on 
that option for PowerPC's beta.

llvm-svn: 23253
 2005-09-07 00:15:36 +00:00
Nate Begeman
e1a34193fa Next round of DAGCombiner changes. This version now passes all the tests 
I have run so far when run before Legalize.  It still needs to pick up the
SetCC folds, and nodes that use SetCC.

llvm-svn: 23243
 2005-09-06 04:43:02 +00:00
Chris Lattner
29929a3745 Fix a checking failure in gs 
llvm-svn: 23235
 2005-09-03 01:04:40 +00:00
Nate Begeman
613f777bbc Next round of DAG Combiner changes. Just need to support multiple return 
values, and then we should be able to hook it up.

llvm-svn: 23231
 2005-09-02 21:18:40 +00:00
Chris Lattner
da97aa059c Clean up some code from the last checkin 
llvm-svn: 23229
 2005-09-02 20:32:45 +00:00
Chris Lattner
4c2b614aa6 Fix a bug in legalize where it would emit two calls to libcalls that return 
i64 values on targets that need that expanded to 32-bit registers.  This fixes
PowerPC/2005-09-02-LegalizeDuplicatesCalls.ll and speeds up 189.lucas from
taking 122.72s to 81.96s on my desktop.

llvm-svn: 23228
 2005-09-02 20:26:58 +00:00
Chris Lattner
17b67e5137 Make sure to auto-cse nullary ops 
llvm-svn: 23224
 2005-09-02 19:36:17 +00:00
Chris Lattner
7995b70148 Fix some buggy logic where we would try to remove nodes with two operands 
from the binary ops map, even if they had multiple results.  This latent bug
caused a few failures with the dag isel last night.

To prevent stuff like this from happening in the future, add some really
strict checking to make sure that the CSE maps always match up with reality!

llvm-svn: 23221
 2005-09-02 19:15:44 +00:00
Chris Lattner
365774f457 Don't create zero sized stack objects even for array allocas with a zero 
number of elements.

llvm-svn: 23219
 2005-09-02 18:41:28 +00:00
Chris Lattner
7d89863a77 Fix the release build, noticed by Eric van Riet Paap 
llvm-svn: 23215
 2005-09-02 07:09:28 +00:00
Chris Lattner
86bed2f90b Make sure to legalize assert[zs]ext's operand correctly 
llvm-svn: 23208
 2005-09-02 01:15:01 +00:00
Chris Lattner
4919477f39 Teach live intervals to not crash on dead livein regs 
llvm-svn: 23206
 2005-09-02 00:20:32 +00:00
Chris Lattner
8a6c15f4f4 For values that are live across basic blocks and need promotion, use ANY_EXTEND 
instead of ZERO_EXTEND to eliminate extraneous extensions.  This eliminates
dead zero extensions on formal arguments and other cases on PPC, implementing
the newly tightened up test/Regression/CodeGen/PowerPC/small-arguments.ll test.

llvm-svn: 23205
 2005-09-02 00:19:37 +00:00
Chris Lattner
aae61e684c legalize ANY_EXTEND appropriately 
llvm-svn: 23204
 2005-09-02 00:18:10 +00:00
Chris Lattner
3f7fbe14a8 Add support for ANY_EXTEND and add a few minor folds for it 
llvm-svn: 23203
 2005-09-02 00:17:32 +00:00
Nate Begeman
626c46f8d9 Fix some code in the current node combining code, spotted when it was moved 
over to DAGCombiner.cpp

1. Don't assume that SetCC returns i1 when folding (xor (setcc) constant)
2. Don't duplicate code in folding AND with AssertZext that is handled by
   MaskedValueIsZero

llvm-svn: 23196
 2005-09-01 23:25:49 +00:00
Nate Begeman
18f456b8e3 Implement first round of feedback from chris (there's still a couple things 
left to do).

llvm-svn: 23195
 2005-09-01 23:24:04 +00:00
Chris Lattner
f2b775d686 It is NDEBUG not _NDEBUG 
llvm-svn: 23186
 2005-09-01 18:44:10 +00:00
Nate Begeman
517e40a5bb Add the rest of the currently implemented visit routines to the switch 
statement in visit().

llvm-svn: 23185
 2005-09-01 00:33:32 +00:00
Nate Begeman
be2fa8f86f First pass at the DAG Combiner. It isn't used anywhere yet, but it should 
be mostly functional.  It currently has all folds from SelectionDAG.cpp
that do not involve a condition code.

llvm-svn: 23184
 2005-09-01 00:19:25 +00:00
Chris Lattner
b8dcea186c If a function has live ins/outs, print them 
llvm-svn: 23181
 2005-08-31 22:34:59 +00:00
Chris Lattner
fc612f96ec Allow targets to custom expand shifts that are too large for their registers 
llvm-svn: 23173
 2005-08-31 19:01:53 +00:00
Jeff Cohen
8c454a3024 Fix VC++ precedence warnings 
llvm-svn: 23169
 2005-08-31 02:47:06 +00:00
Nate Begeman
64ea782435 Sigh, not my day. Fix typo. 
llvm-svn: 23166
 2005-08-31 00:43:49 +00:00
Nate Begeman
d286f16856 Fix a mistake in my previous patch pointed out by sabre; the AssertZext 
case in MaskedValueIsZero was wrong.

llvm-svn: 23165
 2005-08-31 00:43:08 +00:00
Nate Begeman
d754412b26 Remove some unnecessary casts, and add the AssertZext case to 
MaskedValueIsZero.

llvm-svn: 23164
 2005-08-31 00:27:53 +00:00
Chris Lattner
87d45af685 Allow physregs to occur in the dag with multiple types. Though I don't likethis, it is a requirement on PPC, which can have an f32 value in r3 at onepoint in a function and a f64 value in r3 at another point. :( 
This fixes compilation of mesa

llvm-svn: 23161
 2005-08-30 22:38:38 +00:00
Chris Lattner
36461b2e37 When checking the fixed intervals, don't forget to check for register aliases. 
This fixes PR621 and Regression/CodeGen/X86/2005-08-30-RegAllocAliasProblem.ll

llvm-svn: 23158
 2005-08-30 21:03:36 +00:00
Chris Lattner
6a990c392c Fix FreeBench/fourinarow with the dag isel, by not adding a bogus result 
to SHIFT_PARTS nodes

llvm-svn: 23151
 2005-08-30 17:21:17 +00:00
Chris Lattner
772c8814b6 Fix a miscompile of PtrDist/bc. Sign extending bools is not the right thing, 
at least tends to expose problems elsewhere.

llvm-svn: 23149
 2005-08-30 16:56:19 +00:00
Nate Begeman
25755f7f00 Remove a bogus piece of my AssertSext/AssertZext patch. oops. 
llvm-svn: 23148
 2005-08-30 02:54:28 +00:00
Nate Begeman
dc36f47d99 Add support for AssertSext and AssertZext, folding other extensions with 
them.  This allows for elminination of redundant extends in the entry
blocks of functions on PowerPC.

Add support for i32 x i32 -> i64 multiplies, by recognizing when the inputs
to ISD::MUL in ExpandOp are actually just extended i32 values and not real
i64 values.  this allows us to codegen

int mulhs(int a, int b) { return ((long long)a * b) >> 32; }
as:
_mulhs:
        mulhw r3, r4, r3
        blr

instead of:
_mulhs:
        mulhwu r2, r4, r3
        srawi r5, r3, 31
        mullw r5, r4, r5
        add r2, r2, r5
        srawi r4, r4, 31
        mullw r3, r4, r3
        add r3, r2, r3
        blr

with a similar improvement on x86.

llvm-svn: 23147
 2005-08-30 02:44:00 +00:00
Chris Lattner
a611caeec8 Name this variable to be what it really is! 
llvm-svn: 23145
 2005-08-30 01:58:51 +00:00
Chris Lattner
56051a0f92 Handle CopyToReg nodes with flag operands correctly 
llvm-svn: 23144
 2005-08-30 01:57:23 +00:00
Chris Lattner
774b9718dc Add a hack to avoid some horrible code in some cases by always emitting 
token chains first.  For this C function:

int test() {
  int i;
  for (i = 0; i < 100000; ++i)
    foo();
}

Instead of emitting this (condition before call)

.LBB_test_1:    ; no_exit
        addi r30, r30, 1
        lis r2, 1
        ori r2, r2, 34464
        cmpw cr2, r30, r2
        bl L_foo$stub
        bne cr2, .LBB_test_1    ; no_exit

Emit this:

.LBB_test_1:    ; no_exit
        bl L_foo$stub
        addi r30, r30, 1
        lis r2, 1
        ori r2, r2, 34464
        cmpw cr0, r30, r2
        bne cr0, .LBB_test_1    ; no_exit

Which makes it so we don't have to save/restore cr2 in the prolog/epilog of
the function.

This also makes the code much more similar to what the pattern isel produces.

llvm-svn: 23135
 2005-08-29 23:21:29 +00:00
Chris Lattner
32609690c3 Add a new API for Nate 
llvm-svn: 23131
 2005-08-29 21:59:31 +00:00
Andrew Lenharth
f580b078b6 Some of us cared about the the promote path 
llvm-svn: 23130
 2005-08-29 20:46:51 +00:00
Chris Lattner
b0e46fa671 Fix an infinite loop on x86 
llvm-svn: 23129
 2005-08-29 17:30:00 +00:00
Chris Lattner
21400573a7 Fix a bug in my previous patch that was using the wrong iterator. This fixes 
Olden/bisort among others.

llvm-svn: 23124
 2005-08-29 00:10:46 +00:00
Chris Lattner
44dcf508a1 Fix a bug in ReplaceAllUsesWith 
llvm-svn: 23122
 2005-08-28 23:59:36 +00:00
Chris Lattner
e0eae3d244 Disable this code, which broke many tests last night 
llvm-svn: 23114
 2005-08-27 16:16:51 +00:00
Chris Lattner
6bf97cff13 fix PHI node emission for basic blocks that have select_cc's in them on ppc32 
llvm-svn: 23113
 2005-08-27 00:58:02 +00:00
Chris Lattner
35a82f5f79 Nate noticed that Andrew never did this. This fixes PR600 
llvm-svn: 23110
 2005-08-26 22:50:40 +00:00
Chris Lattner
e9cc12f5c4 Don't copy regs that are only used in the entry block into a vreg. This 
changes the code generated for:

short %test(short %A) {
  %B = xor short %A, -32768
  ret short %B
}

to:

_test:
        xori r2, r3, 32768
        xoris r2, r2, 65535
        extsh r3, r2
        blr

instead of:

_test:
        rlwinm r2, r3, 0, 16, 31
        xori r2, r3, 32768
        xoris r2, r2, 65535
        extsh r3, r2
        blr

llvm-svn: 23109
 2005-08-26 22:49:59 +00:00
Chris Lattner
5f55dd72af Make this code safe for when loadRegFromStackSlot inserts multiple instructions. 
llvm-svn: 23108
 2005-08-26 22:18:32 +00:00
Chris Lattner
7efca0c312 Checking types here is not safe, because multiple types can map to the same 
register class.

llvm-svn: 23103
 2005-08-26 21:39:15 +00:00
Chris Lattner
faa96209d8 Call the InsertAtEndOfBasicBlock hook if the usesCustomDAGSchedInserter 
flag is set on an instruction.

llvm-svn: 23098
 2005-08-26 20:54:47 +00:00
Chris Lattner
3e0bfc0cc1 Revampt ReplaceAllUsesWith to be more efficient and easier to use. 
llvm-svn: 23087
 2005-08-26 18:36:28 +00:00
Chris Lattner
a31708e6b3 Change ConstantPoolSDNode to actually hold the Constant itself instead of 
putting it into the constant pool.  This allows the isel machinery to
create constants that it will end up deciding are not needed, without them
ending up in the resultant function constant pool.

llvm-svn: 23081
 2005-08-26 17:15:30 +00:00
Chris Lattner
929c00e9e9 Fix a huge annoyance: SelectNodeTo took types before the opcode unlike 
every other SD API.  Fix it to take the opcode before the types.

llvm-svn: 23079
 2005-08-26 16:36:26 +00:00
Chris Lattner
6d22117d76 the 5th operand is the 4th number 
llvm-svn: 23074
 2005-08-26 00:43:46 +00:00
Chris Lattner
f25ec1b7b9 Add support for targets that want to custom expand select_cc in some cases. 
llvm-svn: 23071
 2005-08-26 00:23:59 +00:00
Chris Lattner
7e68d39877 Allow LowerOperation to return a null SDOperand in case it wants to lower 
some things given to it, but not all.

llvm-svn: 23070
 2005-08-26 00:14:16 +00:00
Chris Lattner
2c3fbbab05 Fix a nasty bug from a previous patch of mine 
llvm-svn: 23069
 2005-08-26 00:13:12 +00:00
Nate Begeman
54f44ad750 New fold for SELECT_CC 
llvm-svn: 23058
 2005-08-25 20:04:38 +00:00
Chris Lattner
18572f3c67 Don't auto-cse nodes that return flags 
llvm-svn: 23055
 2005-08-25 19:12:10 +00:00
Chris Lattner
cb3910fa74 add printer support for flag operands 
llvm-svn: 23054
 2005-08-25 17:59:23 +00:00
Chris Lattner
7c7a447220 simplify the code a bit using isOperationLegal 
llvm-svn: 23053
 2005-08-25 17:54:58 +00:00
Chris Lattner
7598a14e0c Add support for flag operands 
llvm-svn: 23050
 2005-08-25 17:48:54 +00:00
Chris Lattner
0168c8df11 ADd support for TargetConstantPool nodes 
llvm-svn: 23041
 2005-08-25 05:03:06 +00:00
Chris Lattner
813f6ddaf8 add a new TargetFrameIndex node 
llvm-svn: 23035
 2005-08-25 00:43:01 +00:00
Chris Lattner
22c6c99e5d add a method 
llvm-svn: 23027
 2005-08-24 23:00:29 +00:00
Chris Lattner
786ec10dfb Add ReplaceAllUsesWith that can take a vector of replacement values. 
Add some foldings to hopefully help the illegal setcc issue, and move some code around.

llvm-svn: 23025
 2005-08-24 22:44:39 +00:00
Chris Lattner
92b560cfee Add support for external symbols, and support for variable arity instructions 
llvm-svn: 23022
 2005-08-24 22:02:41 +00:00
Chris Lattner
55fb48f5ee Fix pasto that prevented VT ndoes from showing up in -view-isel-dags correctly 
llvm-svn: 23021
 2005-08-24 18:30:00 +00:00
Chris Lattner
6d4cd33447 teach selection dag mask tracking about the fact that select_cc operates like 
select.  Also teach it that the bit count instructions can only set the low bits
of the result, depending on the size of the input.

This allows us to compile this:

int %eq0(int %a) {
        %tmp.1 = seteq int %a, 0                ; <bool> [#uses=1]
        %tmp.2 = cast bool %tmp.1 to int                ; <int> [#uses=1]
        ret int %tmp.2
}

To this:

_eq0:
        cntlzw r2, r3
        srwi r3, r2, 5
        blr

instead of this:

_eq0:
        cntlzw r2, r3
        rlwinm r3, r2, 27, 31, 31
        blr

when setcc is marked illegal on ppc (which restores parity to non-illegal
setcc).  Thanks to Nate for pointing this out.

llvm-svn: 23013
 2005-08-24 16:46:55 +00:00
Chris Lattner
014e001f23 Start using isOperationLegal and isTypeLegal to simplify the code 
llvm-svn: 23012
 2005-08-24 16:35:28 +00:00
Nate Begeman
2fc750ca45 Teach SelectionDAG how to simplify a few more setcc-equivalent select_cc 
nodes so that backends don't have to.

llvm-svn: 22999
 2005-08-24 04:57:57 +00:00
Chris Lattner
64f7f0beac Make -view-isel-dags show the dag before instruction selecting, in case 
the target isel crashes due to unimplemented features like calls :)

llvm-svn: 22997
 2005-08-24 00:34:29 +00:00
Nate Begeman
d4fcf86262 Fix optimization of select_cc seteq X, 0, 1, 0 -> srl (ctlz X), log2 X size 
llvm-svn: 22995
 2005-08-24 00:21:28 +00:00
Chris Lattner
e7c3b71a28 Implement LiveVariables.h change 
llvm-svn: 22994
 2005-08-24 00:09:33 +00:00
Chris Lattner
7e3441972b adjust to new live variables interface 
llvm-svn: 22992
 2005-08-23 23:42:17 +00:00
Chris Lattner
53b91b741f Simplify this code by using higher-level LiveVariables methods 
llvm-svn: 22989
 2005-08-23 22:51:41 +00:00
Chris Lattner
610eeca969 Keep track of which registers are related to which other registers. 
Use this information to avoid doing expensive interval intersections for
registers that could not possible be interesting.  This speeds up linscan
on ia64 compiling kc++ in release mode from taking 7.82s to 4.8s(!), total
itanium llc time on this program is 27.3s now.  This marginally speeds up
PPC and X86, but they appear to be limited by other parts of linscan, not
this code.

On this program, on itanium, live intervals now takes 41% of llc time.

llvm-svn: 22986
 2005-08-23 22:27:31 +00:00
Nate Begeman
f1581c11e9 Teach the SelectionDAG how to transform select_cc eq, X, 0, 1, 0 into 
either seteq X, 0 or srl (ctlz X), size(X-1), depending on what's legal
for the target.

llvm-svn: 22978
 2005-08-23 05:41:12 +00:00
Nate Begeman
885680bafb Teach Legalize how to turn setcc into select_cc 
llvm-svn: 22977
 2005-08-23 04:29:48 +00:00
Chris Lattner
2c5f36d938 Try to avoid scanning the fixed list. On architectures with a non-stupid 
number of regs (e.g. most riscs), many functions won't need to use callee
clobbered registers.  Do a speculative check to see if we can get a free
register without processing the fixed list (which has all of these).  This
saves a lot of time on machines with lots of callee clobbered regs (e.g.
ppc and itanium, also x86).

This reduces ppc llc compile time from 184s -> 172s on kc++.  This is probably
worth FAR FAR more on itanium though.

llvm-svn: 22972
 2005-08-22 20:59:30 +00:00
Chris Lattner
9b0058b424 Move some code in the register assignment case that only needs to happen if 
we spill out of the fast path.  The scan of active_ and the calls to
updateSpillWeights don't need to happen unless a spill occurs.  This reduces
debug llc time of kc++ with ppc from 187.3s to 183.2s.

llvm-svn: 22971
 2005-08-22 20:20:42 +00:00
Chris Lattner
d73a5042d9 Fix a problem where constant expr shifts would not have their shift amount 
promoted to the right type.  This fixes: IA64/2005-08-22-LegalizerCrash.ll

llvm-svn: 22969
 2005-08-22 17:28:31 +00:00
Chris Lattner
a9710ba54f Speed up this loop a bit, based on some observations that Nate made, and 
add some comments.  This loop really needs to be reevaluated!

llvm-svn: 22966
 2005-08-22 16:55:22 +00:00
Chris Lattner
7ce81741ff Add a fast-path for register values. Add support for constant pool entries, 
allowing us to compile this:

float %test2(float* %P) {
        %Q = load float* %P
        %R = add float %Q, 10.1
        ret float %R
}

to this:

_test2:
        lfs r2, 0(r3)
        lis r3, ha16(.CPI_test2_0)
        lfs r3, lo16(.CPI_test2_0)(r3)
        fadds f1, r2, r3
        blr

llvm-svn: 22962
 2005-08-22 01:04:32 +00:00
Chris Lattner
8927bf468d add anew method 
llvm-svn: 22957
 2005-08-21 22:30:30 +00:00
Chris Lattner
7a04eff613 Add support for frame index nodes 
llvm-svn: 22956
 2005-08-21 19:56:04 +00:00
Chris Lattner
cbbd212622 add a method 
llvm-svn: 22955
 2005-08-21 19:48:59 +00:00
Chris Lattner
481b47fc75 add a method 
llvm-svn: 22949
 2005-08-21 18:49:33 +00:00
Chris Lattner
3f6df51c19 Add support for basic blocks, fix a bug in result # computation 
llvm-svn: 22948
 2005-08-21 18:49:29 +00:00
Chris Lattner
9bb0d10479 When legalizing brcond ->brcc or select -> selectcc, make sure to truncate 
the old condition to a one bit value.  The incoming value must have been
promoted, and the top bits are undefined.  This causes us to generate:

_test:
        rlwinm r2, r3, 0, 31, 31
        li r3, 17
        cmpwi cr0, r2, 0
        bne .LBB_test_2 ;
.LBB_test_1:    ;
        li r3, 1
.LBB_test_2:    ;
        blr

instead of:

_test:
        rlwinm r2, r3, 0, 31, 31
        li r2, 17
        cmpwi cr0, r3, 0
        bne .LBB_test_2 ;
.LBB_test_1:    ;
        li r2, 1
.LBB_test_2:    ;
        or r3, r2, r2
        blr

for:

int %test(bool %c) {
        %retval = select bool %c, int 17, int 1
        ret int %retval
}

llvm-svn: 22947
 2005-08-21 18:03:09 +00:00
Chris Lattner
7c3e52ef92 fix bogus warning 
llvm-svn: 22943
 2005-08-20 18:07:27 +00:00
Chris Lattner
5b7488224d Add support for global address nodes 
llvm-svn: 22940
 2005-08-19 22:38:24 +00:00
Chris Lattner
5210fd0e51 Add support for TargetGlobalAddress nodes 
llvm-svn: 22938
 2005-08-19 22:31:04 +00:00
Chris Lattner
bedf8e757a Implement CopyFromReg, TokenFactor, and fix a bug in CopyToReg. This allows 
us to compile stuff like this:

double %test(double %A, double %B, double %C, double %E) {
        %F = mul double %A, %A
        %G = add double %F, %B
        %H = sub double -0.0, %G
        %I = mul double %H, %C
        %J = add double %I, %E
        ret double %J
}

to:

_test:
        fnmadd f0, f1, f1, f2
        fmadd f1, f0, f3, f4
        blr

woot!

llvm-svn: 22937
 2005-08-19 21:43:53 +00:00
Chris Lattner
b36807b0d0 Fix a bug in previous commit 
llvm-svn: 22936
 2005-08-19 21:34:13 +00:00
Chris Lattner
ac699c4db9 Print physreg register nodes with target names (e.g. F1) instead of numbers 
llvm-svn: 22934
 2005-08-19 21:21:16 +00:00
Chris Lattner
011a721d08 Before implementing copyfromreg, we'll implement copytoreg correctly. 
This gets us this for the previous testcase:

_test:
        lis r2, 0
        ori r3, r2, 65535
        blr

Note that we actually write to r3 (the return reg) correctly now :)

llvm-svn: 22933
 2005-08-19 20:50:53 +00:00
Chris Lattner
9af3aaf541 Now that we have operand info for machine instructions, use it to create 
temporary registers for things that define a register.  This allows dag->dag
isel to compile this:

int %test() { ret int 65535 }

into:

_test:
        lis r2, 0
        ori r2, r2, 65535
        blr

Next up, getting CopyFromReg to work, allowing arguments and cross-bb values.

llvm-svn: 22932
 2005-08-19 20:45:43 +00:00
Jeff Cohen
12674110d5 Fix VC++ constant truncation warning. 
llvm-svn: 22907
 2005-08-19 16:19:21 +00:00
Jeff Cohen
f99748bc0f Fix VC++ precedence warning. 
llvm-svn: 22902
 2005-08-19 04:39:48 +00:00
Chris Lattner
1207209677 Fix computation of # operands, add a temporary hack for CopyToReg 
llvm-svn: 22896
 2005-08-19 01:01:34 +00:00
Chris Lattner
7b9f02525e add a new -view-sched-dags option to view dags as they are sent to the scheduler. 
llvm-svn: 22878
 2005-08-18 20:11:49 +00:00
Chris Lattner
62bc771af7 Implement the first chunk of a code emitter. This is sophisticated enough to 
codegen:

_empty:
.LBB_empty_0:   ;
        blr

but can't do anything more (yet). :)

llvm-svn: 22876
 2005-08-18 20:07:59 +00:00
Chris Lattner
ebb48e5877 new file, obviously just a stub 
llvm-svn: 22868
 2005-08-18 18:45:24 +00:00
Chris Lattner
5cbeaed711 Enable critical edge splitting by default 
llvm-svn: 22863
 2005-08-18 17:35:14 +00:00
Nate Begeman
474ec3c02d Add support for target DAG nodes that take 4 operands, such as PowerPC's 
rlwinm.

llvm-svn: 22856
 2005-08-18 07:30:15 +00:00
Chris Lattner
d6b9b36616 Fix printing of VTSDNodes 
llvm-svn: 22853
 2005-08-18 03:31:02 +00:00
Jim Laskey
d761e8859d Move the code dependency for MathExtras.h from SelectionDAGNodes.h. 
Added some class dividers in SelectionDAG.cpp.

llvm-svn: 22841
 2005-08-17 20:08:02 +00:00
Jim Laskey
61e3d7bca5 Culling out use of unions for converting FP to bits and vice versa. 
llvm-svn: 22838
 2005-08-17 19:34:49 +00:00
Chris Lattner
a11bdf3abe Fix a bug in RemoveDeadNodes where it would crash when its "optional" 
argument is not specified.

Implement ReplaceAllUsesWith.

llvm-svn: 22834
 2005-08-17 19:00:20 +00:00
Jim Laskey
7cdadb13d5 Switched to using BitsToDouble for int_to_float to avoid aliasing problem. 
llvm-svn: 22831
 2005-08-17 17:42:52 +00:00
Jim Laskey
2370cb4e85 Change hex float constants for the sake of VC++. 
llvm-svn: 22828
 2005-08-17 09:44:59 +00:00
Chris Lattner
dbfcba7565 Add a new beta option for critical edge splitting, to avoid a problem that 
Nate noticed in yacr2 (and I know occurs in other places as well).

This is still rough, as the critical edge blocks are not intelligently placed
but is added to get some idea to see if this improves performance.

llvm-svn: 22825
 2005-08-17 06:37:43 +00:00
Chris Lattner
a103a2e9c6 Fix a regression on X86, where FP values can be promoted too. 
llvm-svn: 22822
 2005-08-17 06:06:25 +00:00
Jim Laskey
59b9ee0529 Added generic code expansion for [signed|unsigned] i32 to [f32|f64] casts in the 
legalizer.  PowerPC now uses this expansion instead of ISel version.

Example:

// signed integer to double conversion
double f1(signed x) {
  return (double)x;
}

// unsigned integer to double conversion
double f2(unsigned x) {
  return (double)x;
}

// signed integer to float conversion
float f3(signed x) {
  return (float)x;
}

// unsigned integer to float conversion
float f4(unsigned x) {
  return (float)x;
}


Byte Code:

internal fastcc double %_Z2f1i(int %x) {
entry:
        %tmp.1 = cast int %x to double          ; <double> [#uses=1]
        ret double %tmp.1
}

internal fastcc double %_Z2f2j(uint %x) {
entry:
        %tmp.1 = cast uint %x to double         ; <double> [#uses=1]
        ret double %tmp.1
}

internal fastcc float %_Z2f3i(int %x) {
entry:
        %tmp.1 = cast int %x to float           ; <float> [#uses=1]
        ret float %tmp.1
}

internal fastcc float %_Z2f4j(uint %x) {
entry:
        %tmp.1 = cast uint %x to float          ; <float> [#uses=1]
        ret float %tmp.1
}

internal fastcc double %_Z2g1i(int %x) {
entry:
        %buffer = alloca [2 x uint]             ; <[2 x uint]*> [#uses=3]
        %tmp.0 = getelementptr [2 x uint]* %buffer, int 0, int 0                ; <uint*> [#uses=1]
        store uint 1127219200, uint* %tmp.0
        %tmp.2 = cast int %x to uint            ; <uint> [#uses=1]
        %tmp.3 = xor uint %tmp.2, 2147483648            ; <uint> [#uses=1]
        %tmp.5 = getelementptr [2 x uint]* %buffer, int 0, int 1                ; <uint*> [#uses=1]
        store uint %tmp.3, uint* %tmp.5
        %tmp.9 = cast [2 x uint]* %buffer to double*            ; <double*> [#uses=1]
        %tmp.10 = load double* %tmp.9           ; <double> [#uses=1]
        %tmp.13 = load double* cast (long* %signed_bias to double*)             ; <double> [#uses=1]
        %tmp.14 = sub double %tmp.10, %tmp.13           ; <double> [#uses=1]
        ret double %tmp.14
}

internal fastcc double %_Z2g2j(uint %x) {
entry:
        %buffer = alloca [2 x uint]             ; <[2 x uint]*> [#uses=3]
        %tmp.0 = getelementptr [2 x uint]* %buffer, int 0, int 0                ; <uint*> [#uses=1]
        store uint 1127219200, uint* %tmp.0
        %tmp.1 = getelementptr [2 x uint]* %buffer, int 0, int 1                ; <uint*> [#uses=1]
        store uint %x, uint* %tmp.1
        %tmp.4 = cast [2 x uint]* %buffer to double*            ; <double*> [#uses=1]
        %tmp.5 = load double* %tmp.4            ; <double> [#uses=1]
        %tmp.8 = load double* cast (long* %unsigned_bias to double*)            ; <double> [#uses=1]
        %tmp.9 = sub double %tmp.5, %tmp.8              ; <double> [#uses=1]
        ret double %tmp.9
}

internal fastcc float %_Z2g3i(int %x) {
entry:
        %buffer = alloca [2 x uint]             ; <[2 x uint]*> [#uses=3]
        %tmp.0 = getelementptr [2 x uint]* %buffer, int 0, int 0                ; <uint*> [#uses=1]
        store uint 1127219200, uint* %tmp.0
        %tmp.2 = cast int %x to uint            ; <uint> [#uses=1]
        %tmp.3 = xor uint %tmp.2, 2147483648            ; <uint> [#uses=1]
        %tmp.5 = getelementptr [2 x uint]* %buffer, int 0, int 1                ; <uint*> [#uses=1]
        store uint %tmp.3, uint* %tmp.5
        %tmp.9 = cast [2 x uint]* %buffer to double*            ; <double*> [#uses=1]
        %tmp.10 = load double* %tmp.9           ; <double> [#uses=1]
        %tmp.13 = load double* cast (long* %signed_bias to double*)             ; <double> [#uses=1]
        %tmp.14 = sub double %tmp.10, %tmp.13           ; <double> [#uses=1]
        %tmp.16 = cast double %tmp.14 to float          ; <float> [#uses=1]
        ret float %tmp.16
}

internal fastcc float %_Z2g4j(uint %x) {
entry:
        %buffer = alloca [2 x uint]             ; <[2 x uint]*> [#uses=3]
        %tmp.0 = getelementptr [2 x uint]* %buffer, int 0, int 0                ; <uint*> [#uses=1]
        store uint 1127219200, uint* %tmp.0
        %tmp.1 = getelementptr [2 x uint]* %buffer, int 0, int 1                ; <uint*> [#uses=1]
        store uint %x, uint* %tmp.1
        %tmp.4 = cast [2 x uint]* %buffer to double*            ; <double*> [#uses=1]
        %tmp.5 = load double* %tmp.4            ; <double> [#uses=1]
        %tmp.8 = load double* cast (long* %unsigned_bias to double*)            ; <double> [#uses=1]
        %tmp.9 = sub double %tmp.5, %tmp.8              ; <double> [#uses=1]
        %tmp.11 = cast double %tmp.9 to float           ; <float> [#uses=1]
        ret float %tmp.11
}


PowerPC Code:

        .machine ppc970


        .const
        .align  2
.CPIl1__Z2f1i_0:                                        ; float 0x4330000080000000
        .long   1501560836      ; float 4.5036e+15
        .text
        .align  2
        .globl  l1__Z2f1i
l1__Z2f1i:
.LBBl1__Z2f1i_0:        ; entry
        xoris r2, r3, 32768
        stw r2, -4(r1)
        lis r2, 17200
        stw r2, -8(r1)
        lfd f0, -8(r1)
        lis r2, ha16(.CPIl1__Z2f1i_0)
        lfs f1, lo16(.CPIl1__Z2f1i_0)(r2)
        fsub f1, f0, f1
        blr


        .const
        .align  2
.CPIl2__Z2f2j_0:                                        ; float 0x4330000000000000
        .long   1501560832      ; float 4.5036e+15
        .text
        .align  2
        .globl  l2__Z2f2j
l2__Z2f2j:
.LBBl2__Z2f2j_0:        ; entry
        stw r3, -4(r1)
        lis r2, 17200
        stw r2, -8(r1)
        lfd f0, -8(r1)
        lis r2, ha16(.CPIl2__Z2f2j_0)
        lfs f1, lo16(.CPIl2__Z2f2j_0)(r2)
        fsub f1, f0, f1
        blr


        .const
        .align  2
.CPIl3__Z2f3i_0:                                        ; float 0x4330000080000000
        .long   1501560836      ; float 4.5036e+15
        .text
        .align  2
        .globl  l3__Z2f3i
l3__Z2f3i:
.LBBl3__Z2f3i_0:        ; entry
        xoris r2, r3, 32768
        stw r2, -4(r1)
        lis r2, 17200
        stw r2, -8(r1)
        lfd f0, -8(r1)
        lis r2, ha16(.CPIl3__Z2f3i_0)
        lfs f1, lo16(.CPIl3__Z2f3i_0)(r2)
        fsub f0, f0, f1
        frsp f1, f0
        blr


        .const
        .align  2
.CPIl4__Z2f4j_0:                                        ; float 0x4330000000000000
        .long   1501560832      ; float 4.5036e+15
        .text
        .align  2
        .globl  l4__Z2f4j
l4__Z2f4j:
.LBBl4__Z2f4j_0:        ; entry
        stw r3, -4(r1)
        lis r2, 17200
        stw r2, -8(r1)
        lfd f0, -8(r1)
        lis r2, ha16(.CPIl4__Z2f4j_0)
        lfs f1, lo16(.CPIl4__Z2f4j_0)(r2)
        fsub f0, f0, f1
        frsp f1, f0
        blr

llvm-svn: 22814
 2005-08-17 00:39:29 +00:00
Chris Lattner
bd8cbd4951 add a new TargetConstant node 
llvm-svn: 22813
 2005-08-17 00:34:06 +00:00
Chris Lattner
3b7e157005 Eliminate the RegSDNode class, which 3 nodes (CopyFromReg/CopyToReg/ImplicitDef) 
used to tack a register number onto the node.

Instead of doing this, make a new node, RegisterSDNode, which is a leaf
containing a register number.  These three operations just become normal
DAG nodes now, instead of requiring special handling.

Note that with this change, it is no longer correct to make illegal
CopyFromReg/CopyToReg nodes.  The legalizer will not touch them, and this
is bad, so don't do it. :)

llvm-svn: 22806
 2005-08-16 21:55:35 +00:00
Nate Begeman
f6b6378f23 Implement BR_CC and BRTWOWAY_CC. This allows the removal of a rather nasty 
fixme from the PowerPC backend.  Emit slightly better code for legalizing
select_cc.

llvm-svn: 22805
 2005-08-16 19:49:35 +00:00
Chris Lattner
65b9983515 Allow passing a dag into dump and getOperationName. If one is available 
when printing a node, use it to render target operations with their
target instruction name instead of "<<unknown>>".

llvm-svn: 22804
 2005-08-16 18:33:07 +00:00
Chris Lattner
1b07a165e0 Use a extant helper to do this. 
llvm-svn: 22802
 2005-08-16 18:31:23 +00:00
Chris Lattner
73348d1e89 Add some methods for dag->dag isel. 
Split RemoveNodeFromCSEMaps out of DeleteNodesIfDead to do it.

llvm-svn: 22801
 2005-08-16 18:17:10 +00:00
Nate Begeman
54423e60c6 Fix last night's PPC32 regressions by 
1. Not selecting the false value of a select_cc in the false arm, which
   isn't legal for nested selects.
2. Actually returning the node we created and Legalized in the FP_TO_UINT
   Expander.

llvm-svn: 22789
 2005-08-14 18:38:32 +00:00
Nate Begeman
9be6a214ff Teach the legalizer how to legalize FP_TO_UINT. 
Teach the legalizer to promote FP_TO_UINT to FP_TO_SINT if the wider
  FP_TO_UINT is also illegal.  This allows us on PPC to codegen
  unsigned short foo(float a) { return a; }

as:
_foo:
.LBB_foo_0:     ; entry
        fctiwz f0, f1
        stfd f0, -8(r1)
        lwz r2, -4(r1)
        rlwinm r3, r2, 0, 16, 31
        blr

instead of:
_foo:
.LBB_foo_0:     ; entry
        fctiwz f0, f1
        stfd f0, -8(r1)
        lwz r2, -4(r1)
        lis r3, ha16(.CPI_foo_0)
        lfs f0, lo16(.CPI_foo_0)(r3)
        fcmpu cr0, f1, f0
        blt .LBB_foo_2  ; entry
.LBB_foo_1:     ; entry
        fsubs f0, f1, f0
        fctiwz f0, f0
        stfd f0, -16(r1)
        lwz r2, -12(r1)
        xoris r2, r2, 32768
.LBB_foo_2:     ; entry
        rlwinm r3, r2, 0, 16, 31
        blr

llvm-svn: 22785
 2005-08-14 01:20:53 +00:00
Nate Begeman
021a5b3fe1 Remove an unncessary argument to SimplifySelectCC and add an additional 
assert when creating a select_cc node.

llvm-svn: 22780
 2005-08-13 06:14:17 +00:00
Nate Begeman
4e8f777256 Fix the fabs regression on x86 by abstracting the select_cc optimization 
out into SimplifySelectCC.  This allows both ISD::SELECT and ISD::SELECT_CC
to use the same set of simplifying folds.

llvm-svn: 22779
 2005-08-13 06:00:21 +00:00
Chris Lattner
e06d2c3760 implement a couple of simple shift foldings. 
e.g.  (X & 7) >> 3   -> 0

llvm-svn: 22774
 2005-08-12 23:54:58 +00:00
Nate Begeman
09c56e0432 Add a select_cc optimization for recognizing abs(int). This speeds up an 
integer MPEG encoding loop by a factor of two.

llvm-svn: 22758
 2005-08-11 02:18:13 +00:00
Nate Begeman
206e850add Some SELECT_CC cleanups: 
1. move assertions for node creation to getNode()
2. legalize the values returned in ExpandOp immediately
3. Move select_cc optimizations from SELECT's getNode() to SELECT_CC's,
   allowing them to be cleaned up significantly.

This paves the way to pick up additional optimizations on SELECT_CC, such
as sum-of-absolute-differences.

llvm-svn: 22757
 2005-08-11 01:12:20 +00:00